2 * Driver for the ICST307 VCO clock found in the ARM Reference designs.
3 * We wrap the custom interface from <asm/hardware/icst.h> into the generic
6 * Copyright (C) 2012-2015 Linus Walleij
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * TODO: when all ARM reference designs are migrated to generic clocks, the
13 * ICST clock code from the ARM tree should probably be merged into this
16 #include <linux/kernel.h>
17 #include <linux/slab.h>
18 #include <linux/export.h>
19 #include <linux/err.h>
20 #include <linux/clk-provider.h>
22 #include <linux/regmap.h>
23 #include <linux/mfd/syscon.h>
27 /* Magic unlocking token used on all Versatile boards */
28 #define VERSATILE_LOCK_VAL 0xA05F
30 #define VERSATILE_AUX_OSC_BITS 0x7FFFF
31 #define INTEGRATOR_AP_CM_BITS 0xFF
32 #define INTEGRATOR_CP_CM_CORE_BITS 0x7FF
33 #define INTEGRATOR_CP_CM_MEM_BITS 0x7FF000
36 * enum icst_control_type - the type of ICST control register
38 enum icst_control_type {
39 ICST_VERSATILE, /* The standard type, all control bits available */
40 ICST_INTEGRATOR_AP_CM, /* Only 8 bits of VDW available */
41 ICST_INTEGRATOR_CP_CM_CORE, /* Only 8 bits of VDW and 3 bits of OD */
42 ICST_INTEGRATOR_CP_CM_MEM, /* Only 8 bits of VDW and 3 bits of OD */
46 * struct clk_icst - ICST VCO clock wrapper
47 * @hw: corresponding clock hardware entry
48 * @vcoreg: VCO register address
49 * @lockreg: VCO lock register address
50 * @params: parameters for this ICST instance
52 * @ctype: the type of control register for the ICST
59 struct icst_params *params;
61 enum icst_control_type ctype;
64 #define to_icst(_hw) container_of(_hw, struct clk_icst, hw)
67 * vco_get() - get ICST VCO settings from a certain ICST
68 * @icst: the ICST clock to get
69 * @vco: the VCO struct to return the value in
71 static int vco_get(struct clk_icst *icst, struct icst_vco *vco)
76 ret = regmap_read(icst->map, icst->vcoreg_off, &val);
81 * The Integrator/AP core clock can only access the low eight
82 * bits of the v PLL divider. Bit 8 is tied low and always zero,
83 * r is hardwired to 22 and output divider s is hardwired to 1
84 * (divide by 2) according to the document
85 * "Integrator CM926EJ-S, CM946E-S, CM966E-S, CM1026EJ-S and
86 * CM1136JF-S User Guide" ARM DUI 0138E, page 3-13 thru 3-14.
88 if (icst->ctype == ICST_INTEGRATOR_AP_CM) {
89 vco->v = val & INTEGRATOR_AP_CM_BITS;
96 * The Integrator/CP core clock can access the low eight bits
97 * of the v PLL divider. Bit 8 is tied low and always zero,
98 * r is hardwired to 22 and the output divider s is accessible
99 * in bits 8 thru 10 according to the document
100 * "Integrator/CM940T, CM920T, CM740T, and CM720T User Guide"
101 * ARM DUI 0157A, page 3-20 thru 3-23 and 4-10.
103 if (icst->ctype == ICST_INTEGRATOR_CP_CM_CORE) {
106 vco->s = (val >> 8) & 7;
110 if (icst->ctype == ICST_INTEGRATOR_CP_CM_MEM) {
111 vco->v = (val >> 12) & 0xFF;
113 vco->s = (val >> 20) & 7;
117 vco->v = val & 0x1ff;
118 vco->r = (val >> 9) & 0x7f;
119 vco->s = (val >> 16) & 03;
124 * vco_set() - commit changes to an ICST VCO
125 * @icst: the ICST clock to set
126 * @vco: the VCO struct to set the changes from
128 static int vco_set(struct clk_icst *icst, struct icst_vco vco)
134 /* Mask the bits used by the VCO */
135 switch (icst->ctype) {
136 case ICST_INTEGRATOR_AP_CM:
137 mask = INTEGRATOR_AP_CM_BITS;
140 pr_err("ICST error: tried to set bit 8 of VDW\n");
142 pr_err("ICST error: tried to use VOD != 1\n");
144 pr_err("ICST error: tried to use RDW != 22\n");
146 case ICST_INTEGRATOR_CP_CM_CORE:
147 mask = INTEGRATOR_CP_CM_CORE_BITS; /* Uses 12 bits */
148 val = (vco.v & 0xFF) | vco.s << 8;
150 pr_err("ICST error: tried to set bit 8 of VDW\n");
152 pr_err("ICST error: tried to use RDW != 22\n");
154 case ICST_INTEGRATOR_CP_CM_MEM:
155 mask = INTEGRATOR_CP_CM_MEM_BITS; /* Uses 12 bits */
156 val = ((vco.v & 0xFF) << 12) | (vco.s << 20);
158 pr_err("ICST error: tried to set bit 8 of VDW\n");
160 pr_err("ICST error: tried to use RDW != 22\n");
163 /* Regular auxilary oscillator */
164 mask = VERSATILE_AUX_OSC_BITS;
165 val = vco.v | (vco.r << 9) | (vco.s << 16);
169 pr_debug("ICST: new val = 0x%08x\n", val);
171 /* This magic unlocks the VCO so it can be controlled */
172 ret = regmap_write(icst->map, icst->lockreg_off, VERSATILE_LOCK_VAL);
175 ret = regmap_update_bits(icst->map, icst->vcoreg_off, mask, val);
178 /* This locks the VCO again */
179 ret = regmap_write(icst->map, icst->lockreg_off, 0);
185 static unsigned long icst_recalc_rate(struct clk_hw *hw,
186 unsigned long parent_rate)
188 struct clk_icst *icst = to_icst(hw);
193 icst->params->ref = parent_rate;
194 ret = vco_get(icst, &vco);
196 pr_err("ICST: could not get VCO setting\n");
199 icst->rate = icst_hz(icst->params, vco);
203 static long icst_round_rate(struct clk_hw *hw, unsigned long rate,
204 unsigned long *prate)
206 struct clk_icst *icst = to_icst(hw);
209 if (icst->ctype == ICST_INTEGRATOR_AP_CM ||
210 icst->ctype == ICST_INTEGRATOR_CP_CM_CORE) {
211 if (rate <= 12000000)
213 if (rate >= 160000000)
215 /* Slam to closest megahertz */
216 return DIV_ROUND_CLOSEST(rate, 1000000) * 1000000;
219 if (icst->ctype == ICST_INTEGRATOR_CP_CM_MEM) {
222 if (rate >= 66000000)
224 /* Slam to closest 0.5 megahertz */
225 return DIV_ROUND_CLOSEST(rate, 500000) * 500000;
228 vco = icst_hz_to_vco(icst->params, rate);
229 return icst_hz(icst->params, vco);
232 static int icst_set_rate(struct clk_hw *hw, unsigned long rate,
233 unsigned long parent_rate)
235 struct clk_icst *icst = to_icst(hw);
239 icst->params->ref = parent_rate;
240 vco = icst_hz_to_vco(icst->params, rate);
241 icst->rate = icst_hz(icst->params, vco);
242 return vco_set(icst, vco);
245 static const struct clk_ops icst_ops = {
246 .recalc_rate = icst_recalc_rate,
247 .round_rate = icst_round_rate,
248 .set_rate = icst_set_rate,
251 static struct clk *icst_clk_setup(struct device *dev,
252 const struct clk_icst_desc *desc,
254 const char *parent_name,
256 enum icst_control_type ctype)
259 struct clk_icst *icst;
260 struct clk_init_data init;
261 struct icst_params *pclone;
263 icst = kzalloc(sizeof(struct clk_icst), GFP_KERNEL);
265 pr_err("could not allocate ICST clock!\n");
266 return ERR_PTR(-ENOMEM);
269 pclone = kmemdup(desc->params, sizeof(*pclone), GFP_KERNEL);
272 pr_err("could not clone ICST params\n");
273 return ERR_PTR(-ENOMEM);
277 init.ops = &icst_ops;
279 init.parent_names = (parent_name ? &parent_name : NULL);
280 init.num_parents = (parent_name ? 1 : 0);
282 icst->hw.init = &init;
283 icst->params = pclone;
284 icst->vcoreg_off = desc->vco_offset;
285 icst->lockreg_off = desc->lock_offset;
288 clk = clk_register(dev, &icst->hw);
297 struct clk *icst_clk_register(struct device *dev,
298 const struct clk_icst_desc *desc,
300 const char *parent_name,
303 struct regmap_config icst_regmap_conf = {
310 map = regmap_init_mmio(dev, base, &icst_regmap_conf);
312 pr_err("could not initialize ICST regmap\n");
313 return ERR_CAST(map);
315 return icst_clk_setup(dev, desc, name, parent_name, map,
318 EXPORT_SYMBOL_GPL(icst_clk_register);
322 * In a device tree, an memory-mapped ICST clock appear as a child
323 * of a syscon node. Assume this and probe it only as a child of a
327 static const struct icst_params icst525_params = {
328 .vco_max = ICST525_VCO_MAX_5V,
329 .vco_min = ICST525_VCO_MIN,
334 .s2div = icst525_s2div,
335 .idx2s = icst525_idx2s,
338 static const struct icst_params icst307_params = {
339 .vco_max = ICST307_VCO_MAX,
340 .vco_min = ICST307_VCO_MIN,
345 .s2div = icst307_s2div,
346 .idx2s = icst307_idx2s,
350 * The core modules on the Integrator/AP and Integrator/CP have
351 * especially crippled ICST525 control.
353 static const struct icst_params icst525_apcp_cm_params = {
354 .vco_max = ICST525_VCO_MAX_5V,
355 .vco_min = ICST525_VCO_MIN,
356 /* Minimum 12 MHz, VDW = 4 */
359 * Maximum 160 MHz, VDW = 152 for all core modules, but
360 * CM926EJ-S, CM1026EJ-S and CM1136JF-S can actually
361 * go to 200 MHz (max VDW = 192).
364 /* r is hardcoded to 22 and this is the actual divisor, +2 */
367 .s2div = icst525_s2div,
368 .idx2s = icst525_idx2s,
371 static void __init of_syscon_icst_setup(struct device_node *np)
373 struct device_node *parent;
375 struct clk_icst_desc icst_desc;
376 const char *name = np->name;
377 const char *parent_name;
379 enum icst_control_type ctype;
381 /* We do not release this reference, we are using it perpetually */
382 parent = of_get_parent(np);
384 pr_err("no parent node for syscon ICST clock\n");
387 map = syscon_node_to_regmap(parent);
389 pr_err("no regmap for syscon ICST clock parent\n");
393 if (of_property_read_u32(np, "vco-offset", &icst_desc.vco_offset)) {
394 pr_err("no VCO register offset for ICST clock\n");
397 if (of_property_read_u32(np, "lock-offset", &icst_desc.lock_offset)) {
398 pr_err("no lock register offset for ICST clock\n");
402 if (of_device_is_compatible(np, "arm,syscon-icst525")) {
403 icst_desc.params = &icst525_params;
404 ctype = ICST_VERSATILE;
405 } else if (of_device_is_compatible(np, "arm,syscon-icst307")) {
406 icst_desc.params = &icst307_params;
407 ctype = ICST_VERSATILE;
408 } else if (of_device_is_compatible(np, "arm,syscon-icst525-integratorap-cm")) {
409 icst_desc.params = &icst525_apcp_cm_params;
410 ctype = ICST_INTEGRATOR_AP_CM;
411 } else if (of_device_is_compatible(np, "arm,syscon-icst525-integratorcp-cm-core")) {
412 icst_desc.params = &icst525_apcp_cm_params;
413 ctype = ICST_INTEGRATOR_CP_CM_CORE;
414 } else if (of_device_is_compatible(np, "arm,syscon-icst525-integratorcp-cm-mem")) {
415 icst_desc.params = &icst525_apcp_cm_params;
416 ctype = ICST_INTEGRATOR_CP_CM_MEM;
418 pr_err("unknown ICST clock %s\n", name);
422 /* Parent clock name is not the same as node parent */
423 parent_name = of_clk_get_parent_name(np, 0);
425 regclk = icst_clk_setup(NULL, &icst_desc, name, parent_name, map, ctype);
426 if (IS_ERR(regclk)) {
427 pr_err("error setting up syscon ICST clock %s\n", name);
430 of_clk_add_provider(np, of_clk_src_simple_get, regclk);
431 pr_debug("registered syscon ICST clock %s\n", name);
434 CLK_OF_DECLARE(arm_syscon_icst525_clk,
435 "arm,syscon-icst525", of_syscon_icst_setup);
436 CLK_OF_DECLARE(arm_syscon_icst307_clk,
437 "arm,syscon-icst307", of_syscon_icst_setup);
438 CLK_OF_DECLARE(arm_syscon_integratorap_cm_clk,
439 "arm,syscon-icst525-integratorap-cm", of_syscon_icst_setup);
440 CLK_OF_DECLARE(arm_syscon_integratorcp_cm_core_clk,
441 "arm,syscon-icst525-integratorcp-cm-core", of_syscon_icst_setup);
442 CLK_OF_DECLARE(arm_syscon_integratorcp_cm_mem_clk,
443 "arm,syscon-icst525-integratorcp-cm-mem", of_syscon_icst_setup);