2 * Freescale FlexTimer Module (FTM) timer driver.
4 * Copyright 2014 Freescale Semiconductor, Inc.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
12 #include <linux/clk.h>
13 #include <linux/clockchips.h>
14 #include <linux/clocksource.h>
15 #include <linux/err.h>
16 #include <linux/interrupt.h>
18 #include <linux/of_address.h>
19 #include <linux/of_irq.h>
20 #include <linux/sched_clock.h>
21 #include <linux/slab.h>
24 #define FTM_SC_CLK_SHIFT 3
25 #define FTM_SC_CLK_MASK (0x3 << FTM_SC_CLK_SHIFT)
26 #define FTM_SC_CLK(c) ((c) << FTM_SC_CLK_SHIFT)
27 #define FTM_SC_PS_MASK 0x7
28 #define FTM_SC_TOIE BIT(6)
29 #define FTM_SC_TOF BIT(7)
33 #define FTM_CNTIN 0x4C
37 struct ftm_clock_device {
38 void __iomem *clksrc_base;
39 void __iomem *clkevt_base;
40 unsigned long periodic_cyc;
45 static struct ftm_clock_device *priv;
47 static inline u32 ftm_readl(void __iomem *addr)
50 return ioread32be(addr);
52 return ioread32(addr);
55 static inline void ftm_writel(u32 val, void __iomem *addr)
58 iowrite32be(val, addr);
63 static inline void ftm_counter_enable(void __iomem *base)
67 /* select and enable counter clock source */
68 val = ftm_readl(base + FTM_SC);
69 val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK);
70 val |= priv->ps | FTM_SC_CLK(1);
71 ftm_writel(val, base + FTM_SC);
74 static inline void ftm_counter_disable(void __iomem *base)
78 /* disable counter clock source */
79 val = ftm_readl(base + FTM_SC);
80 val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK);
81 ftm_writel(val, base + FTM_SC);
84 static inline void ftm_irq_acknowledge(void __iomem *base)
88 val = ftm_readl(base + FTM_SC);
90 ftm_writel(val, base + FTM_SC);
93 static inline void ftm_irq_enable(void __iomem *base)
97 val = ftm_readl(base + FTM_SC);
99 ftm_writel(val, base + FTM_SC);
102 static inline void ftm_irq_disable(void __iomem *base)
106 val = ftm_readl(base + FTM_SC);
108 ftm_writel(val, base + FTM_SC);
111 static inline void ftm_reset_counter(void __iomem *base)
114 * The CNT register contains the FTM counter value.
115 * Reset clears the CNT register. Writing any value to COUNT
116 * updates the counter with its initial value, CNTIN.
118 ftm_writel(0x00, base + FTM_CNT);
121 static u64 ftm_read_sched_clock(void)
123 return ftm_readl(priv->clksrc_base + FTM_CNT);
126 static int ftm_set_next_event(unsigned long delta,
127 struct clock_event_device *unused)
130 * The CNNIN and MOD are all double buffer registers, writing
131 * to the MOD register latches the value into a buffer. The MOD
132 * register is updated with the value of its write buffer with
133 * the following scenario:
134 * a, the counter source clock is diabled.
136 ftm_counter_disable(priv->clkevt_base);
138 /* Force the value of CNTIN to be loaded into the FTM counter */
139 ftm_reset_counter(priv->clkevt_base);
142 * The counter increments until the value of MOD is reached,
143 * at which point the counter is reloaded with the value of CNTIN.
144 * The TOF (the overflow flag) bit is set when the FTM counter
145 * changes from MOD to CNTIN. So we should using the delta - 1.
147 ftm_writel(delta - 1, priv->clkevt_base + FTM_MOD);
149 ftm_counter_enable(priv->clkevt_base);
151 ftm_irq_enable(priv->clkevt_base);
156 static void ftm_set_mode(enum clock_event_mode mode,
157 struct clock_event_device *evt)
160 case CLOCK_EVT_MODE_PERIODIC:
161 ftm_set_next_event(priv->periodic_cyc, evt);
163 case CLOCK_EVT_MODE_ONESHOT:
164 ftm_counter_disable(priv->clkevt_base);
171 static irqreturn_t ftm_evt_interrupt(int irq, void *dev_id)
173 struct clock_event_device *evt = dev_id;
175 ftm_irq_acknowledge(priv->clkevt_base);
177 if (likely(evt->mode == CLOCK_EVT_MODE_ONESHOT)) {
178 ftm_irq_disable(priv->clkevt_base);
179 ftm_counter_disable(priv->clkevt_base);
182 evt->event_handler(evt);
187 static struct clock_event_device ftm_clockevent = {
188 .name = "Freescale ftm timer",
189 .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
190 .set_mode = ftm_set_mode,
191 .set_next_event = ftm_set_next_event,
195 static struct irqaction ftm_timer_irq = {
196 .name = "Freescale ftm timer",
197 .flags = IRQF_TIMER | IRQF_IRQPOLL,
198 .handler = ftm_evt_interrupt,
199 .dev_id = &ftm_clockevent,
202 static int __init ftm_clockevent_init(unsigned long freq, int irq)
206 ftm_writel(0x00, priv->clkevt_base + FTM_CNTIN);
207 ftm_writel(~0UL, priv->clkevt_base + FTM_MOD);
209 ftm_reset_counter(priv->clkevt_base);
211 err = setup_irq(irq, &ftm_timer_irq);
213 pr_err("ftm: setup irq failed: %d\n", err);
217 ftm_clockevent.cpumask = cpumask_of(0);
218 ftm_clockevent.irq = irq;
220 clockevents_config_and_register(&ftm_clockevent,
221 freq / (1 << priv->ps),
224 ftm_counter_enable(priv->clkevt_base);
229 static int __init ftm_clocksource_init(unsigned long freq)
233 ftm_writel(0x00, priv->clksrc_base + FTM_CNTIN);
234 ftm_writel(~0UL, priv->clksrc_base + FTM_MOD);
236 ftm_reset_counter(priv->clksrc_base);
238 sched_clock_register(ftm_read_sched_clock, 16, freq / (1 << priv->ps));
239 err = clocksource_mmio_init(priv->clksrc_base + FTM_CNT, "fsl-ftm",
240 freq / (1 << priv->ps), 300, 16,
241 clocksource_mmio_readl_up);
243 pr_err("ftm: init clock source mmio failed: %d\n", err);
247 ftm_counter_enable(priv->clksrc_base);
252 static int __init __ftm_clk_init(struct device_node *np, char *cnt_name,
258 clk = of_clk_get_by_name(np, cnt_name);
260 pr_err("ftm: Cannot get \"%s\": %ld\n", cnt_name, PTR_ERR(clk));
263 err = clk_prepare_enable(clk);
265 pr_err("ftm: clock failed to prepare+enable \"%s\": %d\n",
270 clk = of_clk_get_by_name(np, ftm_name);
272 pr_err("ftm: Cannot get \"%s\": %ld\n", ftm_name, PTR_ERR(clk));
275 err = clk_prepare_enable(clk);
277 pr_err("ftm: clock failed to prepare+enable \"%s\": %d\n",
280 return clk_get_rate(clk);
283 static unsigned long __init ftm_clk_init(struct device_node *np)
287 freq = __ftm_clk_init(np, "ftm-evt-counter-en", "ftm-evt");
291 freq = __ftm_clk_init(np, "ftm-src-counter-en", "ftm-src");
298 static int __init ftm_calc_closest_round_cyc(unsigned long freq)
302 /* The counter register is only using the lower 16 bits, and
303 * if the 'freq' value is to big here, then the periodic_cyc
307 priv->periodic_cyc = DIV_ROUND_CLOSEST(freq,
308 HZ * (1 << priv->ps++));
309 } while (priv->periodic_cyc > 0xFFFF);
311 if (priv->ps > FTM_PS_MAX) {
312 pr_err("ftm: the prescaler is %lu > %d\n",
313 priv->ps, FTM_PS_MAX);
320 static void __init ftm_timer_init(struct device_node *np)
325 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
329 priv->clkevt_base = of_iomap(np, 0);
330 if (!priv->clkevt_base) {
331 pr_err("ftm: unable to map event timer registers\n");
335 priv->clksrc_base = of_iomap(np, 1);
336 if (!priv->clksrc_base) {
337 pr_err("ftm: unable to map source timer registers\n");
341 irq = irq_of_parse_and_map(np, 0);
343 pr_err("ftm: unable to get IRQ from DT, %d\n", irq);
347 priv->big_endian = of_property_read_bool(np, "big-endian");
349 freq = ftm_clk_init(np);
353 if (ftm_calc_closest_round_cyc(freq))
356 if (ftm_clocksource_init(freq))
359 if (ftm_clockevent_init(freq, irq))
367 CLOCKSOURCE_OF_DECLARE(flextimer, "fsl,ftm-timer", ftm_timer_init);