2 * MOXA ART SoCs timer handling.
4 * Copyright (C) 2013 Jonas Jensen
6 * Jonas Jensen <jonas.jensen@gmail.com>
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
13 #include <linux/clk.h>
14 #include <linux/clockchips.h>
15 #include <linux/interrupt.h>
16 #include <linux/irq.h>
17 #include <linux/irqreturn.h>
19 #include <linux/of_address.h>
20 #include <linux/of_irq.h>
22 #include <linux/clocksource.h>
23 #include <linux/bitops.h>
25 #define TIMER1_BASE 0x00
26 #define TIMER2_BASE 0x10
27 #define TIMER3_BASE 0x20
29 #define REG_COUNT 0x0 /* writable */
31 #define REG_MATCH1 0x8
32 #define REG_MATCH2 0xC
35 #define TIMER_INTR_STATE 0x34
36 #define TIMER_INTR_MASK 0x38
41 * TIMEREG_CR_*_CLOCK 0: PCLK, 1: EXT1CLK
42 * TIMEREG_CR_*_INT overflow interrupt enable bit
44 #define TIMEREG_CR_1_ENABLE BIT(0)
45 #define TIMEREG_CR_1_CLOCK BIT(1)
46 #define TIMEREG_CR_1_INT BIT(2)
47 #define TIMEREG_CR_2_ENABLE BIT(3)
48 #define TIMEREG_CR_2_CLOCK BIT(4)
49 #define TIMEREG_CR_2_INT BIT(5)
50 #define TIMEREG_CR_3_ENABLE BIT(6)
51 #define TIMEREG_CR_3_CLOCK BIT(7)
52 #define TIMEREG_CR_3_INT BIT(8)
53 #define TIMEREG_CR_COUNT_UP BIT(9)
55 #define TIMER1_ENABLE (TIMEREG_CR_2_ENABLE | TIMEREG_CR_1_ENABLE)
56 #define TIMER1_DISABLE (TIMEREG_CR_2_ENABLE)
58 static void __iomem *base;
59 static unsigned int clock_count_per_tick;
61 static inline void moxart_disable(struct clock_event_device *evt)
63 writel(TIMER1_DISABLE, base + TIMER_CR);
66 static inline void moxart_enable(struct clock_event_device *evt)
68 writel(TIMER1_ENABLE, base + TIMER_CR);
71 static int moxart_shutdown(struct clock_event_device *evt)
77 static int moxart_set_oneshot(struct clock_event_device *evt)
80 writel(~0, base + TIMER1_BASE + REG_LOAD);
84 static int moxart_set_periodic(struct clock_event_device *evt)
86 writel(clock_count_per_tick, base + TIMER1_BASE + REG_LOAD);
91 static int moxart_clkevt_next_event(unsigned long cycles,
92 struct clock_event_device *evt)
98 u = readl(base + TIMER1_BASE + REG_COUNT) - cycles;
99 writel(u, base + TIMER1_BASE + REG_MATCH1);
106 static struct clock_event_device moxart_clockevent = {
107 .name = "moxart_timer",
109 .features = CLOCK_EVT_FEAT_PERIODIC |
110 CLOCK_EVT_FEAT_ONESHOT,
111 .set_state_shutdown = moxart_shutdown,
112 .set_state_periodic = moxart_set_periodic,
113 .set_state_oneshot = moxart_set_oneshot,
114 .tick_resume = moxart_set_oneshot,
115 .set_next_event = moxart_clkevt_next_event,
118 static irqreturn_t moxart_timer_interrupt(int irq, void *dev_id)
120 struct clock_event_device *evt = dev_id;
121 evt->event_handler(evt);
125 static struct irqaction moxart_timer_irq = {
126 .name = "moxart-timer",
128 .handler = moxart_timer_interrupt,
129 .dev_id = &moxart_clockevent,
132 static int __init moxart_timer_init(struct device_node *node)
138 base = of_iomap(node, 0);
140 pr_err("%s: of_iomap failed\n", node->full_name);
144 irq = irq_of_parse_and_map(node, 0);
146 pr_err("%s: irq_of_parse_and_map failed\n", node->full_name);
150 ret = setup_irq(irq, &moxart_timer_irq);
152 pr_err("%s: setup_irq failed\n", node->full_name);
156 clk = of_clk_get(node, 0);
158 pr_err("%s: of_clk_get failed\n", node->full_name);
162 pclk = clk_get_rate(clk);
164 ret = clocksource_mmio_init(base + TIMER2_BASE + REG_COUNT,
165 "moxart_timer", pclk, 200, 32,
166 clocksource_mmio_readl_down);
168 pr_err("%s: clocksource_mmio_init failed\n", node->full_name);
172 clock_count_per_tick = DIV_ROUND_CLOSEST(pclk, HZ);
174 writel(~0, base + TIMER2_BASE + REG_LOAD);
175 writel(TIMEREG_CR_2_ENABLE, base + TIMER_CR);
177 moxart_clockevent.cpumask = cpumask_of(0);
178 moxart_clockevent.irq = irq;
181 * documentation is not publicly available:
182 * min_delta / max_delta obtained by trial-and-error,
183 * max_delta 0xfffffffe should be ok because count
184 * register size is u32
186 clockevents_config_and_register(&moxart_clockevent, pclk,
191 CLOCKSOURCE_OF_DECLARE(moxart, "moxa,moxart-timer", moxart_timer_init);