drivers/cpufreq/cpufreq-cpu0.c

   1 /*
   2  * Copyright (C) 2012 Freescale Semiconductor, Inc.
   3  *
   4  * The OPP code in function cpu0_set_target() is reused from
   5  * drivers/cpufreq/omap-cpufreq.c
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
  13
  14 #include <linux/clk.h>
  15 #include <linux/cpufreq.h>
  16 #include <linux/err.h>
  17 #include <linux/module.h>
  18 #include <linux/of.h>
  19 #include <linux/opp.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/regulator/consumer.h>
  22 #include <linux/slab.h>
  23
  24 static unsigned int transition_latency;
  25 static unsigned int voltage_tolerance; /* in percentage */
  26
  27 static struct device *cpu_dev;
  28 static struct clk *cpu_clk;
  29 static struct regulator *cpu_reg;
  30 static struct cpufreq_frequency_table *freq_table;
  31
  32 static int cpu0_verify_speed(struct cpufreq_policy *policy)
  33 {
  34         return cpufreq_frequency_table_verify(policy, freq_table);
  35 }
  36
  37 static unsigned int cpu0_get_speed(unsigned int cpu)
  38 {
  39         return clk_get_rate(cpu_clk) / 1000;
  40 }
  41
  42 static int cpu0_set_target(struct cpufreq_policy *policy,
  43                            unsigned int target_freq, unsigned int relation)
  44 {
  45         struct cpufreq_freqs freqs;
  46         struct opp *opp;
  47         unsigned long freq_Hz, volt = 0, volt_old = 0, tol = 0;
  48         unsigned int index, cpu;
  49         int ret;
  50
  51         ret = cpufreq_frequency_table_target(policy, freq_table, target_freq,
  52                                              relation, &index);
  53         if (ret) {
  54                 pr_err("failed to match target freqency %d: %d\n",
  55                        target_freq, ret);
  56                 return ret;
  57         }
  58
  59         freq_Hz = clk_round_rate(cpu_clk, freq_table[index].frequency * 1000);
  60         if (freq_Hz < 0)
  61                 freq_Hz = freq_table[index].frequency * 1000;
  62         freqs.new = freq_Hz / 1000;
  63         freqs.old = clk_get_rate(cpu_clk) / 1000;
  64
  65         if (freqs.old == freqs.new)
  66                 return 0;
  67
  68         for_each_online_cpu(cpu) {
  69                 freqs.cpu = cpu;
  70                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  71         }
  72
  73         if (cpu_reg) {
  74                 rcu_read_lock();
  75                 opp = opp_find_freq_ceil(cpu_dev, &freq_Hz);
  76                 if (IS_ERR(opp)) {
  77                         rcu_read_unlock();
  78                         pr_err("failed to find OPP for %ld\n", freq_Hz);
  79                         return PTR_ERR(opp);
  80                 }
  81                 volt = opp_get_voltage(opp);
  82                 rcu_read_unlock();
  83                 tol = volt * voltage_tolerance / 100;
  84                 volt_old = regulator_get_voltage(cpu_reg);
  85         }
  86
  87         pr_debug("%u MHz, %ld mV --> %u MHz, %ld mV\n",
  88                  freqs.old / 1000, volt_old ? volt_old / 1000 : -1,
  89                  freqs.new / 1000, volt ? volt / 1000 : -1);
  90
  91         /* scaling up?  scale voltage before frequency */
  92         if (cpu_reg && freqs.new > freqs.old) {
  93                 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
  94                 if (ret) {
  95                         pr_err("failed to scale voltage up: %d\n", ret);
  96                         freqs.new = freqs.old;
  97                         return ret;
  98                 }
  99         }
 100
 101         ret = clk_set_rate(cpu_clk, freqs.new * 1000);
 102         if (ret) {
 103                 pr_err("failed to set clock rate: %d\n", ret);
 104                 if (cpu_reg)
 105                         regulator_set_voltage_tol(cpu_reg, volt_old, tol);
 106                 return ret;
 107         }
 108
 109         /* scaling down?  scale voltage after frequency */
 110         if (cpu_reg && freqs.new < freqs.old) {
 111                 ret = regulator_set_voltage_tol(cpu_reg, volt, tol);
 112                 if (ret) {
 113                         pr_err("failed to scale voltage down: %d\n", ret);
 114                         clk_set_rate(cpu_clk, freqs.old * 1000);
 115                         freqs.new = freqs.old;
 116                         return ret;
 117                 }
 118         }
 119
 120         for_each_online_cpu(cpu) {
 121                 freqs.cpu = cpu;
 122                 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 123         }
 124
 125         return 0;
 126 }
 127
 128 static int cpu0_cpufreq_init(struct cpufreq_policy *policy)
 129 {
 130         int ret;
 131
 132         if (policy->cpu != 0)
 133                 return -EINVAL;
 134
 135         ret = cpufreq_frequency_table_cpuinfo(policy, freq_table);
 136         if (ret) {
 137                 pr_err("invalid frequency table: %d\n", ret);
 138                 return ret;
 139         }
 140
 141         policy->cpuinfo.transition_latency = transition_latency;
 142         policy->cur = clk_get_rate(cpu_clk) / 1000;
 143
 144         /*
 145          * The driver only supports the SMP configuartion where all processors
 146          * share the clock and voltage and clock.  Use cpufreq affected_cpus
 147          * interface to have all CPUs scaled together.
 148          */
 149         cpumask_setall(policy->cpus);
 150
 151         cpufreq_frequency_table_get_attr(freq_table, policy->cpu);
 152
 153         return 0;
 154 }
 155
 156 static int cpu0_cpufreq_exit(struct cpufreq_policy *policy)
 157 {
 158         cpufreq_frequency_table_put_attr(policy->cpu);
 159
 160         return 0;
 161 }
 162
 163 static struct freq_attr *cpu0_cpufreq_attr[] = {
 164         &cpufreq_freq_attr_scaling_available_freqs,
 165         NULL,
 166 };
 167
 168 static struct cpufreq_driver cpu0_cpufreq_driver = {
 169         .flags = CPUFREQ_STICKY,
 170         .verify = cpu0_verify_speed,
 171         .target = cpu0_set_target,
 172         .get = cpu0_get_speed,
 173         .init = cpu0_cpufreq_init,
 174         .exit = cpu0_cpufreq_exit,
 175         .name = "generic_cpu0",
 176         .attr = cpu0_cpufreq_attr,
 177 };
 178
 179 static int cpu0_cpufreq_probe(struct platform_device *pdev)
 180 {
 181         struct device_node *np, *parent;
 182         int ret;
 183
 184         parent = of_find_node_by_path("/cpus");
 185         if (!parent) {
 186                 pr_err("failed to find OF /cpus\n");
 187                 return -ENOENT;
 188         }
 189
 190         for_each_child_of_node(parent, np) {
 191                 if (of_get_property(np, "operating-points", NULL))
 192                         break;
 193         }
 194
 195         if (!np) {
 196                 pr_err("failed to find cpu0 node\n");
 197                 return -ENOENT;
 198         }
 199
 200         cpu_dev = &pdev->dev;
 201         cpu_dev->of_node = np;
 202
 203         cpu_clk = devm_clk_get(cpu_dev, NULL);
 204         if (IS_ERR(cpu_clk)) {
 205                 ret = PTR_ERR(cpu_clk);
 206                 pr_err("failed to get cpu0 clock: %d\n", ret);
 207                 goto out_put_node;
 208         }
 209
 210         cpu_reg = devm_regulator_get(cpu_dev, "cpu0");
 211         if (IS_ERR(cpu_reg)) {
 212                 pr_warn("failed to get cpu0 regulator\n");
 213                 cpu_reg = NULL;
 214         }
 215
 216         ret = of_init_opp_table(cpu_dev);
 217         if (ret) {
 218                 pr_err("failed to init OPP table: %d\n", ret);
 219                 goto out_put_node;
 220         }
 221
 222         ret = opp_init_cpufreq_table(cpu_dev, &freq_table);
 223         if (ret) {
 224                 pr_err("failed to init cpufreq table: %d\n", ret);
 225                 goto out_put_node;
 226         }
 227
 228         of_property_read_u32(np, "voltage-tolerance", &voltage_tolerance);
 229
 230         if (of_property_read_u32(np, "clock-latency", &transition_latency))
 231                 transition_latency = CPUFREQ_ETERNAL;
 232
 233         if (cpu_reg) {
 234                 struct opp *opp;
 235                 unsigned long min_uV, max_uV;
 236                 int i;
 237
 238                 /*
 239                  * OPP is maintained in order of increasing frequency, and
 240                  * freq_table initialised from OPP is therefore sorted in the
 241                  * same order.
 242                  */
 243                 for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++)
 244                         ;
 245                 rcu_read_lock();
 246                 opp = opp_find_freq_exact(cpu_dev,
 247                                 freq_table[0].frequency * 1000, true);
 248                 min_uV = opp_get_voltage(opp);
 249                 opp = opp_find_freq_exact(cpu_dev,
 250                                 freq_table[i-1].frequency * 1000, true);
 251                 max_uV = opp_get_voltage(opp);
 252                 rcu_read_unlock();
 253                 ret = regulator_set_voltage_time(cpu_reg, min_uV, max_uV);
 254                 if (ret > 0)
 255                         transition_latency += ret * 1000;
 256         }
 257
 258         ret = cpufreq_register_driver(&cpu0_cpufreq_driver);
 259         if (ret) {
 260                 pr_err("failed register driver: %d\n", ret);
 261                 goto out_free_table;
 262         }
 263
 264         of_node_put(np);
 265         return 0;
 266
 267 out_free_table:
 268         opp_free_cpufreq_table(cpu_dev, &freq_table);
 269 out_put_node:
 270         of_node_put(np);
 271         return ret;
 272 }
 273
 274 static int cpu0_cpufreq_remove(struct platform_device *pdev)
 275 {
 276         cpufreq_unregister_driver(&cpu0_cpufreq_driver);
 277         opp_free_cpufreq_table(cpu_dev, &freq_table);
 278
 279         return 0;
 280 }
 281
 282 static struct platform_driver cpu0_cpufreq_platdrv = {
 283         .driver = {
 284                 .name   = "cpufreq-cpu0",
 285                 .owner  = THIS_MODULE,
 286         },
 287         .probe          = cpu0_cpufreq_probe,
 288         .remove         = cpu0_cpufreq_remove,
 289 };
 290 module_platform_driver(cpu0_cpufreq_platdrv);
 291
 292 MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
 293 MODULE_DESCRIPTION("Generic CPU0 cpufreq driver");
 294 MODULE_LICENSE("GPL");