2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
5 * EXYNOS - CPU frequency scaling support for EXYNOS series
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/err.h>
14 #include <linux/clk.h>
16 #include <linux/slab.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/cpufreq.h>
19 #include <linux/suspend.h>
21 #include <mach/cpufreq.h>
25 static struct exynos_dvfs_info *exynos_info;
27 static struct regulator *arm_regulator;
28 static struct cpufreq_freqs freqs;
30 static unsigned int locking_frequency;
31 static bool frequency_locked;
32 static DEFINE_MUTEX(cpufreq_lock);
34 static int exynos_verify_speed(struct cpufreq_policy *policy)
36 return cpufreq_frequency_table_verify(policy,
37 exynos_info->freq_table);
40 static unsigned int exynos_getspeed(unsigned int cpu)
42 return clk_get_rate(exynos_info->cpu_clk) / 1000;
45 static int exynos_cpufreq_get_index(unsigned int freq)
47 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
51 freq_table[index].frequency != CPUFREQ_TABLE_END; index++)
52 if (freq_table[index].frequency == freq)
55 if (freq_table[index].frequency == CPUFREQ_TABLE_END)
61 static int exynos_cpufreq_scale(unsigned int target_freq)
63 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
64 unsigned int *volt_table = exynos_info->volt_table;
65 struct cpufreq_policy *policy = cpufreq_cpu_get(0);
66 unsigned int arm_volt, safe_arm_volt = 0;
67 unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz;
68 unsigned int index, old_index;
71 freqs.old = policy->cur;
72 freqs.cpu = policy->cpu;
74 if (target_freq == freqs.old)
78 * The policy max have been changed so that we cannot get proper
79 * old_index with cpufreq_frequency_table_target(). Thus, ignore
80 * policy and get the index from the raw freqeuncy table.
82 old_index = exynos_cpufreq_get_index(freqs.old);
88 index = exynos_cpufreq_get_index(target_freq);
95 * ARM clock source will be changed APLL to MPLL temporary
96 * To support this level, need to control regulator for
97 * required voltage level
99 if (exynos_info->need_apll_change != NULL) {
100 if (exynos_info->need_apll_change(old_index, index) &&
101 (freq_table[index].frequency < mpll_freq_khz) &&
102 (freq_table[old_index].frequency < mpll_freq_khz))
103 safe_arm_volt = volt_table[exynos_info->pll_safe_idx];
105 arm_volt = volt_table[index];
107 for_each_cpu(freqs.cpu, policy->cpus)
108 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
110 /* When the new frequency is higher than current frequency */
111 if ((freqs.new > freqs.old) && !safe_arm_volt) {
112 /* Firstly, voltage up to increase frequency */
113 ret = regulator_set_voltage(arm_regulator, arm_volt, arm_volt);
115 pr_err("%s: failed to set cpu voltage to %d\n",
122 ret = regulator_set_voltage(arm_regulator, safe_arm_volt,
125 pr_err("%s: failed to set cpu voltage to %d\n",
126 __func__, safe_arm_volt);
131 exynos_info->set_freq(old_index, index);
133 for_each_cpu(freqs.cpu, policy->cpus)
134 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
136 /* When the new frequency is lower than current frequency */
137 if ((freqs.new < freqs.old) ||
138 ((freqs.new > freqs.old) && safe_arm_volt)) {
139 /* down the voltage after frequency change */
140 regulator_set_voltage(arm_regulator, arm_volt,
143 pr_err("%s: failed to set cpu voltage to %d\n",
151 cpufreq_cpu_put(policy);
156 static int exynos_target(struct cpufreq_policy *policy,
157 unsigned int target_freq,
158 unsigned int relation)
160 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
164 mutex_lock(&cpufreq_lock);
166 if (frequency_locked)
169 if (cpufreq_frequency_table_target(policy, freq_table,
170 target_freq, relation, &index)) {
175 freqs.new = freq_table[index].frequency;
177 ret = exynos_cpufreq_scale(freqs.new);
180 mutex_unlock(&cpufreq_lock);
186 static int exynos_cpufreq_suspend(struct cpufreq_policy *policy)
191 static int exynos_cpufreq_resume(struct cpufreq_policy *policy)
198 * exynos_cpufreq_pm_notifier - block CPUFREQ's activities in suspend-resume
204 * While frequency_locked == true, target() ignores every frequency but
205 * locking_frequency. The locking_frequency value is the initial frequency,
206 * which is set by the bootloader. In order to eliminate possible
207 * inconsistency in clock values, we save and restore frequencies during
208 * suspend and resume and block CPUFREQ activities. Note that the standard
209 * suspend/resume cannot be used as they are too deep (syscore_ops) for
212 static int exynos_cpufreq_pm_notifier(struct notifier_block *notifier,
213 unsigned long pm_event, void *v)
218 case PM_SUSPEND_PREPARE:
219 mutex_lock(&cpufreq_lock);
220 frequency_locked = true;
221 mutex_unlock(&cpufreq_lock);
223 ret = exynos_cpufreq_scale(locking_frequency);
229 case PM_POST_SUSPEND:
230 mutex_lock(&cpufreq_lock);
231 frequency_locked = false;
232 mutex_unlock(&cpufreq_lock);
239 static struct notifier_block exynos_cpufreq_nb = {
240 .notifier_call = exynos_cpufreq_pm_notifier,
243 static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
245 policy->cur = policy->min = policy->max = exynos_getspeed(policy->cpu);
247 cpufreq_frequency_table_get_attr(exynos_info->freq_table, policy->cpu);
249 locking_frequency = exynos_getspeed(0);
251 /* set the transition latency value */
252 policy->cpuinfo.transition_latency = 100000;
255 * EXYNOS4 multi-core processors has 2 cores
256 * that the frequency cannot be set independently.
257 * Each cpu is bound to the same speed.
258 * So the affected cpu is all of the cpus.
260 if (num_online_cpus() == 1) {
261 cpumask_copy(policy->related_cpus, cpu_possible_mask);
262 cpumask_copy(policy->cpus, cpu_online_mask);
264 policy->shared_type = CPUFREQ_SHARED_TYPE_ANY;
265 cpumask_setall(policy->cpus);
268 return cpufreq_frequency_table_cpuinfo(policy, exynos_info->freq_table);
271 static struct cpufreq_driver exynos_driver = {
272 .flags = CPUFREQ_STICKY,
273 .verify = exynos_verify_speed,
274 .target = exynos_target,
275 .get = exynos_getspeed,
276 .init = exynos_cpufreq_cpu_init,
277 .name = "exynos_cpufreq",
279 .suspend = exynos_cpufreq_suspend,
280 .resume = exynos_cpufreq_resume,
284 static int __init exynos_cpufreq_init(void)
288 exynos_info = kzalloc(sizeof(struct exynos_dvfs_info), GFP_KERNEL);
292 if (soc_is_exynos4210())
293 ret = exynos4210_cpufreq_init(exynos_info);
294 else if (soc_is_exynos4212() || soc_is_exynos4412())
295 ret = exynos4x12_cpufreq_init(exynos_info);
296 else if (soc_is_exynos5250())
297 ret = exynos5250_cpufreq_init(exynos_info);
299 pr_err("%s: CPU type not found\n", __func__);
304 if (exynos_info->set_freq == NULL) {
305 pr_err("%s: No set_freq function (ERR)\n", __func__);
309 arm_regulator = regulator_get(NULL, "vdd_arm");
310 if (IS_ERR(arm_regulator)) {
311 pr_err("%s: failed to get resource vdd_arm\n", __func__);
315 register_pm_notifier(&exynos_cpufreq_nb);
317 if (cpufreq_register_driver(&exynos_driver)) {
318 pr_err("%s: failed to register cpufreq driver\n", __func__);
324 unregister_pm_notifier(&exynos_cpufreq_nb);
326 regulator_put(arm_regulator);
329 pr_debug("%s: failed initialization\n", __func__);
332 late_initcall(exynos_cpufreq_init);