2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
5 * EXYNOS - CPU frequency scaling support for EXYNOS series
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/err.h>
14 #include <linux/clk.h>
16 #include <linux/slab.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/cpufreq.h>
19 #include <linux/suspend.h>
21 #include <mach/cpufreq.h>
25 static struct exynos_dvfs_info *exynos_info;
27 static struct regulator *arm_regulator;
28 static struct cpufreq_freqs freqs;
30 static unsigned int locking_frequency;
31 static bool frequency_locked;
32 static DEFINE_MUTEX(cpufreq_lock);
34 static int exynos_verify_speed(struct cpufreq_policy *policy)
36 return cpufreq_frequency_table_verify(policy,
37 exynos_info->freq_table);
40 static unsigned int exynos_getspeed(unsigned int cpu)
42 return clk_get_rate(exynos_info->cpu_clk) / 1000;
45 static int exynos_target(struct cpufreq_policy *policy,
46 unsigned int target_freq,
47 unsigned int relation)
49 unsigned int index, old_index;
50 unsigned int arm_volt, safe_arm_volt = 0;
52 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
53 unsigned int *volt_table = exynos_info->volt_table;
54 unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz;
56 mutex_lock(&cpufreq_lock);
58 freqs.old = policy->cur;
60 if (frequency_locked && target_freq != locking_frequency) {
66 * The policy max have been changed so that we cannot get proper
67 * old_index with cpufreq_frequency_table_target(). Thus, ignore
68 * policy and get the index from the raw freqeuncy table.
71 freq_table[old_index].frequency != CPUFREQ_TABLE_END;
73 if (freq_table[old_index].frequency == freqs.old)
76 if (freq_table[old_index].frequency == CPUFREQ_TABLE_END) {
81 if (cpufreq_frequency_table_target(policy, freq_table,
82 target_freq, relation, &index)) {
87 freqs.new = freq_table[index].frequency;
88 freqs.cpu = policy->cpu;
90 if (freqs.new == freqs.old)
94 * ARM clock source will be changed APLL to MPLL temporary
95 * To support this level, need to control regulator for
96 * required voltage level
98 if (exynos_info->need_apll_change != NULL) {
99 if (exynos_info->need_apll_change(old_index, index) &&
100 (freq_table[index].frequency < mpll_freq_khz) &&
101 (freq_table[old_index].frequency < mpll_freq_khz))
102 safe_arm_volt = volt_table[exynos_info->pll_safe_idx];
104 arm_volt = volt_table[index];
106 for_each_cpu(freqs.cpu, policy->cpus)
107 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
109 /* When the new frequency is higher than current frequency */
110 if ((freqs.new > freqs.old) && !safe_arm_volt) {
111 /* Firstly, voltage up to increase frequency */
112 regulator_set_voltage(arm_regulator, arm_volt,
117 regulator_set_voltage(arm_regulator, safe_arm_volt,
120 exynos_info->set_freq(old_index, index);
122 for_each_cpu(freqs.cpu, policy->cpus)
123 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
125 /* When the new frequency is lower than current frequency */
126 if ((freqs.new < freqs.old) ||
127 ((freqs.new > freqs.old) && safe_arm_volt)) {
128 /* down the voltage after frequency change */
129 regulator_set_voltage(arm_regulator, arm_volt,
134 mutex_unlock(&cpufreq_lock);
140 static int exynos_cpufreq_suspend(struct cpufreq_policy *policy)
145 static int exynos_cpufreq_resume(struct cpufreq_policy *policy)
152 * exynos_cpufreq_pm_notifier - block CPUFREQ's activities in suspend-resume
158 * While frequency_locked == true, target() ignores every frequency but
159 * locking_frequency. The locking_frequency value is the initial frequency,
160 * which is set by the bootloader. In order to eliminate possible
161 * inconsistency in clock values, we save and restore frequencies during
162 * suspend and resume and block CPUFREQ activities. Note that the standard
163 * suspend/resume cannot be used as they are too deep (syscore_ops) for
166 static int exynos_cpufreq_pm_notifier(struct notifier_block *notifier,
167 unsigned long pm_event, void *v)
169 struct cpufreq_policy *policy = cpufreq_cpu_get(0); /* boot CPU */
170 static unsigned int saved_frequency;
173 mutex_lock(&cpufreq_lock);
175 case PM_SUSPEND_PREPARE:
176 if (frequency_locked)
179 frequency_locked = true;
181 if (locking_frequency) {
182 saved_frequency = exynos_getspeed(0);
184 mutex_unlock(&cpufreq_lock);
185 exynos_target(policy, locking_frequency,
187 mutex_lock(&cpufreq_lock);
191 case PM_POST_SUSPEND:
192 if (saved_frequency) {
194 * While frequency_locked, only locking_frequency
195 * is valid for target(). In order to use
196 * saved_frequency while keeping frequency_locked,
197 * we temporarly overwrite locking_frequency.
199 temp = locking_frequency;
200 locking_frequency = saved_frequency;
202 mutex_unlock(&cpufreq_lock);
203 exynos_target(policy, locking_frequency,
205 mutex_lock(&cpufreq_lock);
207 locking_frequency = temp;
209 frequency_locked = false;
213 mutex_unlock(&cpufreq_lock);
218 static struct notifier_block exynos_cpufreq_nb = {
219 .notifier_call = exynos_cpufreq_pm_notifier,
222 static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
224 policy->cur = policy->min = policy->max = exynos_getspeed(policy->cpu);
226 cpufreq_frequency_table_get_attr(exynos_info->freq_table, policy->cpu);
228 locking_frequency = exynos_getspeed(0);
230 /* set the transition latency value */
231 policy->cpuinfo.transition_latency = 100000;
234 * EXYNOS4 multi-core processors has 2 cores
235 * that the frequency cannot be set independently.
236 * Each cpu is bound to the same speed.
237 * So the affected cpu is all of the cpus.
239 if (num_online_cpus() == 1) {
240 cpumask_copy(policy->related_cpus, cpu_possible_mask);
241 cpumask_copy(policy->cpus, cpu_online_mask);
243 policy->shared_type = CPUFREQ_SHARED_TYPE_ANY;
244 cpumask_setall(policy->cpus);
247 return cpufreq_frequency_table_cpuinfo(policy, exynos_info->freq_table);
250 static struct cpufreq_driver exynos_driver = {
251 .flags = CPUFREQ_STICKY,
252 .verify = exynos_verify_speed,
253 .target = exynos_target,
254 .get = exynos_getspeed,
255 .init = exynos_cpufreq_cpu_init,
256 .name = "exynos_cpufreq",
258 .suspend = exynos_cpufreq_suspend,
259 .resume = exynos_cpufreq_resume,
263 static int __init exynos_cpufreq_init(void)
267 exynos_info = kzalloc(sizeof(struct exynos_dvfs_info), GFP_KERNEL);
271 if (soc_is_exynos4210())
272 ret = exynos4210_cpufreq_init(exynos_info);
273 else if (soc_is_exynos4212() || soc_is_exynos4412())
274 ret = exynos4x12_cpufreq_init(exynos_info);
275 else if (soc_is_exynos5250())
276 ret = exynos5250_cpufreq_init(exynos_info);
278 pr_err("%s: CPU type not found\n", __func__);
283 if (exynos_info->set_freq == NULL) {
284 pr_err("%s: No set_freq function (ERR)\n", __func__);
288 arm_regulator = regulator_get(NULL, "vdd_arm");
289 if (IS_ERR(arm_regulator)) {
290 pr_err("%s: failed to get resource vdd_arm\n", __func__);
294 register_pm_notifier(&exynos_cpufreq_nb);
296 if (cpufreq_register_driver(&exynos_driver)) {
297 pr_err("%s: failed to register cpufreq driver\n", __func__);
303 unregister_pm_notifier(&exynos_cpufreq_nb);
305 regulator_put(arm_regulator);
308 pr_debug("%s: failed initialization\n", __func__);
311 late_initcall(exynos_cpufreq_init);