2 * intel_pstate.c: Native P state management for Intel processors
4 * (C) Copyright 2012 Intel Corporation
5 * Author: Dirk Brandewie <dirk.j.brandewie@intel.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
13 #include <linux/kernel.h>
14 #include <linux/kernel_stat.h>
15 #include <linux/module.h>
16 #include <linux/ktime.h>
17 #include <linux/hrtimer.h>
18 #include <linux/tick.h>
19 #include <linux/slab.h>
20 #include <linux/sched.h>
21 #include <linux/list.h>
22 #include <linux/cpu.h>
23 #include <linux/cpufreq.h>
24 #include <linux/sysfs.h>
25 #include <linux/types.h>
27 #include <linux/debugfs.h>
28 #include <linux/acpi.h>
29 #include <trace/events/power.h>
31 #include <asm/div64.h>
33 #include <asm/cpu_device_id.h>
35 #define BYT_RATIOS 0x66a
36 #define BYT_VIDS 0x66b
37 #define BYT_TURBO_RATIOS 0x66c
38 #define BYT_TURBO_VIDS 0x66d
42 #define int_tofp(X) ((int64_t)(X) << FRAC_BITS)
43 #define fp_toint(X) ((X) >> FRAC_BITS)
46 static inline int32_t mul_fp(int32_t x, int32_t y)
48 return ((int64_t)x * (int64_t)y) >> FRAC_BITS;
51 static inline int32_t div_fp(int32_t x, int32_t y)
53 return div_s64((int64_t)x << FRAC_BITS, (int64_t)y);
57 int32_t core_pct_busy;
91 struct timer_list timer;
93 struct pstate_data pstate;
97 ktime_t last_sample_time;
100 struct sample sample;
103 static struct cpudata **all_cpu_data;
104 struct pstate_adjust_policy {
113 struct pstate_funcs {
114 int (*get_max)(void);
115 int (*get_min)(void);
116 int (*get_turbo)(void);
117 void (*set)(struct cpudata*, int pstate);
118 void (*get_vid)(struct cpudata *);
121 struct cpu_defaults {
122 struct pstate_adjust_policy pid_policy;
123 struct pstate_funcs funcs;
126 static struct pstate_adjust_policy pid_params;
127 static struct pstate_funcs pstate_funcs;
140 static struct perf_limits limits = {
143 .max_perf = int_tofp(1),
146 .max_policy_pct = 100,
147 .max_sysfs_pct = 100,
150 static inline void pid_reset(struct _pid *pid, int setpoint, int busy,
151 int deadband, int integral) {
152 pid->setpoint = setpoint;
153 pid->deadband = deadband;
154 pid->integral = int_tofp(integral);
155 pid->last_err = int_tofp(setpoint) - int_tofp(busy);
158 static inline void pid_p_gain_set(struct _pid *pid, int percent)
160 pid->p_gain = div_fp(int_tofp(percent), int_tofp(100));
163 static inline void pid_i_gain_set(struct _pid *pid, int percent)
165 pid->i_gain = div_fp(int_tofp(percent), int_tofp(100));
168 static inline void pid_d_gain_set(struct _pid *pid, int percent)
171 pid->d_gain = div_fp(int_tofp(percent), int_tofp(100));
174 static signed int pid_calc(struct _pid *pid, int32_t busy)
177 int32_t pterm, dterm, fp_error;
178 int32_t integral_limit;
180 fp_error = int_tofp(pid->setpoint) - busy;
182 if (abs(fp_error) <= int_tofp(pid->deadband))
185 pterm = mul_fp(pid->p_gain, fp_error);
187 pid->integral += fp_error;
189 /* limit the integral term */
190 integral_limit = int_tofp(30);
191 if (pid->integral > integral_limit)
192 pid->integral = integral_limit;
193 if (pid->integral < -integral_limit)
194 pid->integral = -integral_limit;
196 dterm = mul_fp(pid->d_gain, fp_error - pid->last_err);
197 pid->last_err = fp_error;
199 result = pterm + mul_fp(pid->integral, pid->i_gain) + dterm;
200 result = result + (1 << (FRAC_BITS-1));
201 return (signed int)fp_toint(result);
204 static inline void intel_pstate_busy_pid_reset(struct cpudata *cpu)
206 pid_p_gain_set(&cpu->pid, pid_params.p_gain_pct);
207 pid_d_gain_set(&cpu->pid, pid_params.d_gain_pct);
208 pid_i_gain_set(&cpu->pid, pid_params.i_gain_pct);
217 static inline void intel_pstate_reset_all_pid(void)
220 for_each_online_cpu(cpu) {
221 if (all_cpu_data[cpu])
222 intel_pstate_busy_pid_reset(all_cpu_data[cpu]);
226 /************************** debugfs begin ************************/
227 static int pid_param_set(void *data, u64 val)
230 intel_pstate_reset_all_pid();
233 static int pid_param_get(void *data, u64 *val)
238 DEFINE_SIMPLE_ATTRIBUTE(fops_pid_param, pid_param_get,
239 pid_param_set, "%llu\n");
246 static struct pid_param pid_files[] = {
247 {"sample_rate_ms", &pid_params.sample_rate_ms},
248 {"d_gain_pct", &pid_params.d_gain_pct},
249 {"i_gain_pct", &pid_params.i_gain_pct},
250 {"deadband", &pid_params.deadband},
251 {"setpoint", &pid_params.setpoint},
252 {"p_gain_pct", &pid_params.p_gain_pct},
256 static struct dentry *debugfs_parent;
257 static void intel_pstate_debug_expose_params(void)
261 debugfs_parent = debugfs_create_dir("pstate_snb", NULL);
262 if (IS_ERR_OR_NULL(debugfs_parent))
264 while (pid_files[i].name) {
265 debugfs_create_file(pid_files[i].name, 0660,
266 debugfs_parent, pid_files[i].value,
272 /************************** debugfs end ************************/
274 /************************** sysfs begin ************************/
275 #define show_one(file_name, object) \
276 static ssize_t show_##file_name \
277 (struct kobject *kobj, struct attribute *attr, char *buf) \
279 return sprintf(buf, "%u\n", limits.object); \
282 static ssize_t store_no_turbo(struct kobject *a, struct attribute *b,
283 const char *buf, size_t count)
287 ret = sscanf(buf, "%u", &input);
290 limits.no_turbo = clamp_t(int, input, 0 , 1);
291 if (limits.turbo_disabled) {
292 pr_warn("Turbo disabled by BIOS or unavailable on processor\n");
293 limits.no_turbo = limits.turbo_disabled;
298 static ssize_t store_max_perf_pct(struct kobject *a, struct attribute *b,
299 const char *buf, size_t count)
303 ret = sscanf(buf, "%u", &input);
307 limits.max_sysfs_pct = clamp_t(int, input, 0 , 100);
308 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
309 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
313 static ssize_t store_min_perf_pct(struct kobject *a, struct attribute *b,
314 const char *buf, size_t count)
318 ret = sscanf(buf, "%u", &input);
321 limits.min_perf_pct = clamp_t(int, input, 0 , 100);
322 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
327 show_one(no_turbo, no_turbo);
328 show_one(max_perf_pct, max_perf_pct);
329 show_one(min_perf_pct, min_perf_pct);
331 define_one_global_rw(no_turbo);
332 define_one_global_rw(max_perf_pct);
333 define_one_global_rw(min_perf_pct);
335 static struct attribute *intel_pstate_attributes[] = {
342 static struct attribute_group intel_pstate_attr_group = {
343 .attrs = intel_pstate_attributes,
345 static struct kobject *intel_pstate_kobject;
347 static void intel_pstate_sysfs_expose_params(void)
351 intel_pstate_kobject = kobject_create_and_add("intel_pstate",
352 &cpu_subsys.dev_root->kobj);
353 BUG_ON(!intel_pstate_kobject);
354 rc = sysfs_create_group(intel_pstate_kobject,
355 &intel_pstate_attr_group);
359 /************************** sysfs end ************************/
360 static int byt_get_min_pstate(void)
363 rdmsrl(BYT_RATIOS, value);
364 return (value >> 8) & 0x7F;
367 static int byt_get_max_pstate(void)
370 rdmsrl(BYT_RATIOS, value);
371 return (value >> 16) & 0x7F;
374 static int byt_get_turbo_pstate(void)
377 rdmsrl(BYT_TURBO_RATIOS, value);
381 static void byt_set_pstate(struct cpudata *cpudata, int pstate)
388 if (limits.no_turbo && !limits.turbo_disabled)
391 vid_fp = cpudata->vid.min + mul_fp(
392 int_tofp(pstate - cpudata->pstate.min_pstate),
395 vid_fp = clamp_t(int32_t, vid_fp, cpudata->vid.min, cpudata->vid.max);
396 vid = fp_toint(vid_fp);
398 if (pstate > cpudata->pstate.max_pstate)
399 vid = cpudata->vid.turbo;
403 wrmsrl(MSR_IA32_PERF_CTL, val);
406 static void byt_get_vid(struct cpudata *cpudata)
411 rdmsrl(BYT_VIDS, value);
412 cpudata->vid.min = int_tofp((value >> 8) & 0x7f);
413 cpudata->vid.max = int_tofp((value >> 16) & 0x7f);
414 cpudata->vid.ratio = div_fp(
415 cpudata->vid.max - cpudata->vid.min,
416 int_tofp(cpudata->pstate.max_pstate -
417 cpudata->pstate.min_pstate));
419 rdmsrl(BYT_TURBO_VIDS, value);
420 cpudata->vid.turbo = value & 0x7f;
424 static int core_get_min_pstate(void)
427 rdmsrl(MSR_PLATFORM_INFO, value);
428 return (value >> 40) & 0xFF;
431 static int core_get_max_pstate(void)
434 rdmsrl(MSR_PLATFORM_INFO, value);
435 return (value >> 8) & 0xFF;
438 static int core_get_turbo_pstate(void)
442 rdmsrl(MSR_NHM_TURBO_RATIO_LIMIT, value);
443 nont = core_get_max_pstate();
444 ret = ((value) & 255);
450 static void core_set_pstate(struct cpudata *cpudata, int pstate)
455 if (limits.no_turbo && !limits.turbo_disabled)
458 wrmsrl_on_cpu(cpudata->cpu, MSR_IA32_PERF_CTL, val);
461 static struct cpu_defaults core_params = {
463 .sample_rate_ms = 10,
471 .get_max = core_get_max_pstate,
472 .get_min = core_get_min_pstate,
473 .get_turbo = core_get_turbo_pstate,
474 .set = core_set_pstate,
478 static struct cpu_defaults byt_params = {
480 .sample_rate_ms = 10,
488 .get_max = byt_get_max_pstate,
489 .get_min = byt_get_min_pstate,
490 .get_turbo = byt_get_turbo_pstate,
491 .set = byt_set_pstate,
492 .get_vid = byt_get_vid,
497 static void intel_pstate_get_min_max(struct cpudata *cpu, int *min, int *max)
499 int max_perf = cpu->pstate.turbo_pstate;
503 max_perf = cpu->pstate.max_pstate;
505 max_perf_adj = fp_toint(mul_fp(int_tofp(max_perf), limits.max_perf));
506 *max = clamp_t(int, max_perf_adj,
507 cpu->pstate.min_pstate, cpu->pstate.turbo_pstate);
509 min_perf = fp_toint(mul_fp(int_tofp(max_perf), limits.min_perf));
510 *min = clamp_t(int, min_perf,
511 cpu->pstate.min_pstate, max_perf);
514 static void intel_pstate_set_pstate(struct cpudata *cpu, int pstate)
516 int max_perf, min_perf;
518 intel_pstate_get_min_max(cpu, &min_perf, &max_perf);
520 pstate = clamp_t(int, pstate, min_perf, max_perf);
522 if (pstate == cpu->pstate.current_pstate)
525 trace_cpu_frequency(pstate * 100000, cpu->cpu);
527 cpu->pstate.current_pstate = pstate;
529 pstate_funcs.set(cpu, pstate);
532 static inline void intel_pstate_pstate_increase(struct cpudata *cpu, int steps)
535 target = cpu->pstate.current_pstate + steps;
537 intel_pstate_set_pstate(cpu, target);
540 static inline void intel_pstate_pstate_decrease(struct cpudata *cpu, int steps)
543 target = cpu->pstate.current_pstate - steps;
544 intel_pstate_set_pstate(cpu, target);
547 static void intel_pstate_get_cpu_pstates(struct cpudata *cpu)
549 cpu->pstate.min_pstate = pstate_funcs.get_min();
550 cpu->pstate.max_pstate = pstate_funcs.get_max();
551 cpu->pstate.turbo_pstate = pstate_funcs.get_turbo();
553 if (pstate_funcs.get_vid)
554 pstate_funcs.get_vid(cpu);
555 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate);
558 static inline void intel_pstate_calc_busy(struct cpudata *cpu)
560 struct sample *sample = &cpu->sample;
564 core_pct = int_tofp(sample->aperf) * int_tofp(100);
565 core_pct = div_u64_rem(core_pct, int_tofp(sample->mperf), &rem);
567 if ((rem << 1) >= int_tofp(sample->mperf))
570 sample->freq = fp_toint(
571 mul_fp(int_tofp(cpu->pstate.max_pstate * 1000), core_pct));
573 sample->core_pct_busy = (int32_t)core_pct;
576 static inline void intel_pstate_sample(struct cpudata *cpu)
580 rdmsrl(MSR_IA32_APERF, aperf);
581 rdmsrl(MSR_IA32_MPERF, mperf);
583 aperf = aperf >> FRAC_BITS;
584 mperf = mperf >> FRAC_BITS;
586 cpu->last_sample_time = cpu->sample.time;
587 cpu->sample.time = ktime_get();
588 cpu->sample.aperf = aperf;
589 cpu->sample.mperf = mperf;
590 cpu->sample.aperf -= cpu->prev_aperf;
591 cpu->sample.mperf -= cpu->prev_mperf;
593 intel_pstate_calc_busy(cpu);
595 cpu->prev_aperf = aperf;
596 cpu->prev_mperf = mperf;
599 static inline void intel_pstate_set_sample_time(struct cpudata *cpu)
601 int sample_time, delay;
603 sample_time = pid_params.sample_rate_ms;
604 delay = msecs_to_jiffies(sample_time);
605 mod_timer_pinned(&cpu->timer, jiffies + delay);
608 static inline int32_t intel_pstate_get_scaled_busy(struct cpudata *cpu)
610 int32_t core_busy, max_pstate, current_pstate, sample_ratio;
614 core_busy = cpu->sample.core_pct_busy;
615 max_pstate = int_tofp(cpu->pstate.max_pstate);
616 current_pstate = int_tofp(cpu->pstate.current_pstate);
617 core_busy = mul_fp(core_busy, div_fp(max_pstate, current_pstate));
619 sample_time = (pid_params.sample_rate_ms * USEC_PER_MSEC);
620 duration_us = (u32) ktime_us_delta(cpu->sample.time,
621 cpu->last_sample_time);
622 if (duration_us > sample_time * 3) {
623 sample_ratio = div_fp(int_tofp(sample_time),
624 int_tofp(duration_us));
625 core_busy = mul_fp(core_busy, sample_ratio);
631 static inline void intel_pstate_adjust_busy_pstate(struct cpudata *cpu)
639 busy_scaled = intel_pstate_get_scaled_busy(cpu);
641 ctl = pid_calc(pid, busy_scaled);
646 intel_pstate_pstate_increase(cpu, steps);
648 intel_pstate_pstate_decrease(cpu, steps);
651 static void intel_pstate_timer_func(unsigned long __data)
653 struct cpudata *cpu = (struct cpudata *) __data;
654 struct sample *sample;
656 intel_pstate_sample(cpu);
658 sample = &cpu->sample;
660 intel_pstate_adjust_busy_pstate(cpu);
662 trace_pstate_sample(fp_toint(sample->core_pct_busy),
663 fp_toint(intel_pstate_get_scaled_busy(cpu)),
664 cpu->pstate.current_pstate,
669 intel_pstate_set_sample_time(cpu);
672 #define ICPU(model, policy) \
673 { X86_VENDOR_INTEL, 6, model, X86_FEATURE_APERFMPERF,\
674 (unsigned long)&policy }
676 static const struct x86_cpu_id intel_pstate_cpu_ids[] = {
677 ICPU(0x2a, core_params),
678 ICPU(0x2d, core_params),
679 ICPU(0x37, byt_params),
680 ICPU(0x3a, core_params),
681 ICPU(0x3c, core_params),
682 ICPU(0x3d, core_params),
683 ICPU(0x3e, core_params),
684 ICPU(0x3f, core_params),
685 ICPU(0x45, core_params),
686 ICPU(0x46, core_params),
687 ICPU(0x4f, core_params),
688 ICPU(0x56, core_params),
691 MODULE_DEVICE_TABLE(x86cpu, intel_pstate_cpu_ids);
693 static int intel_pstate_init_cpu(unsigned int cpunum)
697 all_cpu_data[cpunum] = kzalloc(sizeof(struct cpudata), GFP_KERNEL);
698 if (!all_cpu_data[cpunum])
701 cpu = all_cpu_data[cpunum];
704 intel_pstate_get_cpu_pstates(cpu);
706 init_timer_deferrable(&cpu->timer);
707 cpu->timer.function = intel_pstate_timer_func;
710 cpu->timer.expires = jiffies + HZ/100;
711 intel_pstate_busy_pid_reset(cpu);
712 intel_pstate_sample(cpu);
714 add_timer_on(&cpu->timer, cpunum);
716 pr_info("Intel pstate controlling: cpu %d\n", cpunum);
721 static unsigned int intel_pstate_get(unsigned int cpu_num)
723 struct sample *sample;
726 cpu = all_cpu_data[cpu_num];
729 sample = &cpu->sample;
733 static int intel_pstate_set_policy(struct cpufreq_policy *policy)
737 cpu = all_cpu_data[policy->cpu];
739 if (!policy->cpuinfo.max_freq)
742 if (policy->policy == CPUFREQ_POLICY_PERFORMANCE) {
743 limits.min_perf_pct = 100;
744 limits.min_perf = int_tofp(1);
745 limits.max_perf_pct = 100;
746 limits.max_perf = int_tofp(1);
747 limits.no_turbo = limits.turbo_disabled;
750 limits.min_perf_pct = (policy->min * 100) / policy->cpuinfo.max_freq;
751 limits.min_perf_pct = clamp_t(int, limits.min_perf_pct, 0 , 100);
752 limits.min_perf = div_fp(int_tofp(limits.min_perf_pct), int_tofp(100));
754 limits.max_policy_pct = policy->max * 100 / policy->cpuinfo.max_freq;
755 limits.max_policy_pct = clamp_t(int, limits.max_policy_pct, 0 , 100);
756 limits.max_perf_pct = min(limits.max_policy_pct, limits.max_sysfs_pct);
757 limits.max_perf = div_fp(int_tofp(limits.max_perf_pct), int_tofp(100));
762 static int intel_pstate_verify_policy(struct cpufreq_policy *policy)
764 cpufreq_verify_within_cpu_limits(policy);
766 if ((policy->policy != CPUFREQ_POLICY_POWERSAVE) &&
767 (policy->policy != CPUFREQ_POLICY_PERFORMANCE))
773 static void intel_pstate_stop_cpu(struct cpufreq_policy *policy)
775 int cpu_num = policy->cpu;
776 struct cpudata *cpu = all_cpu_data[cpu_num];
778 pr_info("intel_pstate CPU %d exiting\n", cpu_num);
780 del_timer_sync(&all_cpu_data[cpu_num]->timer);
781 intel_pstate_set_pstate(cpu, cpu->pstate.min_pstate);
782 kfree(all_cpu_data[cpu_num]);
783 all_cpu_data[cpu_num] = NULL;
786 static int intel_pstate_cpu_init(struct cpufreq_policy *policy)
792 rc = intel_pstate_init_cpu(policy->cpu);
796 cpu = all_cpu_data[policy->cpu];
798 rdmsrl(MSR_IA32_MISC_ENABLE, misc_en);
799 if (misc_en & MSR_IA32_MISC_ENABLE_TURBO_DISABLE ||
800 cpu->pstate.max_pstate == cpu->pstate.turbo_pstate) {
801 limits.turbo_disabled = 1;
804 if (limits.min_perf_pct == 100 && limits.max_perf_pct == 100)
805 policy->policy = CPUFREQ_POLICY_PERFORMANCE;
807 policy->policy = CPUFREQ_POLICY_POWERSAVE;
809 policy->min = cpu->pstate.min_pstate * 100000;
810 policy->max = cpu->pstate.turbo_pstate * 100000;
812 /* cpuinfo and default policy values */
813 policy->cpuinfo.min_freq = cpu->pstate.min_pstate * 100000;
814 policy->cpuinfo.max_freq = cpu->pstate.turbo_pstate * 100000;
815 policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
816 cpumask_set_cpu(policy->cpu, policy->cpus);
821 static struct cpufreq_driver intel_pstate_driver = {
822 .flags = CPUFREQ_CONST_LOOPS,
823 .verify = intel_pstate_verify_policy,
824 .setpolicy = intel_pstate_set_policy,
825 .get = intel_pstate_get,
826 .init = intel_pstate_cpu_init,
827 .stop_cpu = intel_pstate_stop_cpu,
828 .name = "intel_pstate",
831 static int __initdata no_load;
833 static int intel_pstate_msrs_not_valid(void)
835 /* Check that all the msr's we are using are valid. */
836 u64 aperf, mperf, tmp;
838 rdmsrl(MSR_IA32_APERF, aperf);
839 rdmsrl(MSR_IA32_MPERF, mperf);
841 if (!pstate_funcs.get_max() ||
842 !pstate_funcs.get_min() ||
843 !pstate_funcs.get_turbo())
846 rdmsrl(MSR_IA32_APERF, tmp);
850 rdmsrl(MSR_IA32_MPERF, tmp);
857 static void copy_pid_params(struct pstate_adjust_policy *policy)
859 pid_params.sample_rate_ms = policy->sample_rate_ms;
860 pid_params.p_gain_pct = policy->p_gain_pct;
861 pid_params.i_gain_pct = policy->i_gain_pct;
862 pid_params.d_gain_pct = policy->d_gain_pct;
863 pid_params.deadband = policy->deadband;
864 pid_params.setpoint = policy->setpoint;
867 static void copy_cpu_funcs(struct pstate_funcs *funcs)
869 pstate_funcs.get_max = funcs->get_max;
870 pstate_funcs.get_min = funcs->get_min;
871 pstate_funcs.get_turbo = funcs->get_turbo;
872 pstate_funcs.set = funcs->set;
873 pstate_funcs.get_vid = funcs->get_vid;
876 #if IS_ENABLED(CONFIG_ACPI)
877 #include <acpi/processor.h>
879 static bool intel_pstate_no_acpi_pss(void)
883 for_each_possible_cpu(i) {
885 union acpi_object *pss;
886 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
887 struct acpi_processor *pr = per_cpu(processors, i);
892 status = acpi_evaluate_object(pr->handle, "_PSS", NULL, &buffer);
893 if (ACPI_FAILURE(status))
896 pss = buffer.pointer;
897 if (pss && pss->type == ACPI_TYPE_PACKAGE) {
908 struct hw_vendor_info {
910 char oem_id[ACPI_OEM_ID_SIZE];
911 char oem_table_id[ACPI_OEM_TABLE_ID_SIZE];
914 /* Hardware vendor-specific info that has its own power management modes */
915 static struct hw_vendor_info vendor_info[] = {
916 {1, "HP ", "ProLiant"},
920 static bool intel_pstate_platform_pwr_mgmt_exists(void)
922 struct acpi_table_header hdr;
923 struct hw_vendor_info *v_info;
926 || ACPI_FAILURE(acpi_get_table_header(ACPI_SIG_FADT, 0, &hdr)))
929 for (v_info = vendor_info; v_info->valid; v_info++) {
930 if (!strncmp(hdr.oem_id, v_info->oem_id, ACPI_OEM_ID_SIZE)
931 && !strncmp(hdr.oem_table_id, v_info->oem_table_id, ACPI_OEM_TABLE_ID_SIZE)
932 && intel_pstate_no_acpi_pss())
938 #else /* CONFIG_ACPI not enabled */
939 static inline bool intel_pstate_platform_pwr_mgmt_exists(void) { return false; }
940 #endif /* CONFIG_ACPI */
942 static int __init intel_pstate_init(void)
945 const struct x86_cpu_id *id;
946 struct cpu_defaults *cpu_info;
951 id = x86_match_cpu(intel_pstate_cpu_ids);
956 * The Intel pstate driver will be ignored if the platform
957 * firmware has its own power management modes.
959 if (intel_pstate_platform_pwr_mgmt_exists())
962 cpu_info = (struct cpu_defaults *)id->driver_data;
964 copy_pid_params(&cpu_info->pid_policy);
965 copy_cpu_funcs(&cpu_info->funcs);
967 if (intel_pstate_msrs_not_valid())
970 pr_info("Intel P-state driver initializing.\n");
972 all_cpu_data = vzalloc(sizeof(void *) * num_possible_cpus());
976 rc = cpufreq_register_driver(&intel_pstate_driver);
980 intel_pstate_debug_expose_params();
981 intel_pstate_sysfs_expose_params();
986 for_each_online_cpu(cpu) {
987 if (all_cpu_data[cpu]) {
988 del_timer_sync(&all_cpu_data[cpu]->timer);
989 kfree(all_cpu_data[cpu]);
997 device_initcall(intel_pstate_init);
999 static int __init intel_pstate_setup(char *str)
1004 if (!strcmp(str, "disable"))
1008 early_param("intel_pstate", intel_pstate_setup);
1010 MODULE_AUTHOR("Dirk Brandewie <dirk.j.brandewie@intel.com>");
1011 MODULE_DESCRIPTION("'intel_pstate' - P state driver Intel Core processors");
1012 MODULE_LICENSE("GPL");