drivers/crypto/caam/ctrl.c

   1 /*
   2  * CAAM control-plane driver backend
   3  * Controller-level driver, kernel property detection, initialization
   4  *
   5  * Copyright 2008-2015 Freescale Semiconductor, Inc.
   6  */
   7
   8 #include <linux/of_address.h>
   9 #include <linux/of_irq.h>
  10
  11 #include "compat.h"
  12 #include "regs.h"
  13 #include "intern.h"
  14 #include "jr.h"
  15 #include "desc_constr.h"
  16 #include "error.h"
  17 #include "ctrl.h"
  18 #include "sm.h"
  19
  20 /*
  21  * Descriptor to instantiate RNG State Handle 0 in normal mode and
  22  * load the JDKEK, TDKEK and TDSK registers
  23  */
  24 static void build_instantiation_desc(u32 *desc, int handle, int do_sk)
  25 {
  26         u32 *jump_cmd, op_flags;
  27
  28         init_job_desc(desc, 0);
  29
  30         op_flags = OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
  31                         (handle << OP_ALG_AAI_SHIFT) | OP_ALG_AS_INIT;
  32
  33         /* INIT RNG in non-test mode */
  34         append_operation(desc, op_flags);
  35
  36         if (!handle && do_sk) {
  37                 /*
  38                  * For SH0, Secure Keys must be generated as well
  39                  */
  40
  41                 /* wait for done */
  42                 jump_cmd = append_jump(desc, JUMP_CLASS_CLASS1);
  43                 set_jump_tgt_here(desc, jump_cmd);
  44
  45                 /*
  46                  * load 1 to clear written reg:
  47                  * resets the done interrrupt and returns the RNG to idle.
  48                  */
  49                 append_load_imm_u32(desc, 1, LDST_SRCDST_WORD_CLRW);
  50
  51                 /* Initialize State Handle  */
  52                 append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
  53                                  OP_ALG_AAI_RNG4_SK);
  54         }
  55
  56         append_jump(desc, JUMP_CLASS_CLASS1 | JUMP_TYPE_HALT);
  57 }
  58
  59 /* Descriptor for deinstantiation of State Handle 0 of the RNG block. */
  60 static void build_deinstantiation_desc(u32 *desc, int handle)
  61 {
  62         init_job_desc(desc, 0);
  63
  64         /* Uninstantiate State Handle 0 */
  65         append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
  66                          (handle << OP_ALG_AAI_SHIFT) | OP_ALG_AS_INITFINAL);
  67
  68         append_jump(desc, JUMP_CLASS_CLASS1 | JUMP_TYPE_HALT);
  69 }
  70
  71 /*
  72  * run_descriptor_deco0 - runs a descriptor on DECO0, under direct control of
  73  *                        the software (no JR/QI used).
  74  * @ctrldev - pointer to device
  75  * @status - descriptor status, after being run
  76  *
  77  * Return: - 0 if no error occurred
  78  *         - -ENODEV if the DECO couldn't be acquired
  79  *         - -EAGAIN if an error occurred while executing the descriptor
  80  */
  81 static inline int run_descriptor_deco0(struct device *ctrldev, u32 *desc,
  82                                         u32 *status)
  83 {
  84         struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctrldev);
  85         struct caam_full __iomem *topregs;
  86         unsigned int timeout = 100000;
  87         u32 deco_dbg_reg, flags;
  88         int i;
  89
  90         /* Set the bit to request direct access to DECO0 */
  91         topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
  92         setbits32(&topregs->ctrl.deco_rq, DECORR_RQD0ENABLE);
  93
  94         while (!(rd_reg32(&topregs->ctrl.deco_rq) & DECORR_DEN0) &&
  95                                                                  --timeout)
  96                 cpu_relax();
  97
  98         if (!timeout) {
  99                 dev_err(ctrldev, "failed to acquire DECO 0\n");
 100                 clrbits32(&topregs->ctrl.deco_rq, DECORR_RQD0ENABLE);
 101                 return -ENODEV;
 102         }
 103
 104         for (i = 0; i < desc_len(desc); i++)
 105                 wr_reg32(&topregs->deco.descbuf[i], *(desc + i));
 106
 107         flags = DECO_JQCR_WHL;
 108         /*
 109          * If the descriptor length is longer than 4 words, then the
 110          * FOUR bit in JRCTRL register must be set.
 111          */
 112         if (desc_len(desc) >= 4)
 113                 flags |= DECO_JQCR_FOUR;
 114
 115         /* Instruct the DECO to execute it */
 116         wr_reg32(&topregs->deco.jr_ctl_hi, flags);
 117
 118         timeout = 10000000;
 119         do {
 120                 deco_dbg_reg = rd_reg32(&topregs->deco.desc_dbg);
 121                 /*
 122                  * If an error occured in the descriptor, then
 123                  * the DECO status field will be set to 0x0D
 124                  */
 125                 if ((deco_dbg_reg & DESC_DBG_DECO_STAT_MASK) ==
 126                     DESC_DBG_DECO_STAT_HOST_ERR)
 127                         break;
 128                 cpu_relax();
 129         } while ((deco_dbg_reg & DESC_DBG_DECO_STAT_VALID) && --timeout);
 130
 131         *status = rd_reg32(&topregs->deco.op_status_hi) &
 132                   DECO_OP_STATUS_HI_ERR_MASK;
 133
 134         /* Mark the DECO as free */
 135         clrbits32(&topregs->ctrl.deco_rq, DECORR_RQD0ENABLE);
 136
 137         if (!timeout)
 138                 return -EAGAIN;
 139
 140         return 0;
 141 }
 142
 143 /*
 144  * instantiate_rng - builds and executes a descriptor on DECO0,
 145  *                   which initializes the RNG block.
 146  * @ctrldev - pointer to device
 147  * @state_handle_mask - bitmask containing the instantiation status
 148  *                      for the RNG4 state handles which exist in
 149  *                      the RNG4 block: 1 if it's been instantiated
 150  *                      by an external entry, 0 otherwise.
 151  * @gen_sk  - generate data to be loaded into the JDKEK, TDKEK and TDSK;
 152  *            Caution: this can be done only once; if the keys need to be
 153  *            regenerated, a POR is required
 154  *
 155  * Return: - 0 if no error occurred
 156  *         - -ENOMEM if there isn't enough memory to allocate the descriptor
 157  *         - -ENODEV if DECO0 couldn't be acquired
 158  *         - -EAGAIN if an error occurred when executing the descriptor
 159  *            f.i. there was a RNG hardware error due to not "good enough"
 160  *            entropy being aquired.
 161  */
 162 static int instantiate_rng(struct device *ctrldev, int state_handle_mask,
 163                            int gen_sk)
 164 {
 165         struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctrldev);
 166         struct caam_full __iomem *topregs;
 167         struct rng4tst __iomem *r4tst;
 168         u32 *desc, status, rdsta_val;
 169         int ret = 0, sh_idx;
 170
 171         topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
 172         r4tst = &topregs->ctrl.r4tst[0];
 173
 174         desc = kmalloc(CAAM_CMD_SZ * 7, GFP_KERNEL);
 175         if (!desc)
 176                 return -ENOMEM;
 177
 178         for (sh_idx = 0; sh_idx < RNG4_MAX_HANDLES; sh_idx++) {
 179                 /*
 180                  * If the corresponding bit is set, this state handle
 181                  * was initialized by somebody else, so it's left alone.
 182                  */
 183                 if ((1 << sh_idx) & state_handle_mask)
 184                         continue;
 185
 186                 /* Create the descriptor for instantiating RNG State Handle */
 187                 build_instantiation_desc(desc, sh_idx, gen_sk);
 188
 189                 /* Try to run it through DECO0 */
 190                 ret = run_descriptor_deco0(ctrldev, desc, &status);
 191
 192                 /*
 193                  * If ret is not 0, or descriptor status is not 0, then
 194                  * something went wrong. No need to try the next state
 195                  * handle (if available), bail out here.
 196                  * Also, if for some reason, the State Handle didn't get
 197                  * instantiated although the descriptor has finished
 198                  * without any error (HW optimizations for later
 199                  * CAAM eras), then try again.
 200                  */
 201                 rdsta_val =
 202                         rd_reg32(&topregs->ctrl.r4tst[0].rdsta) & RDSTA_IFMASK;
 203                 if (status || !(rdsta_val & (1 << sh_idx)))
 204                         ret = -EAGAIN;
 205                 if (ret)
 206                         break;
 207
 208                 dev_info(ctrldev, "Instantiated RNG4 SH%d\n", sh_idx);
 209                 /* Clear the contents before recreating the descriptor */
 210                 memset(desc, 0x00, CAAM_CMD_SZ * 7);
 211         }
 212
 213         kfree(desc);
 214
 215         return ret;
 216 }
 217
 218 /*
 219  * deinstantiate_rng - builds and executes a descriptor on DECO0,
 220  *                     which deinitializes the RNG block.
 221  * @ctrldev - pointer to device
 222  * @state_handle_mask - bitmask containing the instantiation status
 223  *                      for the RNG4 state handles which exist in
 224  *                      the RNG4 block: 1 if it's been instantiated
 225  *
 226  * Return: - 0 if no error occurred
 227  *         - -ENOMEM if there isn't enough memory to allocate the descriptor
 228  *         - -ENODEV if DECO0 couldn't be acquired
 229  *         - -EAGAIN if an error occurred when executing the descriptor
 230  */
 231 static int deinstantiate_rng(struct device *ctrldev, int state_handle_mask)
 232 {
 233         u32 *desc, status;
 234         int sh_idx, ret = 0;
 235
 236         desc = kmalloc(CAAM_CMD_SZ * 3, GFP_KERNEL);
 237         if (!desc)
 238                 return -ENOMEM;
 239
 240         for (sh_idx = 0; sh_idx < RNG4_MAX_HANDLES; sh_idx++) {
 241                 /*
 242                  * If the corresponding bit is set, then it means the state
 243                  * handle was initialized by us, and thus it needs to be
 244                  * deintialized as well
 245                  */
 246                 if ((1 << sh_idx) & state_handle_mask) {
 247                         /*
 248                          * Create the descriptor for deinstantating this state
 249                          * handle
 250                          */
 251                         build_deinstantiation_desc(desc, sh_idx);
 252
 253                         /* Try to run it through DECO0 */
 254                         ret = run_descriptor_deco0(ctrldev, desc, &status);
 255
 256                         if (ret || status) {
 257                                 dev_err(ctrldev,
 258                                         "Failed to deinstantiate RNG4 SH%d\n",
 259                                         sh_idx);
 260                                 break;
 261                         }
 262                         dev_info(ctrldev, "Deinstantiated RNG4 SH%d\n", sh_idx);
 263                 }
 264         }
 265
 266         kfree(desc);
 267
 268         return ret;
 269 }
 270
 271 static int caam_remove(struct platform_device *pdev)
 272 {
 273         struct device *ctrldev;
 274         struct caam_drv_private *ctrlpriv;
 275         struct caam_full __iomem *topregs;
 276         int ring, ret = 0;
 277
 278         ctrldev = &pdev->dev;
 279         ctrlpriv = dev_get_drvdata(ctrldev);
 280         topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
 281
 282         /* Remove platform devices for JobRs */
 283         for (ring = 0; ring < ctrlpriv->total_jobrs; ring++) {
 284                 if (ctrlpriv->jrpdev[ring])
 285                         of_device_unregister(ctrlpriv->jrpdev[ring]);
 286         }
 287
 288         /* De-initialize RNG state handles initialized by this driver. */
 289         if (ctrlpriv->rng4_sh_init)
 290                 deinstantiate_rng(ctrldev, ctrlpriv->rng4_sh_init);
 291
 292         /* Shut down debug views */
 293 #ifdef CONFIG_DEBUG_FS
 294         debugfs_remove_recursive(ctrlpriv->dfs_root);
 295 #endif
 296
 297         /* Unmap controller region */
 298         iounmap(&topregs->ctrl);
 299
 300 #ifdef CONFIG_ARM
 301         /* shut clocks off before finalizing shutdown */
 302         clk_disable(ctrlpriv->caam_ipg);
 303         clk_disable(ctrlpriv->caam_mem);
 304         clk_disable(ctrlpriv->caam_aclk);
 305         clk_disable(ctrlpriv->caam_emi_slow);
 306 #endif
 307
 308         kfree(ctrlpriv->jrpdev);
 309         kfree(ctrlpriv);
 310
 311         return ret;
 312 }
 313
 314 /*
 315  * kick_trng - sets the various parameters for enabling the initialization
 316  *             of the RNG4 block in CAAM
 317  * @pdev - pointer to the platform device
 318  * @ent_delay - Defines the length (in system clocks) of each entropy sample.
 319  */
 320 static void kick_trng(struct platform_device *pdev, int ent_delay)
 321 {
 322         struct device *ctrldev = &pdev->dev;
 323         struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctrldev);
 324         struct caam_full __iomem *topregs;
 325         struct rng4tst __iomem *r4tst;
 326         u32 val;
 327
 328         topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
 329         r4tst = &topregs->ctrl.r4tst[0];
 330
 331         /* put RNG4 into program mode */
 332         setbits32(&r4tst->rtmctl, RTMCTL_PRGM);
 333
 334         /*
 335          * Performance-wise, it does not make sense to
 336          * set the delay to a value that is lower
 337          * than the last one that worked (i.e. the state handles
 338          * were instantiated properly. Thus, instead of wasting
 339          * time trying to set the values controlling the sample
 340          * frequency, the function simply returns.
 341          */
 342         val = (rd_reg32(&r4tst->rtsdctl) & RTSDCTL_ENT_DLY_MASK)
 343               >> RTSDCTL_ENT_DLY_SHIFT;
 344         if (ent_delay <= val) {
 345                 /* put RNG4 into run mode */
 346                 clrbits32(&r4tst->rtmctl, RTMCTL_PRGM);
 347                 return;
 348         }
 349
 350         val = rd_reg32(&r4tst->rtsdctl);
 351         val = (val & ~RTSDCTL_ENT_DLY_MASK) |
 352               (ent_delay << RTSDCTL_ENT_DLY_SHIFT);
 353         wr_reg32(&r4tst->rtsdctl, val);
 354         /* min. freq. count, equal to 1/4 of the entropy sample length */
 355         wr_reg32(&r4tst->rtfrqmin, ent_delay >> 2);
 356         /* max. freq. count, equal to 16 times the entropy sample length */
 357         wr_reg32(&r4tst->rtfrqmax, ent_delay << 4);
 358         /* put RNG4 into run mode */
 359         clrbits32(&r4tst->rtmctl, RTMCTL_PRGM);
 360 }
 361
 362 /**
 363  * caam_get_era() - Return the ERA of the SEC on SoC, based
 364  * on the SEC_VID register.
 365  * Returns the ERA number (1..4) or -ENOTSUPP if the ERA is unknown.
 366  * @caam_id - the value of the SEC_VID register
 367  **/
 368 int caam_get_era(u64 caam_id)
 369 {
 370         struct sec_vid *sec_vid = (struct sec_vid *)&caam_id;
 371         static const struct {
 372                 u16 ip_id;
 373                 u8 maj_rev;
 374                 u8 era;
 375         } caam_eras[] = {
 376                 {0x0A10, 1, 1},
 377                 {0x0A10, 2, 2},
 378                 {0x0A12, 1, 3},
 379                 {0x0A14, 1, 3},
 380                 {0x0A14, 2, 4},
 381                 {0x0A16, 1, 4},
 382                 {0x0A11, 1, 4}
 383         };
 384         int i;
 385
 386         for (i = 0; i < ARRAY_SIZE(caam_eras); i++)
 387                 if (caam_eras[i].ip_id == sec_vid->ip_id &&
 388                         caam_eras[i].maj_rev == sec_vid->maj_rev)
 389                                 return caam_eras[i].era;
 390
 391         return -ENOTSUPP;
 392 }
 393 EXPORT_SYMBOL(caam_get_era);
 394
 395 /* Probe routine for CAAM top (controller) level */
 396 static int caam_probe(struct platform_device *pdev)
 397 {
 398         int ret, ring, rspec, gen_sk, ent_delay = RTSDCTL_ENT_DLY_MIN;
 399         u64 caam_id;
 400         struct device *dev;
 401         struct device_node *nprop, *np;
 402         struct caam_ctrl __iomem *ctrl;
 403         struct caam_full __iomem *topregs;
 404         struct snvs_full __iomem *snvsregs;
 405         struct caam_drv_private *ctrlpriv;
 406 #ifdef CONFIG_DEBUG_FS
 407         struct caam_perfmon *perfmon;
 408 #endif
 409         u64 cha_vid;
 410
 411         ctrlpriv = kzalloc(sizeof(struct caam_drv_private), GFP_KERNEL);
 412         if (!ctrlpriv)
 413                 return -ENOMEM;
 414
 415         dev = &pdev->dev;
 416         dev_set_drvdata(dev, ctrlpriv);
 417         ctrlpriv->pdev = pdev;
 418         nprop = pdev->dev.of_node;
 419
 420         /* Get configuration properties from device tree */
 421         /* First, get register page */
 422         ctrl = of_iomap(nprop, 0);
 423         if (ctrl == NULL) {
 424                 dev_err(dev, "caam: of_iomap() failed\n");
 425                 return -ENOMEM;
 426         }
 427         ctrlpriv->ctrl = (struct caam_ctrl __force *)ctrl;
 428
 429         /* topregs used to derive pointers to CAAM sub-blocks only */
 430         topregs = (struct caam_full __iomem *)ctrl;
 431
 432         /* Get the IRQ of the controller (for security violations only) */
 433         ctrlpriv->secvio_irq = irq_of_parse_and_map(nprop, 0);
 434
 435         /* Get SNVS register Page */
 436         np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-caam-snvs");
 437
 438         if (!np)
 439                 return -ENODEV;
 440
 441         snvsregs = of_iomap(np, 0);
 442         ctrlpriv->snvs = snvsregs;
 443         /* Get CAAM-SM node and of_iomap() and save */
 444         np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-caam-sm");
 445
 446         if (!np)
 447                 return -ENODEV;
 448
 449         ctrlpriv->sm_base = of_iomap(np, 0);
 450         ctrlpriv->sm_size = 0x3fff;
 451
 452 /*
 453  * ARM targets tend to have clock control subsystems that can
 454  * enable/disable clocking to our device. Turn clocking on to proceed
 455  */
 456 #ifdef CONFIG_ARM
 457         ctrlpriv->caam_ipg = devm_clk_get(&ctrlpriv->pdev->dev, "caam_ipg");
 458         if (IS_ERR(ctrlpriv->caam_ipg)) {
 459                 ret = PTR_ERR(ctrlpriv->caam_ipg);
 460                 dev_err(&ctrlpriv->pdev->dev,
 461                         "can't identify CAAM ipg clk: %d\n", ret);
 462                 return -ENODEV;
 463         }
 464         ctrlpriv->caam_mem = devm_clk_get(&ctrlpriv->pdev->dev, "caam_mem");
 465         if (IS_ERR(ctrlpriv->caam_mem)) {
 466                 ret = PTR_ERR(ctrlpriv->caam_mem);
 467                 dev_err(&ctrlpriv->pdev->dev,
 468                         "can't identify CAAM secure mem clk: %d\n", ret);
 469                 return -ENODEV;
 470         }
 471         ctrlpriv->caam_aclk = devm_clk_get(&ctrlpriv->pdev->dev, "caam_aclk");
 472         if (IS_ERR(ctrlpriv->caam_aclk)) {
 473                 ret = PTR_ERR(ctrlpriv->caam_aclk);
 474                 dev_err(&ctrlpriv->pdev->dev,
 475                         "can't identify CAAM aclk clk: %d\n", ret);
 476                 return -ENODEV;
 477         }
 478
 479         ctrlpriv->caam_emi_slow = devm_clk_get(&ctrlpriv->pdev->dev,
 480                                                "caam_emi_slow");
 481         ret = clk_prepare_enable(ctrlpriv->caam_emi_slow);
 482         if (ret < 0) {
 483                 dev_err(&pdev->dev, "can't prepare CAAM emi"
 484                         " slow clock: %d\n", ret);
 485                 return -ENODEV;
 486         }
 487
 488         ret = clk_prepare(ctrlpriv->caam_ipg);
 489         if (ret < 0) {
 490                 dev_err(&pdev->dev, "can't prepare CAAM ipg clock: %d\n", ret);
 491                 return -ENODEV;
 492         }
 493         ret = clk_prepare(ctrlpriv->caam_mem);
 494         if (ret < 0) {
 495                 dev_err(&pdev->dev, "can't prepare CAAM secure mem clock: %d\n",
 496                         ret);
 497                 return -ENODEV;
 498         }
 499         ret = clk_prepare(ctrlpriv->caam_aclk);
 500         if (ret < 0) {
 501                 dev_err(&pdev->dev, "can't prepare CAAM aclk clock: %d\n", ret);
 502                 return -ENODEV;
 503         }
 504
 505         ret = clk_enable(ctrlpriv->caam_ipg);
 506         if (ret < 0) {
 507                 dev_err(&pdev->dev, "can't enable CAAM ipg clock: %d\n", ret);
 508                 return -ENODEV;
 509         }
 510         ret = clk_enable(ctrlpriv->caam_mem);
 511         if (ret < 0) {
 512                 dev_err(&pdev->dev, "can't enable CAAM secure mem clock: %d\n",
 513                         ret);
 514                 return -ENODEV;
 515         }
 516         ret = clk_enable(ctrlpriv->caam_aclk);
 517         if (ret < 0) {
 518                 dev_err(&pdev->dev, "can't enable CAAM aclk clock: %d\n", ret);
 519                 return -ENODEV;
 520         }
 521
 522         pr_debug("%s caam_ipg clock:%d\n", __func__,
 523                 (int)clk_get_rate(ctrlpriv->caam_ipg));
 524         pr_debug("%s caam_mem clock:%d\n", __func__,
 525                 (int)clk_get_rate(ctrlpriv->caam_mem));
 526         pr_debug("%s caam_aclk clock:%d\n", __func__,
 527                 (int)clk_get_rate(ctrlpriv->caam_aclk));
 528 #endif
 529
 530         /*
 531          * Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel,
 532          * long pointers in master configuration register
 533          */
 534         setbits32(&topregs->ctrl.mcr, MCFGR_WDENABLE |
 535                   (sizeof(dma_addr_t) == sizeof(u64) ? MCFGR_LONG_PTR : 0));
 536
 537         if (sizeof(dma_addr_t) == sizeof(u64))
 538                 if (of_device_is_compatible(nprop, "fsl,sec-v5.0"))
 539                         dma_set_mask(dev, DMA_BIT_MASK(40));
 540                 else
 541                         dma_set_mask(dev, DMA_BIT_MASK(36));
 542         else
 543                 dma_set_mask(dev, DMA_BIT_MASK(32));
 544
 545         /*
 546          * Detect and enable JobRs
 547          * First, find out how many ring spec'ed, allocate references
 548          * for all, then go probe each one.
 549          */
 550         rspec = 0;
 551         for_each_compatible_node(np, NULL, "fsl,sec-v4.0-job-ring")
 552                 rspec++;
 553         if (!rspec) {
 554                 /* for backward compatible with device trees */
 555                 for_each_compatible_node(np, NULL, "fsl,sec4.0-job-ring")
 556                         rspec++;
 557         }
 558
 559         ctrlpriv->jrpdev = kzalloc(sizeof(struct platform_device *) * rspec,
 560                                                                 GFP_KERNEL);
 561         if (ctrlpriv->jrpdev == NULL) {
 562                 iounmap(&topregs->ctrl);
 563                 return -ENOMEM;
 564         }
 565
 566         ring = 0;
 567         ctrlpriv->total_jobrs = 0;
 568         for_each_compatible_node(np, NULL, "fsl,sec-v4.0-job-ring") {
 569                 ctrlpriv->jrpdev[ring] =
 570                                 of_platform_device_create(np, NULL, dev);
 571                 if (!ctrlpriv->jrpdev[ring]) {
 572                         pr_warn("JR%d Platform device creation error\n", ring);
 573                         continue;
 574                 }
 575                 ctrlpriv->total_jobrs++;
 576                 ring++;
 577         }
 578         if (!ring) {
 579                 for_each_compatible_node(np, NULL, "fsl,sec4.0-job-ring") {
 580                         ctrlpriv->jrpdev[ring] =
 581                                 of_platform_device_create(np, NULL, dev);
 582                         if (!ctrlpriv->jrpdev[ring]) {
 583                                 pr_warn("JR%d Platform device creation error\n",
 584                                         ring);
 585                                 continue;
 586                         }
 587                         ctrlpriv->total_jobrs++;
 588                         ring++;
 589                 }
 590         }
 591
 592         /* Check to see if QI present. If so, enable */
 593         ctrlpriv->qi_present = !!(rd_reg64(&topregs->ctrl.perfmon.comp_parms) &
 594                                   CTPR_QI_MASK);
 595         if (ctrlpriv->qi_present) {
 596                 ctrlpriv->qi = (struct caam_queue_if __force *)&topregs->qi;
 597                 /* This is all that's required to physically enable QI */
 598                 wr_reg32(&topregs->qi.qi_control_lo, QICTL_DQEN);
 599         }
 600
 601         /* If no QI and no rings specified, quit and go home */
 602         if ((!ctrlpriv->qi_present) && (!ctrlpriv->total_jobrs)) {
 603                 dev_err(dev, "no queues configured, terminating\n");
 604                 caam_remove(pdev);
 605                 return -ENOMEM;
 606         }
 607
 608         cha_vid = rd_reg64(&topregs->ctrl.perfmon.cha_id);
 609
 610         /*
 611          * If SEC has RNG version >= 4 and RNG state handle has not been
 612          * already instantiated, do RNG instantiation
 613          */
 614         if ((cha_vid & CHA_ID_RNG_MASK) >> CHA_ID_RNG_SHIFT >= 4) {
 615                 ctrlpriv->rng4_sh_init =
 616                         rd_reg32(&topregs->ctrl.r4tst[0].rdsta);
 617                 /*
 618                  * If the secure keys (TDKEK, JDKEK, TDSK), were already
 619                  * generated, signal this to the function that is instantiating
 620                  * the state handles. An error would occur if RNG4 attempts
 621                  * to regenerate these keys before the next POR.
 622                  */
 623                 gen_sk = ctrlpriv->rng4_sh_init & RDSTA_SKVN ? 0 : 1;
 624                 ctrlpriv->rng4_sh_init &= RDSTA_IFMASK;
 625                 do {
 626                         int inst_handles =
 627                                 rd_reg32(&topregs->ctrl.r4tst[0].rdsta) &
 628                                                                 RDSTA_IFMASK;
 629                         /*
 630                          * If either SH were instantiated by somebody else
 631                          * (e.g. u-boot) then it is assumed that the entropy
 632                          * parameters are properly set and thus the function
 633                          * setting these (kick_trng(...)) is skipped.
 634                          * Also, if a handle was instantiated, do not change
 635                          * the TRNG parameters.
 636                          */
 637                         if (!(ctrlpriv->rng4_sh_init || inst_handles)) {
 638                                 kick_trng(pdev, ent_delay);
 639                                 ent_delay += 400;
 640                         }
 641                         /*
 642                          * if instantiate_rng(...) fails, the loop will rerun
 643                          * and the kick_trng(...) function will modfiy the
 644                          * upper and lower limits of the entropy sampling
 645                          * interval, leading to a sucessful initialization of
 646                          * the RNG.
 647                          */
 648                         ret = instantiate_rng(dev, inst_handles,
 649                                               gen_sk);
 650                 } while ((ret == -EAGAIN) && (ent_delay < RTSDCTL_ENT_DLY_MAX));
 651                 if (ret) {
 652                         dev_err(dev, "failed to instantiate RNG");
 653                         caam_remove(pdev);
 654                         return ret;
 655                 }
 656                 /*
 657                  * Set handles init'ed by this module as the complement of the
 658                  * already initialized ones
 659                  */
 660                 ctrlpriv->rng4_sh_init = ~ctrlpriv->rng4_sh_init & RDSTA_IFMASK;
 661
 662                 /* Enable RDB bit so that RNG works faster */
 663                 setbits32(&topregs->ctrl.scfgr, SCFGR_RDBENABLE);
 664         }
 665
 666         /* NOTE: RTIC detection ought to go here, around Si time */
 667
 668         caam_id = rd_reg64(&topregs->ctrl.perfmon.caam_id);
 669
 670         /* Report "alive" for developer to see */
 671         dev_info(dev, "device ID = 0x%016llx (Era %d)\n", caam_id,
 672                  caam_get_era(caam_id));
 673         dev_info(dev, "job rings = %d, qi = %d\n",
 674                  ctrlpriv->total_jobrs, ctrlpriv->qi_present);
 675
 676 #ifdef CONFIG_DEBUG_FS
 677         /*
 678          * FIXME: needs better naming distinction, as some amalgamation of
 679          * "caam" and nprop->full_name. The OF name isn't distinctive,
 680          * but does separate instances
 681          */
 682         perfmon = (struct caam_perfmon __force *)&ctrl->perfmon;
 683
 684         ctrlpriv->dfs_root = debugfs_create_dir("caam", NULL);
 685         ctrlpriv->ctl = debugfs_create_dir("ctl", ctrlpriv->dfs_root);
 686
 687         /* Controller-level - performance monitor counters */
 688         ctrlpriv->ctl_rq_dequeued =
 689                 debugfs_create_u64("rq_dequeued",
 690                                    S_IRUSR | S_IRGRP | S_IROTH,
 691                                    ctrlpriv->ctl, &perfmon->req_dequeued);
 692         ctrlpriv->ctl_ob_enc_req =
 693                 debugfs_create_u64("ob_rq_encrypted",
 694                                    S_IRUSR | S_IRGRP | S_IROTH,
 695                                    ctrlpriv->ctl, &perfmon->ob_enc_req);
 696         ctrlpriv->ctl_ib_dec_req =
 697                 debugfs_create_u64("ib_rq_decrypted",
 698                                    S_IRUSR | S_IRGRP | S_IROTH,
 699                                    ctrlpriv->ctl, &perfmon->ib_dec_req);
 700         ctrlpriv->ctl_ob_enc_bytes =
 701                 debugfs_create_u64("ob_bytes_encrypted",
 702                                    S_IRUSR | S_IRGRP | S_IROTH,
 703                                    ctrlpriv->ctl, &perfmon->ob_enc_bytes);
 704         ctrlpriv->ctl_ob_prot_bytes =
 705                 debugfs_create_u64("ob_bytes_protected",
 706                                    S_IRUSR | S_IRGRP | S_IROTH,
 707                                    ctrlpriv->ctl, &perfmon->ob_prot_bytes);
 708         ctrlpriv->ctl_ib_dec_bytes =
 709                 debugfs_create_u64("ib_bytes_decrypted",
 710                                    S_IRUSR | S_IRGRP | S_IROTH,
 711                                    ctrlpriv->ctl, &perfmon->ib_dec_bytes);
 712         ctrlpriv->ctl_ib_valid_bytes =
 713                 debugfs_create_u64("ib_bytes_validated",
 714                                    S_IRUSR | S_IRGRP | S_IROTH,
 715                                    ctrlpriv->ctl, &perfmon->ib_valid_bytes);
 716
 717         /* Controller level - global status values */
 718         ctrlpriv->ctl_faultaddr =
 719                 debugfs_create_u64("fault_addr",
 720                                    S_IRUSR | S_IRGRP | S_IROTH,
 721                                    ctrlpriv->ctl, &perfmon->faultaddr);
 722         ctrlpriv->ctl_faultdetail =
 723                 debugfs_create_u32("fault_detail",
 724                                    S_IRUSR | S_IRGRP | S_IROTH,
 725                                    ctrlpriv->ctl, &perfmon->faultdetail);
 726         ctrlpriv->ctl_faultstatus =
 727                 debugfs_create_u32("fault_status",
 728                                    S_IRUSR | S_IRGRP | S_IROTH,
 729                                    ctrlpriv->ctl, &perfmon->status);
 730
 731         /* Internal covering keys (useful in non-secure mode only) */
 732         ctrlpriv->ctl_kek_wrap.data = &ctrlpriv->ctrl->kek[0];
 733         ctrlpriv->ctl_kek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
 734         ctrlpriv->ctl_kek = debugfs_create_blob("kek",
 735                                                 S_IRUSR |
 736                                                 S_IRGRP | S_IROTH,
 737                                                 ctrlpriv->ctl,
 738                                                 &ctrlpriv->ctl_kek_wrap);
 739
 740         ctrlpriv->ctl_tkek_wrap.data = &ctrlpriv->ctrl->tkek[0];
 741         ctrlpriv->ctl_tkek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
 742         ctrlpriv->ctl_tkek = debugfs_create_blob("tkek",
 743                                                  S_IRUSR |
 744                                                  S_IRGRP | S_IROTH,
 745                                                  ctrlpriv->ctl,
 746                                                  &ctrlpriv->ctl_tkek_wrap);
 747
 748         ctrlpriv->ctl_tdsk_wrap.data = &ctrlpriv->ctrl->tdsk[0];
 749         ctrlpriv->ctl_tdsk_wrap.size = KEK_KEY_SIZE * sizeof(u32);
 750         ctrlpriv->ctl_tdsk = debugfs_create_blob("tdsk",
 751                                                  S_IRUSR |
 752                                                  S_IRGRP | S_IROTH,
 753                                                  ctrlpriv->ctl,
 754                                                  &ctrlpriv->ctl_tdsk_wrap);
 755 #endif
 756         return 0;
 757 }
 758
 759 static struct of_device_id caam_match[] = {
 760         {
 761                 .compatible = "fsl,sec-v4.0",
 762         },
 763         {
 764                 .compatible = "fsl,sec4.0",
 765         },
 766         {},
 767 };
 768 MODULE_DEVICE_TABLE(of, caam_match);
 769
 770 static struct platform_driver caam_driver = {
 771         .driver = {
 772                 .name = "caam",
 773                 .owner = THIS_MODULE,
 774                 .of_match_table = caam_match,
 775         },
 776         .probe       = caam_probe,
 777         .remove      = caam_remove,
 778 };
 779
 780 module_platform_driver(caam_driver);
 781
 782 MODULE_LICENSE("GPL");
 783 MODULE_DESCRIPTION("FSL CAAM request backend");
 784 MODULE_AUTHOR("Freescale Semiconductor - NMG/STC");