drivers/crypto/caam/ctrl.c

   1 /*
   2  * CAAM control-plane driver backend
   3  * Controller-level driver, kernel property detection, initialization
   4  *
   5  * Copyright 2008-2012 Freescale Semiconductor, Inc.
   6  */
   7
   8 #include "compat.h"
   9 #include "regs.h"
  10 #include "intern.h"
  11 #include "jr.h"
  12 #include "desc_constr.h"
  13 #include "error.h"
  14 #include "ctrl.h"
  15
  16 static int caam_remove(struct platform_device *pdev)
  17 {
  18         struct device *ctrldev;
  19         struct caam_drv_private *ctrlpriv;
  20         struct caam_drv_private_jr *jrpriv;
  21         struct caam_full __iomem *topregs;
  22         int ring, ret = 0;
  23
  24         ctrldev = &pdev->dev;
  25         ctrlpriv = dev_get_drvdata(ctrldev);
  26         topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
  27
  28         /* shut down JobRs */
  29         for (ring = 0; ring < ctrlpriv->total_jobrs; ring++) {
  30                 ret |= caam_jr_shutdown(ctrlpriv->jrdev[ring]);
  31                 jrpriv = dev_get_drvdata(ctrlpriv->jrdev[ring]);
  32                 irq_dispose_mapping(jrpriv->irq);
  33         }
  34
  35         /* Shut down debug views */
  36 #ifdef CONFIG_DEBUG_FS
  37         debugfs_remove_recursive(ctrlpriv->dfs_root);
  38 #endif
  39
  40         /* Unmap controller region */
  41         iounmap(&topregs->ctrl);
  42
  43         kfree(ctrlpriv->jrdev);
  44         kfree(ctrlpriv);
  45
  46         return ret;
  47 }
  48
  49 /*
  50  * Descriptor to instantiate RNG State Handle 0 in normal mode and
  51  * load the JDKEK, TDKEK and TDSK registers
  52  */
  53 static void build_instantiation_desc(u32 *desc)
  54 {
  55         u32 *jump_cmd;
  56
  57         init_job_desc(desc, 0);
  58
  59         /* INIT RNG in non-test mode */
  60         append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
  61                          OP_ALG_AS_INIT);
  62
  63         /* wait for done */
  64         jump_cmd = append_jump(desc, JUMP_CLASS_CLASS1);
  65         set_jump_tgt_here(desc, jump_cmd);
  66
  67         /*
  68          * load 1 to clear written reg:
  69          * resets the done interrupt and returns the RNG to idle.
  70          */
  71         append_load_imm_u32(desc, 1, LDST_SRCDST_WORD_CLRW);
  72
  73         /* generate secure keys (non-test) */
  74         append_operation(desc, OP_TYPE_CLASS1_ALG | OP_ALG_ALGSEL_RNG |
  75                          OP_ALG_RNG4_SK);
  76
  77         append_jump(desc, JUMP_CLASS_CLASS1 | JUMP_TYPE_HALT);
  78 }
  79
  80 static int instantiate_rng(struct device *ctrldev)
  81 {
  82         struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctrldev);
  83         struct caam_full __iomem *topregs;
  84         unsigned int timeout = 100000;
  85         u32 *desc;
  86         int i, ret = 0;
  87
  88         desc = kmalloc(CAAM_CMD_SZ * 7, GFP_KERNEL | GFP_DMA);
  89         if (!desc) {
  90                 dev_err(ctrldev, "can't allocate RNG init descriptor memory\n");
  91                 return -ENOMEM;
  92         }
  93         build_instantiation_desc(desc);
  94
  95         /* Set the bit to request direct access to DECO0 */
  96         topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
  97         setbits32(&topregs->ctrl.deco_rq, DECORR_RQD0ENABLE);
  98
  99         while (!(rd_reg32(&topregs->ctrl.deco_rq) & DECORR_DEN0) &&
 100                                                                  --timeout)
 101                 cpu_relax();
 102
 103         if (!timeout) {
 104                 dev_err(ctrldev, "failed to acquire DECO 0\n");
 105                 ret = -EIO;
 106                 goto out;
 107         }
 108
 109         for (i = 0; i < desc_len(desc); i++)
 110                 topregs->deco.descbuf[i] = *(desc + i);
 111
 112         wr_reg32(&topregs->deco.jr_ctl_hi, DECO_JQCR_WHL | DECO_JQCR_FOUR);
 113
 114         timeout = 10000000;
 115         while ((rd_reg32(&topregs->deco.desc_dbg) & DECO_DBG_VALID) &&
 116                                                                  --timeout)
 117                 cpu_relax();
 118
 119         if (!timeout) {
 120                 dev_err(ctrldev, "failed to instantiate RNG\n");
 121                 ret = -EIO;
 122         }
 123
 124         clrbits32(&topregs->ctrl.deco_rq, DECORR_RQD0ENABLE);
 125 out:
 126         kfree(desc);
 127         return ret;
 128 }
 129
 130 /*
 131  * By default, the TRNG runs for 200 clocks per sample;
 132  * 1600 clocks per sample generates better entropy.
 133  */
 134 static void kick_trng(struct platform_device *pdev)
 135 {
 136         struct device *ctrldev = &pdev->dev;
 137         struct caam_drv_private *ctrlpriv = dev_get_drvdata(ctrldev);
 138         struct caam_full __iomem *topregs;
 139         struct rng4tst __iomem *r4tst;
 140         u32 val;
 141
 142         topregs = (struct caam_full __iomem *)ctrlpriv->ctrl;
 143         r4tst = &topregs->ctrl.r4tst[0];
 144
 145         /* put RNG4 into program mode */
 146         setbits32(&r4tst->rtmctl, RTMCTL_PRGM);
 147         /* 1600 clocks per sample */
 148         val = rd_reg32(&r4tst->rtsdctl);
 149         val = (val & ~RTSDCTL_ENT_DLY_MASK) | (1600 << RTSDCTL_ENT_DLY_SHIFT);
 150         wr_reg32(&r4tst->rtsdctl, val);
 151         /* min. freq. count */
 152         wr_reg32(&r4tst->rtfrqmin, 400);
 153         /* max. freq. count */
 154         wr_reg32(&r4tst->rtfrqmax, 6400);
 155         /* put RNG4 into run mode */
 156         clrbits32(&r4tst->rtmctl, RTMCTL_PRGM);
 157 }
 158
 159 /**
 160  * caam_get_era() - Return the ERA of the SEC on SoC, based
 161  * on the SEC_VID register.
 162  * Returns the ERA number (1..4) or -ENOTSUPP if the ERA is unknown.
 163  * @caam_id - the value of the SEC_VID register
 164  **/
 165 int caam_get_era(u64 caam_id)
 166 {
 167         struct sec_vid *sec_vid = (struct sec_vid *)&caam_id;
 168         static const struct {
 169                 u16 ip_id;
 170                 u8 maj_rev;
 171                 u8 era;
 172         } caam_eras[] = {
 173                 {0x0A10, 1, 1},
 174                 {0x0A10, 2, 2},
 175                 {0x0A12, 1, 3},
 176                 {0x0A14, 1, 3},
 177                 {0x0A14, 2, 4},
 178                 {0x0A16, 1, 4},
 179                 {0x0A11, 1, 4}
 180         };
 181         int i;
 182
 183         for (i = 0; i < ARRAY_SIZE(caam_eras); i++)
 184                 if (caam_eras[i].ip_id == sec_vid->ip_id &&
 185                         caam_eras[i].maj_rev == sec_vid->maj_rev)
 186                                 return caam_eras[i].era;
 187
 188         return -ENOTSUPP;
 189 }
 190 EXPORT_SYMBOL(caam_get_era);
 191
 192 /* Probe routine for CAAM top (controller) level */
 193 static int caam_probe(struct platform_device *pdev)
 194 {
 195         int ret, ring, rspec;
 196         u64 caam_id;
 197         struct device *dev;
 198         struct device_node *nprop, *np;
 199         struct caam_ctrl __iomem *ctrl;
 200         struct caam_full __iomem *topregs;
 201         struct caam_drv_private *ctrlpriv;
 202 #ifdef CONFIG_DEBUG_FS
 203         struct caam_perfmon *perfmon;
 204 #endif
 205         u64 cha_vid;
 206
 207         ctrlpriv = kzalloc(sizeof(struct caam_drv_private), GFP_KERNEL);
 208         if (!ctrlpriv)
 209                 return -ENOMEM;
 210
 211         dev = &pdev->dev;
 212         dev_set_drvdata(dev, ctrlpriv);
 213         ctrlpriv->pdev = pdev;
 214         nprop = pdev->dev.of_node;
 215
 216         /* Get configuration properties from device tree */
 217         /* First, get register page */
 218         ctrl = of_iomap(nprop, 0);
 219         if (ctrl == NULL) {
 220                 dev_err(dev, "caam: of_iomap() failed\n");
 221                 return -ENOMEM;
 222         }
 223         ctrlpriv->ctrl = (struct caam_ctrl __force *)ctrl;
 224
 225         /* topregs used to derive pointers to CAAM sub-blocks only */
 226         topregs = (struct caam_full __iomem *)ctrl;
 227
 228         /* Get the IRQ of the controller (for security violations only) */
 229         ctrlpriv->secvio_irq = of_irq_to_resource(nprop, 0, NULL);
 230
 231         /*
 232          * Enable DECO watchdogs and, if this is a PHYS_ADDR_T_64BIT kernel,
 233          * long pointers in master configuration register
 234          */
 235         setbits32(&topregs->ctrl.mcr, MCFGR_WDENABLE |
 236                   (sizeof(dma_addr_t) == sizeof(u64) ? MCFGR_LONG_PTR : 0));
 237
 238         if (sizeof(dma_addr_t) == sizeof(u64))
 239                 if (of_device_is_compatible(nprop, "fsl,sec-v5.0"))
 240                         dma_set_mask(dev, DMA_BIT_MASK(40));
 241                 else
 242                         dma_set_mask(dev, DMA_BIT_MASK(36));
 243         else
 244                 dma_set_mask(dev, DMA_BIT_MASK(32));
 245
 246         /*
 247          * Detect and enable JobRs
 248          * First, find out how many ring spec'ed, allocate references
 249          * for all, then go probe each one.
 250          */
 251         rspec = 0;
 252         for_each_compatible_node(np, NULL, "fsl,sec-v4.0-job-ring")
 253                 rspec++;
 254         if (!rspec) {
 255                 /* for backward compatible with device trees */
 256                 for_each_compatible_node(np, NULL, "fsl,sec4.0-job-ring")
 257                         rspec++;
 258         }
 259
 260         ctrlpriv->jrdev = kzalloc(sizeof(struct device *) * rspec, GFP_KERNEL);
 261         if (ctrlpriv->jrdev == NULL) {
 262                 iounmap(&topregs->ctrl);
 263                 return -ENOMEM;
 264         }
 265
 266         ring = 0;
 267         ctrlpriv->total_jobrs = 0;
 268         for_each_compatible_node(np, NULL, "fsl,sec-v4.0-job-ring") {
 269                 caam_jr_probe(pdev, np, ring);
 270                 ctrlpriv->total_jobrs++;
 271                 ring++;
 272         }
 273         if (!ring) {
 274                 for_each_compatible_node(np, NULL, "fsl,sec4.0-job-ring") {
 275                         caam_jr_probe(pdev, np, ring);
 276                         ctrlpriv->total_jobrs++;
 277                         ring++;
 278                 }
 279         }
 280
 281         /* Check to see if QI present. If so, enable */
 282         ctrlpriv->qi_present = !!(rd_reg64(&topregs->ctrl.perfmon.comp_parms) &
 283                                   CTPR_QI_MASK);
 284         if (ctrlpriv->qi_present) {
 285                 ctrlpriv->qi = (struct caam_queue_if __force *)&topregs->qi;
 286                 /* This is all that's required to physically enable QI */
 287                 wr_reg32(&topregs->qi.qi_control_lo, QICTL_DQEN);
 288         }
 289
 290         /* If no QI and no rings specified, quit and go home */
 291         if ((!ctrlpriv->qi_present) && (!ctrlpriv->total_jobrs)) {
 292                 dev_err(dev, "no queues configured, terminating\n");
 293                 caam_remove(pdev);
 294                 return -ENOMEM;
 295         }
 296
 297         cha_vid = rd_reg64(&topregs->ctrl.perfmon.cha_id);
 298
 299         /*
 300          * If SEC has RNG version >= 4 and RNG state handle has not been
 301          * already instantiated ,do RNG instantiation
 302          */
 303         if ((cha_vid & CHA_ID_RNG_MASK) >> CHA_ID_RNG_SHIFT >= 4 &&
 304             !(rd_reg32(&topregs->ctrl.r4tst[0].rdsta) & RDSTA_IF0)) {
 305                 kick_trng(pdev);
 306                 ret = instantiate_rng(dev);
 307                 if (ret) {
 308                         caam_remove(pdev);
 309                         return ret;
 310                 }
 311
 312                 /* Enable RDB bit so that RNG works faster */
 313                 setbits32(&topregs->ctrl.scfgr, SCFGR_RDBENABLE);
 314         }
 315
 316         /* NOTE: RTIC detection ought to go here, around Si time */
 317
 318         caam_id = rd_reg64(&topregs->ctrl.perfmon.caam_id);
 319
 320         /* Report "alive" for developer to see */
 321         dev_info(dev, "device ID = 0x%016llx (Era %d)\n", caam_id,
 322                  caam_get_era(caam_id));
 323         dev_info(dev, "job rings = %d, qi = %d\n",
 324                  ctrlpriv->total_jobrs, ctrlpriv->qi_present);
 325
 326 #ifdef CONFIG_DEBUG_FS
 327         /*
 328          * FIXME: needs better naming distinction, as some amalgamation of
 329          * "caam" and nprop->full_name. The OF name isn't distinctive,
 330          * but does separate instances
 331          */
 332         perfmon = (struct caam_perfmon __force *)&ctrl->perfmon;
 333
 334         ctrlpriv->dfs_root = debugfs_create_dir("caam", NULL);
 335         ctrlpriv->ctl = debugfs_create_dir("ctl", ctrlpriv->dfs_root);
 336
 337         /* Controller-level - performance monitor counters */
 338         ctrlpriv->ctl_rq_dequeued =
 339                 debugfs_create_u64("rq_dequeued",
 340                                    S_IRUSR | S_IRGRP | S_IROTH,
 341                                    ctrlpriv->ctl, &perfmon->req_dequeued);
 342         ctrlpriv->ctl_ob_enc_req =
 343                 debugfs_create_u64("ob_rq_encrypted",
 344                                    S_IRUSR | S_IRGRP | S_IROTH,
 345                                    ctrlpriv->ctl, &perfmon->ob_enc_req);
 346         ctrlpriv->ctl_ib_dec_req =
 347                 debugfs_create_u64("ib_rq_decrypted",
 348                                    S_IRUSR | S_IRGRP | S_IROTH,
 349                                    ctrlpriv->ctl, &perfmon->ib_dec_req);
 350         ctrlpriv->ctl_ob_enc_bytes =
 351                 debugfs_create_u64("ob_bytes_encrypted",
 352                                    S_IRUSR | S_IRGRP | S_IROTH,
 353                                    ctrlpriv->ctl, &perfmon->ob_enc_bytes);
 354         ctrlpriv->ctl_ob_prot_bytes =
 355                 debugfs_create_u64("ob_bytes_protected",
 356                                    S_IRUSR | S_IRGRP | S_IROTH,
 357                                    ctrlpriv->ctl, &perfmon->ob_prot_bytes);
 358         ctrlpriv->ctl_ib_dec_bytes =
 359                 debugfs_create_u64("ib_bytes_decrypted",
 360                                    S_IRUSR | S_IRGRP | S_IROTH,
 361                                    ctrlpriv->ctl, &perfmon->ib_dec_bytes);
 362         ctrlpriv->ctl_ib_valid_bytes =
 363                 debugfs_create_u64("ib_bytes_validated",
 364                                    S_IRUSR | S_IRGRP | S_IROTH,
 365                                    ctrlpriv->ctl, &perfmon->ib_valid_bytes);
 366
 367         /* Controller level - global status values */
 368         ctrlpriv->ctl_faultaddr =
 369                 debugfs_create_u64("fault_addr",
 370                                    S_IRUSR | S_IRGRP | S_IROTH,
 371                                    ctrlpriv->ctl, &perfmon->faultaddr);
 372         ctrlpriv->ctl_faultdetail =
 373                 debugfs_create_u32("fault_detail",
 374                                    S_IRUSR | S_IRGRP | S_IROTH,
 375                                    ctrlpriv->ctl, &perfmon->faultdetail);
 376         ctrlpriv->ctl_faultstatus =
 377                 debugfs_create_u32("fault_status",
 378                                    S_IRUSR | S_IRGRP | S_IROTH,
 379                                    ctrlpriv->ctl, &perfmon->status);
 380
 381         /* Internal covering keys (useful in non-secure mode only) */
 382         ctrlpriv->ctl_kek_wrap.data = &ctrlpriv->ctrl->kek[0];
 383         ctrlpriv->ctl_kek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
 384         ctrlpriv->ctl_kek = debugfs_create_blob("kek",
 385                                                 S_IRUSR |
 386                                                 S_IRGRP | S_IROTH,
 387                                                 ctrlpriv->ctl,
 388                                                 &ctrlpriv->ctl_kek_wrap);
 389
 390         ctrlpriv->ctl_tkek_wrap.data = &ctrlpriv->ctrl->tkek[0];
 391         ctrlpriv->ctl_tkek_wrap.size = KEK_KEY_SIZE * sizeof(u32);
 392         ctrlpriv->ctl_tkek = debugfs_create_blob("tkek",
 393                                                  S_IRUSR |
 394                                                  S_IRGRP | S_IROTH,
 395                                                  ctrlpriv->ctl,
 396                                                  &ctrlpriv->ctl_tkek_wrap);
 397
 398         ctrlpriv->ctl_tdsk_wrap.data = &ctrlpriv->ctrl->tdsk[0];
 399         ctrlpriv->ctl_tdsk_wrap.size = KEK_KEY_SIZE * sizeof(u32);
 400         ctrlpriv->ctl_tdsk = debugfs_create_blob("tdsk",
 401                                                  S_IRUSR |
 402                                                  S_IRGRP | S_IROTH,
 403                                                  ctrlpriv->ctl,
 404                                                  &ctrlpriv->ctl_tdsk_wrap);
 405 #endif
 406         return 0;
 407 }
 408
 409 static struct of_device_id caam_match[] = {
 410         {
 411                 .compatible = "fsl,sec-v4.0",
 412         },
 413         {
 414                 .compatible = "fsl,sec4.0",
 415         },
 416         {},
 417 };
 418 MODULE_DEVICE_TABLE(of, caam_match);
 419
 420 static struct platform_driver caam_driver = {
 421         .driver = {
 422                 .name = "caam",
 423                 .owner = THIS_MODULE,
 424                 .of_match_table = caam_match,
 425         },
 426         .probe       = caam_probe,
 427         .remove      = caam_remove,
 428 };
 429
 430 module_platform_driver(caam_driver);
 431
 432 MODULE_LICENSE("GPL");
 433 MODULE_DESCRIPTION("FSL CAAM request backend");
 434 MODULE_AUTHOR("Freescale Semiconductor - NMG/STC");