4 * Support for OMAP AES HW ACCELERATOR defines
6 * Copyright (c) 2015 Texas Instruments Incorporated
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
13 #ifndef __OMAP_AES_H__
14 #define __OMAP_AES_H__
16 #define DST_MAXBURST 4
17 #define DMA_MIN (DST_MAXBURST * sizeof(u32))
19 #define _calc_walked(inout) (dd->inout##_walk.offset - dd->inout##_sg->offset)
22 * OMAP TRM gives bitfields as start:end, where start is the higher bit
23 * number. For example 7:0
25 #define FLD_MASK(start, end) (((1 << ((start) - (end) + 1)) - 1) << (end))
26 #define FLD_VAL(val, start, end) (((val) << (end)) & FLD_MASK(start, end))
28 #define AES_REG_KEY(dd, x) ((dd)->pdata->key_ofs - \
29 (((x) ^ 0x01) * 0x04))
30 #define AES_REG_IV(dd, x) ((dd)->pdata->iv_ofs + ((x) * 0x04))
32 #define AES_REG_CTRL(dd) ((dd)->pdata->ctrl_ofs)
33 #define AES_REG_CTRL_CTR_WIDTH_MASK GENMASK(8, 7)
34 #define AES_REG_CTRL_CTR_WIDTH_32 0
35 #define AES_REG_CTRL_CTR_WIDTH_64 BIT(7)
36 #define AES_REG_CTRL_CTR_WIDTH_96 BIT(8)
37 #define AES_REG_CTRL_CTR_WIDTH_128 GENMASK(8, 7)
38 #define AES_REG_CTRL_CTR BIT(6)
39 #define AES_REG_CTRL_CBC BIT(5)
40 #define AES_REG_CTRL_KEY_SIZE GENMASK(4, 3)
41 #define AES_REG_CTRL_DIRECTION BIT(2)
42 #define AES_REG_CTRL_INPUT_READY BIT(1)
43 #define AES_REG_CTRL_OUTPUT_READY BIT(0)
44 #define AES_REG_CTRL_MASK GENMASK(24, 2)
46 #define AES_REG_DATA_N(dd, x) ((dd)->pdata->data_ofs + ((x) * 0x04))
48 #define AES_REG_REV(dd) ((dd)->pdata->rev_ofs)
50 #define AES_REG_MASK(dd) ((dd)->pdata->mask_ofs)
51 #define AES_REG_MASK_SIDLE BIT(6)
52 #define AES_REG_MASK_START BIT(5)
53 #define AES_REG_MASK_DMA_OUT_EN BIT(3)
54 #define AES_REG_MASK_DMA_IN_EN BIT(2)
55 #define AES_REG_MASK_SOFTRESET BIT(1)
56 #define AES_REG_AUTOIDLE BIT(0)
58 #define AES_REG_LENGTH_N(x) (0x54 + ((x) * 0x04))
60 #define AES_REG_IRQ_STATUS(dd) ((dd)->pdata->irq_status_ofs)
61 #define AES_REG_IRQ_ENABLE(dd) ((dd)->pdata->irq_enable_ofs)
62 #define AES_REG_IRQ_DATA_IN BIT(1)
63 #define AES_REG_IRQ_DATA_OUT BIT(2)
64 #define DEFAULT_TIMEOUT (5 * HZ)
66 #define DEFAULT_AUTOSUSPEND_DELAY 1000
68 #define FLAGS_MODE_MASK 0x000f
69 #define FLAGS_ENCRYPT BIT(0)
70 #define FLAGS_CBC BIT(1)
71 #define FLAGS_GIV BIT(2)
72 #define FLAGS_CTR BIT(3)
74 #define FLAGS_INIT BIT(4)
75 #define FLAGS_FAST BIT(5)
76 #define FLAGS_BUSY BIT(6)
78 #define FLAGS_IN_DATA_ST_SHIFT 8
79 #define FLAGS_OUT_DATA_ST_SHIFT 10
81 #define AES_BLOCK_WORDS (AES_BLOCK_SIZE >> 2)
85 u32 key[AES_KEYSIZE_256 / sizeof(u32)];
86 struct crypto_skcipher *fallback;
89 struct omap_aes_reqctx {
90 struct omap_aes_dev *dd;
94 #define OMAP_AES_QUEUE_LENGTH 1
95 #define OMAP_AES_CACHE_SIZE 0
97 struct omap_aes_algs_info {
98 struct crypto_alg *algs_list;
100 unsigned int registered;
103 struct omap_aes_pdata {
104 struct omap_aes_algs_info *algs_info;
105 unsigned int algs_info_size;
107 void (*trigger)(struct omap_aes_dev *dd, int length);
128 struct omap_aes_dev {
129 struct list_head list;
130 unsigned long phys_base;
131 void __iomem *io_base;
132 struct omap_aes_ctx *ctx;
137 struct tasklet_struct done_task;
139 struct ablkcipher_request *req;
140 struct crypto_engine *engine;
143 * total is used by PIO mode for book keeping so introduce
144 * variable total_save as need it to calc page_order
149 struct scatterlist *in_sg;
150 struct scatterlist *out_sg;
152 /* Buffers for copying for unaligned cases */
153 struct scatterlist in_sgl;
154 struct scatterlist out_sgl;
155 struct scatterlist *orig_out;
157 struct scatter_walk in_walk;
158 struct scatter_walk out_walk;
159 struct dma_chan *dma_lch_in;
160 struct dma_chan *dma_lch_out;
164 const struct omap_aes_pdata *pdata;
167 u32 omap_aes_read(struct omap_aes_dev *dd, u32 offset);
168 void omap_aes_write(struct omap_aes_dev *dd, u32 offset, u32 value);
169 struct omap_aes_dev *omap_aes_find_dev(struct omap_aes_reqctx *rctx);
170 int omap_aes_write_ctrl(struct omap_aes_dev *dd);
171 int omap_aes_crypt_dma_start(struct omap_aes_dev *dd);
172 int omap_aes_crypt_dma_stop(struct omap_aes_dev *dd);