2 * Support for OMAP DES and Triple DES HW acceleration.
4 * Copyright (c) 2013 Texas Instruments Incorporated
5 * Author: Joel Fernandes <joelf@ti.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
13 #define pr_fmt(fmt) "%s: " fmt, __func__
16 #define prn(num) printk(#num "=%d\n", num)
17 #define prx(num) printk(#num "=%x\n", num)
19 #define prn(num) do { } while (0)
20 #define prx(num) do { } while (0)
23 #include <linux/err.h>
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/errno.h>
27 #include <linux/kernel.h>
28 #include <linux/platform_device.h>
29 #include <linux/scatterlist.h>
30 #include <linux/dma-mapping.h>
31 #include <linux/dmaengine.h>
32 #include <linux/pm_runtime.h>
34 #include <linux/of_device.h>
35 #include <linux/of_address.h>
37 #include <linux/crypto.h>
38 #include <linux/interrupt.h>
39 #include <crypto/scatterwalk.h>
40 #include <crypto/des.h>
41 #include <crypto/algapi.h>
43 #define DST_MAXBURST 2
45 #define DES_BLOCK_WORDS (DES_BLOCK_SIZE >> 2)
47 #define _calc_walked(inout) (dd->inout##_walk.offset - dd->inout##_sg->offset)
49 #define DES_REG_KEY(dd, x) ((dd)->pdata->key_ofs - \
52 #define DES_REG_IV(dd, x) ((dd)->pdata->iv_ofs + ((x) * 0x04))
54 #define DES_REG_CTRL(dd) ((dd)->pdata->ctrl_ofs)
55 #define DES_REG_CTRL_CBC BIT(4)
56 #define DES_REG_CTRL_TDES BIT(3)
57 #define DES_REG_CTRL_DIRECTION BIT(2)
58 #define DES_REG_CTRL_INPUT_READY BIT(1)
59 #define DES_REG_CTRL_OUTPUT_READY BIT(0)
61 #define DES_REG_DATA_N(dd, x) ((dd)->pdata->data_ofs + ((x) * 0x04))
63 #define DES_REG_REV(dd) ((dd)->pdata->rev_ofs)
65 #define DES_REG_MASK(dd) ((dd)->pdata->mask_ofs)
67 #define DES_REG_LENGTH_N(x) (0x24 + ((x) * 0x04))
69 #define DES_REG_IRQ_STATUS(dd) ((dd)->pdata->irq_status_ofs)
70 #define DES_REG_IRQ_ENABLE(dd) ((dd)->pdata->irq_enable_ofs)
71 #define DES_REG_IRQ_DATA_IN BIT(1)
72 #define DES_REG_IRQ_DATA_OUT BIT(2)
74 #define FLAGS_MODE_MASK 0x000f
75 #define FLAGS_ENCRYPT BIT(0)
76 #define FLAGS_CBC BIT(1)
77 #define FLAGS_INIT BIT(4)
78 #define FLAGS_BUSY BIT(6)
81 struct omap_des_dev *dd;
84 u32 key[(3 * DES_KEY_SIZE) / sizeof(u32)];
88 struct omap_des_reqctx {
92 #define OMAP_DES_QUEUE_LENGTH 1
93 #define OMAP_DES_CACHE_SIZE 0
95 struct omap_des_algs_info {
96 struct crypto_alg *algs_list;
98 unsigned int registered;
101 struct omap_des_pdata {
102 struct omap_des_algs_info *algs_info;
103 unsigned int algs_info_size;
105 void (*trigger)(struct omap_des_dev *dd, int length);
126 struct omap_des_dev {
127 struct list_head list;
128 unsigned long phys_base;
129 void __iomem *io_base;
130 struct omap_des_ctx *ctx;
135 struct tasklet_struct done_task;
137 struct ablkcipher_request *req;
138 struct crypto_engine *engine;
140 * total is used by PIO mode for book keeping so introduce
141 * variable total_save as need it to calc page_order
146 struct scatterlist *in_sg;
147 struct scatterlist *out_sg;
149 /* Buffers for copying for unaligned cases */
150 struct scatterlist in_sgl;
151 struct scatterlist out_sgl;
152 struct scatterlist *orig_out;
155 struct scatter_walk in_walk;
156 struct scatter_walk out_walk;
157 struct dma_chan *dma_lch_in;
158 struct dma_chan *dma_lch_out;
162 const struct omap_des_pdata *pdata;
165 /* keep registered devices data here */
166 static LIST_HEAD(dev_list);
167 static DEFINE_SPINLOCK(list_lock);
170 #define omap_des_read(dd, offset) \
173 _read_ret = __raw_readl(dd->io_base + offset); \
174 pr_err("omap_des_read(" #offset "=%#x)= %#x\n", \
175 offset, _read_ret); \
179 static inline u32 omap_des_read(struct omap_des_dev *dd, u32 offset)
181 return __raw_readl(dd->io_base + offset);
186 #define omap_des_write(dd, offset, value) \
188 pr_err("omap_des_write(" #offset "=%#x) value=%#x\n", \
190 __raw_writel(value, dd->io_base + offset); \
193 static inline void omap_des_write(struct omap_des_dev *dd, u32 offset,
196 __raw_writel(value, dd->io_base + offset);
200 static inline void omap_des_write_mask(struct omap_des_dev *dd, u32 offset,
205 val = omap_des_read(dd, offset);
208 omap_des_write(dd, offset, val);
211 static void omap_des_write_n(struct omap_des_dev *dd, u32 offset,
212 u32 *value, int count)
214 for (; count--; value++, offset += 4)
215 omap_des_write(dd, offset, *value);
218 static int omap_des_hw_init(struct omap_des_dev *dd)
223 * clocks are enabled when request starts and disabled when finished.
224 * It may be long delays between requests.
225 * Device might go to off mode to save power.
227 err = pm_runtime_get_sync(dd->dev);
229 pm_runtime_put_noidle(dd->dev);
230 dev_err(dd->dev, "%s: failed to get_sync(%d)\n", __func__, err);
234 if (!(dd->flags & FLAGS_INIT)) {
235 dd->flags |= FLAGS_INIT;
242 static int omap_des_write_ctrl(struct omap_des_dev *dd)
246 u32 val = 0, mask = 0;
248 err = omap_des_hw_init(dd);
252 key32 = dd->ctx->keylen / sizeof(u32);
254 /* it seems a key should always be set even if it has not changed */
255 for (i = 0; i < key32; i++) {
256 omap_des_write(dd, DES_REG_KEY(dd, i),
257 __le32_to_cpu(dd->ctx->key[i]));
260 if ((dd->flags & FLAGS_CBC) && dd->req->info)
261 omap_des_write_n(dd, DES_REG_IV(dd, 0), dd->req->info, 2);
263 if (dd->flags & FLAGS_CBC)
264 val |= DES_REG_CTRL_CBC;
265 if (dd->flags & FLAGS_ENCRYPT)
266 val |= DES_REG_CTRL_DIRECTION;
268 val |= DES_REG_CTRL_TDES;
270 mask |= DES_REG_CTRL_CBC | DES_REG_CTRL_DIRECTION | DES_REG_CTRL_TDES;
272 omap_des_write_mask(dd, DES_REG_CTRL(dd), val, mask);
277 static void omap_des_dma_trigger_omap4(struct omap_des_dev *dd, int length)
281 omap_des_write(dd, DES_REG_LENGTH_N(0), length);
283 val = dd->pdata->dma_start;
285 if (dd->dma_lch_out != NULL)
286 val |= dd->pdata->dma_enable_out;
287 if (dd->dma_lch_in != NULL)
288 val |= dd->pdata->dma_enable_in;
290 mask = dd->pdata->dma_enable_out | dd->pdata->dma_enable_in |
291 dd->pdata->dma_start;
293 omap_des_write_mask(dd, DES_REG_MASK(dd), val, mask);
296 static void omap_des_dma_stop(struct omap_des_dev *dd)
300 mask = dd->pdata->dma_enable_out | dd->pdata->dma_enable_in |
301 dd->pdata->dma_start;
303 omap_des_write_mask(dd, DES_REG_MASK(dd), 0, mask);
306 static struct omap_des_dev *omap_des_find_dev(struct omap_des_ctx *ctx)
308 struct omap_des_dev *dd = NULL, *tmp;
310 spin_lock_bh(&list_lock);
312 list_for_each_entry(tmp, &dev_list, list) {
313 /* FIXME: take fist available des core */
319 /* already found before */
322 spin_unlock_bh(&list_lock);
327 static void omap_des_dma_out_callback(void *data)
329 struct omap_des_dev *dd = data;
331 /* dma_lch_out - completed */
332 tasklet_schedule(&dd->done_task);
335 static int omap_des_dma_init(struct omap_des_dev *dd)
339 dd->dma_lch_out = NULL;
340 dd->dma_lch_in = NULL;
342 dd->dma_lch_in = dma_request_chan(dd->dev, "rx");
343 if (IS_ERR(dd->dma_lch_in)) {
344 dev_err(dd->dev, "Unable to request in DMA channel\n");
345 return PTR_ERR(dd->dma_lch_in);
348 dd->dma_lch_out = dma_request_chan(dd->dev, "tx");
349 if (IS_ERR(dd->dma_lch_out)) {
350 dev_err(dd->dev, "Unable to request out DMA channel\n");
351 err = PTR_ERR(dd->dma_lch_out);
358 dma_release_channel(dd->dma_lch_in);
363 static void omap_des_dma_cleanup(struct omap_des_dev *dd)
368 dma_release_channel(dd->dma_lch_out);
369 dma_release_channel(dd->dma_lch_in);
372 static void sg_copy_buf(void *buf, struct scatterlist *sg,
373 unsigned int start, unsigned int nbytes, int out)
375 struct scatter_walk walk;
380 scatterwalk_start(&walk, sg);
381 scatterwalk_advance(&walk, start);
382 scatterwalk_copychunks(buf, &walk, nbytes, out);
383 scatterwalk_done(&walk, out, 0);
386 static int omap_des_crypt_dma(struct crypto_tfm *tfm,
387 struct scatterlist *in_sg, struct scatterlist *out_sg,
388 int in_sg_len, int out_sg_len)
390 struct omap_des_ctx *ctx = crypto_tfm_ctx(tfm);
391 struct omap_des_dev *dd = ctx->dd;
392 struct dma_async_tx_descriptor *tx_in, *tx_out;
393 struct dma_slave_config cfg;
397 scatterwalk_start(&dd->in_walk, dd->in_sg);
398 scatterwalk_start(&dd->out_walk, dd->out_sg);
400 /* Enable DATAIN interrupt and let it take
402 omap_des_write(dd, DES_REG_IRQ_ENABLE(dd), 0x2);
406 dma_sync_sg_for_device(dd->dev, dd->in_sg, in_sg_len, DMA_TO_DEVICE);
408 memset(&cfg, 0, sizeof(cfg));
410 cfg.src_addr = dd->phys_base + DES_REG_DATA_N(dd, 0);
411 cfg.dst_addr = dd->phys_base + DES_REG_DATA_N(dd, 0);
412 cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
413 cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
414 cfg.src_maxburst = DST_MAXBURST;
415 cfg.dst_maxburst = DST_MAXBURST;
418 ret = dmaengine_slave_config(dd->dma_lch_in, &cfg);
420 dev_err(dd->dev, "can't configure IN dmaengine slave: %d\n",
425 tx_in = dmaengine_prep_slave_sg(dd->dma_lch_in, in_sg, in_sg_len,
427 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
429 dev_err(dd->dev, "IN prep_slave_sg() failed\n");
433 /* No callback necessary */
434 tx_in->callback_param = dd;
437 ret = dmaengine_slave_config(dd->dma_lch_out, &cfg);
439 dev_err(dd->dev, "can't configure OUT dmaengine slave: %d\n",
444 tx_out = dmaengine_prep_slave_sg(dd->dma_lch_out, out_sg, out_sg_len,
446 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
448 dev_err(dd->dev, "OUT prep_slave_sg() failed\n");
452 tx_out->callback = omap_des_dma_out_callback;
453 tx_out->callback_param = dd;
455 dmaengine_submit(tx_in);
456 dmaengine_submit(tx_out);
458 dma_async_issue_pending(dd->dma_lch_in);
459 dma_async_issue_pending(dd->dma_lch_out);
462 dd->pdata->trigger(dd, dd->total);
467 static int omap_des_crypt_dma_start(struct omap_des_dev *dd)
469 struct crypto_tfm *tfm = crypto_ablkcipher_tfm(
470 crypto_ablkcipher_reqtfm(dd->req));
473 pr_debug("total: %d\n", dd->total);
476 err = dma_map_sg(dd->dev, dd->in_sg, dd->in_sg_len,
479 dev_err(dd->dev, "dma_map_sg() error\n");
483 err = dma_map_sg(dd->dev, dd->out_sg, dd->out_sg_len,
486 dev_err(dd->dev, "dma_map_sg() error\n");
491 err = omap_des_crypt_dma(tfm, dd->in_sg, dd->out_sg, dd->in_sg_len,
493 if (err && !dd->pio_only) {
494 dma_unmap_sg(dd->dev, dd->in_sg, dd->in_sg_len, DMA_TO_DEVICE);
495 dma_unmap_sg(dd->dev, dd->out_sg, dd->out_sg_len,
502 static void omap_des_finish_req(struct omap_des_dev *dd, int err)
504 struct ablkcipher_request *req = dd->req;
506 pr_debug("err: %d\n", err);
508 pm_runtime_put(dd->dev);
509 crypto_finalize_request(dd->engine, req, err);
512 static int omap_des_crypt_dma_stop(struct omap_des_dev *dd)
514 pr_debug("total: %d\n", dd->total);
516 omap_des_dma_stop(dd);
518 dmaengine_terminate_all(dd->dma_lch_in);
519 dmaengine_terminate_all(dd->dma_lch_out);
524 static int omap_des_copy_needed(struct scatterlist *sg)
527 if (!IS_ALIGNED(sg->offset, 4))
529 if (!IS_ALIGNED(sg->length, DES_BLOCK_SIZE))
536 static int omap_des_copy_sgs(struct omap_des_dev *dd)
538 void *buf_in, *buf_out;
541 pages = dd->total >> PAGE_SHIFT;
543 if (dd->total & (PAGE_SIZE-1))
548 buf_in = (void *)__get_free_pages(GFP_ATOMIC, pages);
549 buf_out = (void *)__get_free_pages(GFP_ATOMIC, pages);
551 if (!buf_in || !buf_out) {
552 pr_err("Couldn't allocated pages for unaligned cases.\n");
556 dd->orig_out = dd->out_sg;
558 sg_copy_buf(buf_in, dd->in_sg, 0, dd->total, 0);
560 sg_init_table(&dd->in_sgl, 1);
561 sg_set_buf(&dd->in_sgl, buf_in, dd->total);
562 dd->in_sg = &dd->in_sgl;
565 sg_init_table(&dd->out_sgl, 1);
566 sg_set_buf(&dd->out_sgl, buf_out, dd->total);
567 dd->out_sg = &dd->out_sgl;
573 static int omap_des_handle_queue(struct omap_des_dev *dd,
574 struct ablkcipher_request *req)
577 return crypto_transfer_request_to_engine(dd->engine, req);
582 static int omap_des_prepare_req(struct crypto_engine *engine,
583 struct ablkcipher_request *req)
585 struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(
586 crypto_ablkcipher_reqtfm(req));
587 struct omap_des_dev *dd = omap_des_find_dev(ctx);
588 struct omap_des_reqctx *rctx;
593 /* assign new request to device */
595 dd->total = req->nbytes;
596 dd->total_save = req->nbytes;
597 dd->in_sg = req->src;
598 dd->out_sg = req->dst;
600 dd->in_sg_len = sg_nents_for_len(dd->in_sg, dd->total);
601 if (dd->in_sg_len < 0)
602 return dd->in_sg_len;
604 dd->out_sg_len = sg_nents_for_len(dd->out_sg, dd->total);
605 if (dd->out_sg_len < 0)
606 return dd->out_sg_len;
608 if (omap_des_copy_needed(dd->in_sg) ||
609 omap_des_copy_needed(dd->out_sg)) {
610 if (omap_des_copy_sgs(dd))
611 pr_err("Failed to copy SGs for unaligned cases\n");
617 rctx = ablkcipher_request_ctx(req);
618 ctx = crypto_ablkcipher_ctx(crypto_ablkcipher_reqtfm(req));
619 rctx->mode &= FLAGS_MODE_MASK;
620 dd->flags = (dd->flags & ~FLAGS_MODE_MASK) | rctx->mode;
625 return omap_des_write_ctrl(dd);
628 static int omap_des_crypt_req(struct crypto_engine *engine,
629 struct ablkcipher_request *req)
631 struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(
632 crypto_ablkcipher_reqtfm(req));
633 struct omap_des_dev *dd = omap_des_find_dev(ctx);
638 return omap_des_crypt_dma_start(dd);
641 static void omap_des_done_task(unsigned long data)
643 struct omap_des_dev *dd = (struct omap_des_dev *)data;
644 void *buf_in, *buf_out;
647 pr_debug("enter done_task\n");
650 dma_sync_sg_for_device(dd->dev, dd->out_sg, dd->out_sg_len,
652 dma_unmap_sg(dd->dev, dd->in_sg, dd->in_sg_len, DMA_TO_DEVICE);
653 dma_unmap_sg(dd->dev, dd->out_sg, dd->out_sg_len,
655 omap_des_crypt_dma_stop(dd);
658 if (dd->sgs_copied) {
659 buf_in = sg_virt(&dd->in_sgl);
660 buf_out = sg_virt(&dd->out_sgl);
662 sg_copy_buf(buf_out, dd->orig_out, 0, dd->total_save, 1);
664 pages = get_order(dd->total_save);
665 free_pages((unsigned long)buf_in, pages);
666 free_pages((unsigned long)buf_out, pages);
669 omap_des_finish_req(dd, 0);
674 static int omap_des_crypt(struct ablkcipher_request *req, unsigned long mode)
676 struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(
677 crypto_ablkcipher_reqtfm(req));
678 struct omap_des_reqctx *rctx = ablkcipher_request_ctx(req);
679 struct omap_des_dev *dd;
681 pr_debug("nbytes: %d, enc: %d, cbc: %d\n", req->nbytes,
682 !!(mode & FLAGS_ENCRYPT),
683 !!(mode & FLAGS_CBC));
685 if (!IS_ALIGNED(req->nbytes, DES_BLOCK_SIZE)) {
686 pr_err("request size is not exact amount of DES blocks\n");
690 dd = omap_des_find_dev(ctx);
696 return omap_des_handle_queue(dd, req);
699 /* ********************** ALG API ************************************ */
701 static int omap_des_setkey(struct crypto_ablkcipher *tfm, const u8 *key,
704 struct omap_des_ctx *ctx = crypto_ablkcipher_ctx(tfm);
706 if (keylen != DES_KEY_SIZE && keylen != (3*DES_KEY_SIZE))
709 pr_debug("enter, keylen: %d\n", keylen);
711 memcpy(ctx->key, key, keylen);
712 ctx->keylen = keylen;
717 static int omap_des_ecb_encrypt(struct ablkcipher_request *req)
719 return omap_des_crypt(req, FLAGS_ENCRYPT);
722 static int omap_des_ecb_decrypt(struct ablkcipher_request *req)
724 return omap_des_crypt(req, 0);
727 static int omap_des_cbc_encrypt(struct ablkcipher_request *req)
729 return omap_des_crypt(req, FLAGS_ENCRYPT | FLAGS_CBC);
732 static int omap_des_cbc_decrypt(struct ablkcipher_request *req)
734 return omap_des_crypt(req, FLAGS_CBC);
737 static int omap_des_cra_init(struct crypto_tfm *tfm)
741 tfm->crt_ablkcipher.reqsize = sizeof(struct omap_des_reqctx);
746 static void omap_des_cra_exit(struct crypto_tfm *tfm)
751 /* ********************** ALGS ************************************ */
753 static struct crypto_alg algs_ecb_cbc[] = {
755 .cra_name = "ecb(des)",
756 .cra_driver_name = "ecb-des-omap",
758 .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
759 CRYPTO_ALG_KERN_DRIVER_ONLY |
761 .cra_blocksize = DES_BLOCK_SIZE,
762 .cra_ctxsize = sizeof(struct omap_des_ctx),
764 .cra_type = &crypto_ablkcipher_type,
765 .cra_module = THIS_MODULE,
766 .cra_init = omap_des_cra_init,
767 .cra_exit = omap_des_cra_exit,
768 .cra_u.ablkcipher = {
769 .min_keysize = DES_KEY_SIZE,
770 .max_keysize = DES_KEY_SIZE,
771 .setkey = omap_des_setkey,
772 .encrypt = omap_des_ecb_encrypt,
773 .decrypt = omap_des_ecb_decrypt,
777 .cra_name = "cbc(des)",
778 .cra_driver_name = "cbc-des-omap",
780 .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
781 CRYPTO_ALG_KERN_DRIVER_ONLY |
783 .cra_blocksize = DES_BLOCK_SIZE,
784 .cra_ctxsize = sizeof(struct omap_des_ctx),
786 .cra_type = &crypto_ablkcipher_type,
787 .cra_module = THIS_MODULE,
788 .cra_init = omap_des_cra_init,
789 .cra_exit = omap_des_cra_exit,
790 .cra_u.ablkcipher = {
791 .min_keysize = DES_KEY_SIZE,
792 .max_keysize = DES_KEY_SIZE,
793 .ivsize = DES_BLOCK_SIZE,
794 .setkey = omap_des_setkey,
795 .encrypt = omap_des_cbc_encrypt,
796 .decrypt = omap_des_cbc_decrypt,
800 .cra_name = "ecb(des3_ede)",
801 .cra_driver_name = "ecb-des3-omap",
803 .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
804 CRYPTO_ALG_KERN_DRIVER_ONLY |
806 .cra_blocksize = DES_BLOCK_SIZE,
807 .cra_ctxsize = sizeof(struct omap_des_ctx),
809 .cra_type = &crypto_ablkcipher_type,
810 .cra_module = THIS_MODULE,
811 .cra_init = omap_des_cra_init,
812 .cra_exit = omap_des_cra_exit,
813 .cra_u.ablkcipher = {
814 .min_keysize = 3*DES_KEY_SIZE,
815 .max_keysize = 3*DES_KEY_SIZE,
816 .setkey = omap_des_setkey,
817 .encrypt = omap_des_ecb_encrypt,
818 .decrypt = omap_des_ecb_decrypt,
822 .cra_name = "cbc(des3_ede)",
823 .cra_driver_name = "cbc-des3-omap",
825 .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER |
826 CRYPTO_ALG_KERN_DRIVER_ONLY |
828 .cra_blocksize = DES_BLOCK_SIZE,
829 .cra_ctxsize = sizeof(struct omap_des_ctx),
831 .cra_type = &crypto_ablkcipher_type,
832 .cra_module = THIS_MODULE,
833 .cra_init = omap_des_cra_init,
834 .cra_exit = omap_des_cra_exit,
835 .cra_u.ablkcipher = {
836 .min_keysize = 3*DES_KEY_SIZE,
837 .max_keysize = 3*DES_KEY_SIZE,
838 .ivsize = DES_BLOCK_SIZE,
839 .setkey = omap_des_setkey,
840 .encrypt = omap_des_cbc_encrypt,
841 .decrypt = omap_des_cbc_decrypt,
846 static struct omap_des_algs_info omap_des_algs_info_ecb_cbc[] = {
848 .algs_list = algs_ecb_cbc,
849 .size = ARRAY_SIZE(algs_ecb_cbc),
854 static const struct omap_des_pdata omap_des_pdata_omap4 = {
855 .algs_info = omap_des_algs_info_ecb_cbc,
856 .algs_info_size = ARRAY_SIZE(omap_des_algs_info_ecb_cbc),
857 .trigger = omap_des_dma_trigger_omap4,
864 .irq_status_ofs = 0x3c,
865 .irq_enable_ofs = 0x40,
866 .dma_enable_in = BIT(5),
867 .dma_enable_out = BIT(6),
868 .major_mask = 0x0700,
870 .minor_mask = 0x003f,
874 static irqreturn_t omap_des_irq(int irq, void *dev_id)
876 struct omap_des_dev *dd = dev_id;
880 status = omap_des_read(dd, DES_REG_IRQ_STATUS(dd));
881 if (status & DES_REG_IRQ_DATA_IN) {
882 omap_des_write(dd, DES_REG_IRQ_ENABLE(dd), 0x0);
886 BUG_ON(_calc_walked(in) > dd->in_sg->length);
888 src = sg_virt(dd->in_sg) + _calc_walked(in);
890 for (i = 0; i < DES_BLOCK_WORDS; i++) {
891 omap_des_write(dd, DES_REG_DATA_N(dd, i), *src);
893 scatterwalk_advance(&dd->in_walk, 4);
894 if (dd->in_sg->length == _calc_walked(in)) {
895 dd->in_sg = sg_next(dd->in_sg);
897 scatterwalk_start(&dd->in_walk,
899 src = sg_virt(dd->in_sg) +
907 /* Clear IRQ status */
908 status &= ~DES_REG_IRQ_DATA_IN;
909 omap_des_write(dd, DES_REG_IRQ_STATUS(dd), status);
911 /* Enable DATA_OUT interrupt */
912 omap_des_write(dd, DES_REG_IRQ_ENABLE(dd), 0x4);
914 } else if (status & DES_REG_IRQ_DATA_OUT) {
915 omap_des_write(dd, DES_REG_IRQ_ENABLE(dd), 0x0);
919 BUG_ON(_calc_walked(out) > dd->out_sg->length);
921 dst = sg_virt(dd->out_sg) + _calc_walked(out);
923 for (i = 0; i < DES_BLOCK_WORDS; i++) {
924 *dst = omap_des_read(dd, DES_REG_DATA_N(dd, i));
925 scatterwalk_advance(&dd->out_walk, 4);
926 if (dd->out_sg->length == _calc_walked(out)) {
927 dd->out_sg = sg_next(dd->out_sg);
929 scatterwalk_start(&dd->out_walk,
931 dst = sg_virt(dd->out_sg) +
939 BUG_ON(dd->total < DES_BLOCK_SIZE);
941 dd->total -= DES_BLOCK_SIZE;
943 /* Clear IRQ status */
944 status &= ~DES_REG_IRQ_DATA_OUT;
945 omap_des_write(dd, DES_REG_IRQ_STATUS(dd), status);
948 /* All bytes read! */
949 tasklet_schedule(&dd->done_task);
951 /* Enable DATA_IN interrupt for next block */
952 omap_des_write(dd, DES_REG_IRQ_ENABLE(dd), 0x2);
958 static const struct of_device_id omap_des_of_match[] = {
960 .compatible = "ti,omap4-des",
961 .data = &omap_des_pdata_omap4,
965 MODULE_DEVICE_TABLE(of, omap_des_of_match);
967 static int omap_des_get_of(struct omap_des_dev *dd,
968 struct platform_device *pdev)
970 const struct of_device_id *match;
972 match = of_match_device(of_match_ptr(omap_des_of_match), &pdev->dev);
974 dev_err(&pdev->dev, "no compatible OF match\n");
978 dd->pdata = match->data;
983 static int omap_des_get_of(struct omap_des_dev *dd,
990 static int omap_des_get_pdev(struct omap_des_dev *dd,
991 struct platform_device *pdev)
993 /* non-DT devices get pdata from pdev */
994 dd->pdata = pdev->dev.platform_data;
999 static int omap_des_probe(struct platform_device *pdev)
1001 struct device *dev = &pdev->dev;
1002 struct omap_des_dev *dd;
1003 struct crypto_alg *algp;
1004 struct resource *res;
1005 int err = -ENOMEM, i, j, irq = -1;
1008 dd = devm_kzalloc(dev, sizeof(struct omap_des_dev), GFP_KERNEL);
1010 dev_err(dev, "unable to alloc data struct.\n");
1014 platform_set_drvdata(pdev, dd);
1016 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1018 dev_err(dev, "no MEM resource info\n");
1022 err = (dev->of_node) ? omap_des_get_of(dd, pdev) :
1023 omap_des_get_pdev(dd, pdev);
1027 dd->io_base = devm_ioremap_resource(dev, res);
1028 if (IS_ERR(dd->io_base)) {
1029 err = PTR_ERR(dd->io_base);
1032 dd->phys_base = res->start;
1034 pm_runtime_enable(dev);
1035 pm_runtime_irq_safe(dev);
1036 err = pm_runtime_get_sync(dev);
1038 pm_runtime_put_noidle(dev);
1039 dev_err(dd->dev, "%s: failed to get_sync(%d)\n", __func__, err);
1043 omap_des_dma_stop(dd);
1045 reg = omap_des_read(dd, DES_REG_REV(dd));
1047 pm_runtime_put_sync(dev);
1049 dev_info(dev, "OMAP DES hw accel rev: %u.%u\n",
1050 (reg & dd->pdata->major_mask) >> dd->pdata->major_shift,
1051 (reg & dd->pdata->minor_mask) >> dd->pdata->minor_shift);
1053 tasklet_init(&dd->done_task, omap_des_done_task, (unsigned long)dd);
1055 err = omap_des_dma_init(dd);
1056 if (err == -EPROBE_DEFER) {
1058 } else if (err && DES_REG_IRQ_STATUS(dd) && DES_REG_IRQ_ENABLE(dd)) {
1061 irq = platform_get_irq(pdev, 0);
1063 dev_err(dev, "can't get IRQ resource\n");
1067 err = devm_request_irq(dev, irq, omap_des_irq, 0,
1070 dev_err(dev, "Unable to grab omap-des IRQ\n");
1076 INIT_LIST_HEAD(&dd->list);
1077 spin_lock(&list_lock);
1078 list_add_tail(&dd->list, &dev_list);
1079 spin_unlock(&list_lock);
1081 for (i = 0; i < dd->pdata->algs_info_size; i++) {
1082 for (j = 0; j < dd->pdata->algs_info[i].size; j++) {
1083 algp = &dd->pdata->algs_info[i].algs_list[j];
1085 pr_debug("reg alg: %s\n", algp->cra_name);
1086 INIT_LIST_HEAD(&algp->cra_list);
1088 err = crypto_register_alg(algp);
1092 dd->pdata->algs_info[i].registered++;
1096 /* Initialize des crypto engine */
1097 dd->engine = crypto_engine_alloc_init(dev, 1);
1101 dd->engine->prepare_request = omap_des_prepare_req;
1102 dd->engine->crypt_one_request = omap_des_crypt_req;
1103 err = crypto_engine_start(dd->engine);
1110 crypto_engine_exit(dd->engine);
1112 for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
1113 for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
1114 crypto_unregister_alg(
1115 &dd->pdata->algs_info[i].algs_list[j]);
1117 omap_des_dma_cleanup(dd);
1119 tasklet_kill(&dd->done_task);
1121 pm_runtime_disable(dev);
1125 dev_err(dev, "initialization failed.\n");
1129 static int omap_des_remove(struct platform_device *pdev)
1131 struct omap_des_dev *dd = platform_get_drvdata(pdev);
1137 spin_lock(&list_lock);
1138 list_del(&dd->list);
1139 spin_unlock(&list_lock);
1141 for (i = dd->pdata->algs_info_size - 1; i >= 0; i--)
1142 for (j = dd->pdata->algs_info[i].registered - 1; j >= 0; j--)
1143 crypto_unregister_alg(
1144 &dd->pdata->algs_info[i].algs_list[j]);
1146 tasklet_kill(&dd->done_task);
1147 omap_des_dma_cleanup(dd);
1148 pm_runtime_disable(dd->dev);
1154 #ifdef CONFIG_PM_SLEEP
1155 static int omap_des_suspend(struct device *dev)
1157 pm_runtime_put_sync(dev);
1161 static int omap_des_resume(struct device *dev)
1165 err = pm_runtime_get_sync(dev);
1167 pm_runtime_put_noidle(dev);
1168 dev_err(dev, "%s: failed to get_sync(%d)\n", __func__, err);
1175 static SIMPLE_DEV_PM_OPS(omap_des_pm_ops, omap_des_suspend, omap_des_resume);
1177 static struct platform_driver omap_des_driver = {
1178 .probe = omap_des_probe,
1179 .remove = omap_des_remove,
1182 .pm = &omap_des_pm_ops,
1183 .of_match_table = of_match_ptr(omap_des_of_match),
1187 module_platform_driver(omap_des_driver);
1189 MODULE_DESCRIPTION("OMAP DES hw acceleration support.");
1190 MODULE_LICENSE("GPL v2");
1191 MODULE_AUTHOR("Joel Fernandes <joelf@ti.com>");