2 This file is provided under a dual BSD/GPLv2 license. When using or
3 redistributing this file, you may do so under either license.
6 Copyright(c) 2014 Intel Corporation.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of version 2 of the GNU General Public License as
9 published by the Free Software Foundation.
11 This program is distributed in the hope that it will be useful, but
12 WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 General Public License for more details.
20 Copyright(c) 2014 Intel Corporation.
21 Redistribution and use in source and binary forms, with or without
22 modification, are permitted provided that the following conditions
25 * Redistributions of source code must retain the above copyright
26 notice, this list of conditions and the following disclaimer.
27 * Redistributions in binary form must reproduce the above copyright
28 notice, this list of conditions and the following disclaimer in
29 the documentation and/or other materials provided with the
31 * Neither the name of Intel Corporation nor the names of its
32 contributors may be used to endorse or promote products derived
33 from this software without specific prior written permission.
35 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
36 "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
37 LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
38 A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
39 OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
40 SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
41 LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
42 DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
43 THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
44 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
45 OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
47 #include <linux/kernel.h>
48 #include <linux/pci.h>
49 #include <linux/aer.h>
50 #include <linux/completion.h>
51 #include <linux/workqueue.h>
52 #include <linux/delay.h>
53 #include "adf_accel_devices.h"
54 #include "adf_common_drv.h"
56 static struct workqueue_struct *device_reset_wq;
58 static pci_ers_result_t adf_error_detected(struct pci_dev *pdev,
59 pci_channel_state_t state)
61 struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);
63 pr_info("QAT: Acceleration driver hardware error detected.\n");
65 pr_err("QAT: Can't find acceleration device\n");
66 return PCI_ERS_RESULT_DISCONNECT;
69 if (state == pci_channel_io_perm_failure) {
70 pr_err("QAT: Can't recover from device error\n");
71 return PCI_ERS_RESULT_DISCONNECT;
74 return PCI_ERS_RESULT_NEED_RESET;
78 struct adf_reset_dev_data {
80 struct adf_accel_dev *accel_dev;
81 struct completion compl;
82 struct work_struct reset_work;
85 #define PPDSTAT_OFFSET 0x7E
86 static void adf_dev_restore(struct adf_accel_dev *accel_dev)
88 struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
89 struct pci_dev *parent = pdev->bus->self;
90 uint16_t ppdstat = 0, bridge_ctl = 0;
93 pr_info("QAT: Resetting device qat_dev%d\n", accel_dev->accel_id);
94 pci_read_config_word(pdev, PPDSTAT_OFFSET, &ppdstat);
95 pending = ppdstat & PCI_EXP_DEVSTA_TRPND;
101 pci_read_config_word(pdev, PPDSTAT_OFFSET, &ppdstat);
102 pending = ppdstat & PCI_EXP_DEVSTA_TRPND;
103 } while (pending && ctr++ < 10);
107 pr_info("QAT: Transaction still in progress. Proceeding\n");
109 pci_read_config_word(parent, PCI_BRIDGE_CONTROL, &bridge_ctl);
110 bridge_ctl |= PCI_BRIDGE_CTL_BUS_RESET;
111 pci_write_config_word(parent, PCI_BRIDGE_CONTROL, bridge_ctl);
113 bridge_ctl &= ~PCI_BRIDGE_CTL_BUS_RESET;
114 pci_write_config_word(parent, PCI_BRIDGE_CONTROL, bridge_ctl);
116 pci_restore_state(pdev);
117 pci_save_state(pdev);
120 static void adf_device_reset_worker(struct work_struct *work)
122 struct adf_reset_dev_data *reset_data =
123 container_of(work, struct adf_reset_dev_data, reset_work);
124 struct adf_accel_dev *accel_dev = reset_data->accel_dev;
126 adf_dev_restarting_notify(accel_dev);
127 adf_dev_stop(accel_dev);
128 adf_dev_restore(accel_dev);
129 if (adf_dev_start(accel_dev)) {
130 /* The device hanged and we can't restart it so stop here */
131 dev_err(&GET_DEV(accel_dev), "Restart device failed\n");
133 WARN(1, "QAT: device restart failed. Device is unusable\n");
136 adf_dev_restarted_notify(accel_dev);
137 clear_bit(ADF_STATUS_RESTARTING, &accel_dev->status);
139 /* The dev is back alive. Notify the caller if in sync mode */
140 if (reset_data->mode == ADF_DEV_RESET_SYNC)
141 complete(&reset_data->compl);
146 static int adf_dev_aer_schedule_reset(struct adf_accel_dev *accel_dev,
147 enum adf_dev_reset_mode mode)
149 struct adf_reset_dev_data *reset_data;
151 if (adf_dev_started(accel_dev) &&
152 !test_bit(ADF_STATUS_RESTARTING, &accel_dev->status))
155 set_bit(ADF_STATUS_RESTARTING, &accel_dev->status);
156 reset_data = kzalloc(sizeof(*reset_data), GFP_ATOMIC);
159 reset_data->accel_dev = accel_dev;
160 init_completion(&reset_data->compl);
161 reset_data->mode = mode;
162 INIT_WORK(&reset_data->reset_work, adf_device_reset_worker);
163 queue_work(device_reset_wq, &reset_data->reset_work);
165 /* If in sync mode wait for the result */
166 if (mode == ADF_DEV_RESET_SYNC) {
168 /* Maximum device reset time is 10 seconds */
169 unsigned long wait_jiffies = msecs_to_jiffies(10000);
170 unsigned long timeout = wait_for_completion_timeout(
171 &reset_data->compl, wait_jiffies);
173 pr_err("QAT: Reset device timeout expired\n");
182 static pci_ers_result_t adf_slot_reset(struct pci_dev *pdev)
184 struct adf_accel_dev *accel_dev = adf_devmgr_pci_to_accel_dev(pdev);
187 pr_err("QAT: Can't find acceleration device\n");
188 return PCI_ERS_RESULT_DISCONNECT;
190 pci_cleanup_aer_uncorrect_error_status(pdev);
191 if (adf_dev_aer_schedule_reset(accel_dev, ADF_DEV_RESET_SYNC))
192 return PCI_ERS_RESULT_DISCONNECT;
194 return PCI_ERS_RESULT_RECOVERED;
197 static void adf_resume(struct pci_dev *pdev)
199 pr_info("QAT: Acceleration driver reset completed\n");
200 pr_info("QAT: Device is up and runnig\n");
203 static struct pci_error_handlers adf_err_handler = {
204 .error_detected = adf_error_detected,
205 .slot_reset = adf_slot_reset,
206 .resume = adf_resume,
210 * adf_enable_aer() - Enable Advance Error Reporting for acceleration device
211 * @accel_dev: Pointer to acceleration device.
212 * @adf: PCI device driver owning the given acceleration device.
214 * Function enables PCI Advance Error Reporting for the
215 * QAT acceleration device accel_dev.
216 * To be used by QAT device specific drivers.
218 * Return: 0 on success, error code othewise.
220 int adf_enable_aer(struct adf_accel_dev *accel_dev, struct pci_driver *adf)
222 struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
224 adf->err_handler = &adf_err_handler;
225 pci_enable_pcie_error_reporting(pdev);
228 EXPORT_SYMBOL_GPL(adf_enable_aer);
231 * adf_disable_aer() - Enable Advance Error Reporting for acceleration device
232 * @accel_dev: Pointer to acceleration device.
234 * Function disables PCI Advance Error Reporting for the
235 * QAT acceleration device accel_dev.
236 * To be used by QAT device specific drivers.
240 void adf_disable_aer(struct adf_accel_dev *accel_dev)
242 struct pci_dev *pdev = accel_to_pci_dev(accel_dev);
244 pci_disable_pcie_error_reporting(pdev);
246 EXPORT_SYMBOL_GPL(adf_disable_aer);
248 int adf_init_aer(void)
250 device_reset_wq = create_workqueue("qat_device_reset_wq");
251 return (device_reset_wq == NULL) ? -EFAULT : 0;
254 void adf_exit_aer(void)
257 destroy_workqueue(device_reset_wq);
258 device_reset_wq = NULL;