2 # DMA engine configuration
6 bool "DMA Engine support"
9 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
12 RAID operations in the MD driver. This menu only presents
13 DMA Device drivers supported by the configured arch, it may
14 be empty in some cases.
16 config DMADEVICES_DEBUG
17 bool "DMA Engine debugging"
18 depends on DMADEVICES != n
20 This is an option for use by developers; most people should
21 say N here. This enables DMA engine core and driver debugging.
23 config DMADEVICES_VDEBUG
24 bool "DMA Engine verbose debugging"
25 depends on DMADEVICES_DEBUG != n
27 This is an option for use by developers; most people should
28 say N here. This enables deeper (more verbose) debugging of
29 the DMA engine core and drivers.
37 tristate "Intel MID DMA support for Peripheral DMA controllers"
42 Enable support for the Intel(R) MID DMA engine present
43 in Intel MID chipsets.
45 Say Y here if you have such a chipset.
49 config ASYNC_TX_ENABLE_CHANNEL_SWITCH
53 bool "ARM PrimeCell PL080 or PL081 support"
56 select DMA_VIRTUAL_CHANNELS
58 Platform has a PL08x DMAC device
59 which can provide DMA engine support
62 tristate "Intel I/OAT DMA support"
66 select ASYNC_TX_DISABLE_PQ_VAL_DMA
67 select ASYNC_TX_DISABLE_XOR_VAL_DMA
69 Enable support for the Intel(R) I/OAT DMA engine present
70 in recent Intel Xeon chipsets.
72 Say Y here if you have such a chipset.
77 tristate "Intel IOP ADMA support"
78 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
80 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
82 Enable support for the Intel(R) IOP Series RAID engines.
85 tristate "Synopsys DesignWare AHB DMA support"
87 default y if CPU_AT32AP7000
89 Support the Synopsys DesignWare AHB DMA controller. This
90 can be integrated in chips such as the Atmel AT32ap7000.
92 config DW_DMAC_BIG_ENDIAN_IO
93 bool "Use big endian I/O register access"
97 Say yes here to use big endian I/O access when reading and writing
98 to the DMA controller registers. This is needed on some platforms,
99 like the Atmel AVR32 architecture.
101 If unsure, use the default setting.
104 tristate "Atmel AHB DMA support"
108 Support the Atmel AHB DMA controller.
111 tristate "Freescale Elo and Elo Plus DMA support"
114 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
116 Enable support for the Freescale Elo and Elo Plus DMA controllers.
117 The Elo is the DMA controller on some 82xx and 83xx parts, and the
118 Elo Plus is the DMA controller on 85xx and 86xx parts.
121 tristate "Freescale MPC512x built-in DMA engine support"
122 depends on PPC_MPC512x || PPC_MPC831x
125 Enable support for the Freescale MPC512x built-in DMA engine.
127 source "drivers/dma/bestcomm/Kconfig"
130 bool "Marvell XOR engine support"
131 depends on PLAT_ORION
133 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
135 Enable support for the Marvell XOR engine.
138 bool "MX3x Image Processing Unit support"
143 If you plan to use the Image Processing unit in the i.MX3x, say
144 Y here. If unsure, select Y.
147 int "Number of dynamically mapped interrupts for IPU"
152 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
153 To avoid bloating the irq_desc[] array we allocate a sufficient
154 number of IRQ slots and map them dynamically to specific sources.
157 tristate "Toshiba TXx9 SoC DMA support"
158 depends on MACH_TX49XX || MACH_TX39XX
161 Support the TXx9 SoC internal DMA controller. This can be
162 integrated in chips such as the Toshiba TX4927/38/39.
164 config TEGRA20_APB_DMA
165 bool "NVIDIA Tegra20 APB DMA support"
166 depends on ARCH_TEGRA
169 Support for the NVIDIA Tegra20 APB DMA controller driver. The
170 DMA controller is having multiple DMA channel which can be
171 configured for different peripherals like audio, UART, SPI,
172 I2C etc which is in APB bus.
173 This DMA controller transfers data from memory to peripheral fifo
174 or vice versa. It does not support memory to memory data transfer.
179 tristate "Renesas SuperH DMAC support"
180 depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
181 depends on !SH_DMA_API
184 Enable support for the Renesas SuperH DMA controllers.
187 bool "ST-Ericsson COH901318 DMA support"
191 Enable support for ST-Ericsson COH 901 318 DMA.
194 bool "ST-Ericsson DMA40 support"
195 depends on ARCH_U8500
198 Support for ST-Ericsson DMA40 controller
200 config AMCC_PPC440SPE_ADMA
201 tristate "AMCC PPC440SPe ADMA support"
202 depends on 440SPe || 440SP
204 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
205 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
207 Enable support for the AMCC PPC440SPe RAID engines.
210 tristate "Timberdale FPGA DMA support"
211 depends on MFD_TIMBERDALE || HAS_IOMEM
214 Enable support for the Timberdale FPGA DMA engine.
217 tristate "CSR SiRFprimaII/SiRFmarco DMA support"
221 Enable support for the CSR SiRFprimaII DMA engine.
224 tristate "TI EDMA support"
225 depends on ARCH_DAVINCI
227 select DMA_VIRTUAL_CHANNELS
230 Enable support for the TI EDMA controller. This DMA
231 engine is found on TI DaVinci and AM33xx parts.
233 config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
237 tristate "DMA API Driver for PL330"
241 Select if your platform has one or more PL330 DMACs.
242 You need to provide platform specific settings via
243 platform_data for a dma-pl330 device.
246 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
247 depends on PCI && X86
250 Enable support for Intel EG20T PCH DMA engine.
252 This driver also can be used for LAPIS Semiconductor IOH(Input/
253 Output Hub), ML7213, ML7223 and ML7831.
254 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
255 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
256 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
257 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
260 tristate "i.MX SDMA support"
264 Support the i.MX SDMA engine. This engine is integrated into
265 Freescale i.MX25/31/35/51/53 chips.
268 tristate "i.MX DMA support"
272 Support the i.MX DMA engine. This engine is integrated into
273 Freescale i.MX1/21/27 chips.
276 bool "MXS DMA support"
277 depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
281 Support the MXS DMA engine. This engine including APBH-DMA
282 and APBX-DMA is integrated into Freescale i.MX23/28 chips.
285 bool "Cirrus Logic EP93xx DMA support"
286 depends on ARCH_EP93XX
289 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
292 tristate "SA-11x0 DMA support"
293 depends on ARCH_SA1100
295 select DMA_VIRTUAL_CHANNELS
297 Support the DMA engine found on Intel StrongARM SA-1100 and
298 SA-1110 SoCs. This DMA engine can only be used with on-chip
302 bool "MMP Two-Channel DMA support"
306 Support the MMP Two-Channel DMA engine.
307 This engine used for MMP Audio DMA and pxa910 SQU.
309 Say Y here if you enabled MMP ADMA, otherwise say N.
312 tristate "OMAP DMA support"
315 select DMA_VIRTUAL_CHANNELS
318 bool "MMP PDMA support"
319 depends on (ARCH_MMP || ARCH_PXA)
322 Support the MMP PDMA engine for PXA and MMP platfrom.
327 config DMA_VIRTUAL_CHANNELS
334 comment "DMA Clients"
335 depends on DMA_ENGINE
338 bool "Network: TCP receive copy offload"
339 depends on DMA_ENGINE && NET
340 default (INTEL_IOATDMA || FSL_DMA)
342 This enables the use of DMA engines in the network stack to
343 offload receive copy-to-user operations, freeing CPU cycles.
345 Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
349 bool "Async_tx: Offload support for the async_tx api"
350 depends on DMA_ENGINE
352 This allows the async_tx api to take advantage of offload engines for
353 memcpy, memset, xor, and raid6 p+q operations. If your platform has
354 a dma engine that can perform raid operations and you have enabled
360 tristate "DMA Test client"
361 depends on DMA_ENGINE
363 Simple DMA test client. Say N unless you're debugging a