2 * DMA Engine test module
4 * Copyright (C) 2007 Atmel Corporation
5 * Copyright (C) 2013 Intel Corporation
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
13 #include <linux/delay.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/dmaengine.h>
16 #include <linux/freezer.h>
17 #include <linux/init.h>
18 #include <linux/kthread.h>
19 #include <linux/sched/task.h>
20 #include <linux/module.h>
21 #include <linux/moduleparam.h>
22 #include <linux/random.h>
23 #include <linux/slab.h>
24 #include <linux/wait.h>
26 static unsigned int test_buf_size = 16384;
27 module_param(test_buf_size, uint, S_IRUGO | S_IWUSR);
28 MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
30 static char test_channel[20];
31 module_param_string(channel, test_channel, sizeof(test_channel),
33 MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
35 static char test_device[32];
36 module_param_string(device, test_device, sizeof(test_device),
38 MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
40 static unsigned int threads_per_chan = 1;
41 module_param(threads_per_chan, uint, S_IRUGO | S_IWUSR);
42 MODULE_PARM_DESC(threads_per_chan,
43 "Number of threads to start per channel (default: 1)");
45 static unsigned int max_channels;
46 module_param(max_channels, uint, S_IRUGO | S_IWUSR);
47 MODULE_PARM_DESC(max_channels,
48 "Maximum number of channels to use (default: all)");
50 static unsigned int iterations;
51 module_param(iterations, uint, S_IRUGO | S_IWUSR);
52 MODULE_PARM_DESC(iterations,
53 "Iterations before stopping test (default: infinite)");
55 static unsigned int sg_buffers = 1;
56 module_param(sg_buffers, uint, S_IRUGO | S_IWUSR);
57 MODULE_PARM_DESC(sg_buffers,
58 "Number of scatter gather buffers (default: 1)");
60 static unsigned int dmatest;
61 module_param(dmatest, uint, S_IRUGO | S_IWUSR);
62 MODULE_PARM_DESC(dmatest,
63 "dmatest 0-memcpy 1-slave_sg (default: 0)");
65 static unsigned int xor_sources = 3;
66 module_param(xor_sources, uint, S_IRUGO | S_IWUSR);
67 MODULE_PARM_DESC(xor_sources,
68 "Number of xor source buffers (default: 3)");
70 static unsigned int pq_sources = 3;
71 module_param(pq_sources, uint, S_IRUGO | S_IWUSR);
72 MODULE_PARM_DESC(pq_sources,
73 "Number of p+q source buffers (default: 3)");
75 static int timeout = 3000;
76 module_param(timeout, uint, S_IRUGO | S_IWUSR);
77 MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), "
78 "Pass -1 for infinite timeout");
81 module_param(noverify, bool, S_IRUGO | S_IWUSR);
82 MODULE_PARM_DESC(noverify, "Disable random data setup and verification");
85 module_param(verbose, bool, S_IRUGO | S_IWUSR);
86 MODULE_PARM_DESC(verbose, "Enable \"success\" result messages (default: off)");
89 * struct dmatest_params - test parameters.
90 * @buf_size: size of the memcpy test buffer
91 * @channel: bus ID of the channel to test
92 * @device: bus ID of the DMA Engine to test
93 * @threads_per_chan: number of threads to start per channel
94 * @max_channels: maximum number of channels to use
95 * @iterations: iterations before stopping test
96 * @xor_sources: number of xor source buffers
97 * @pq_sources: number of p+q source buffers
98 * @timeout: transfer timeout in msec, -1 for infinite timeout
100 struct dmatest_params {
101 unsigned int buf_size;
104 unsigned int threads_per_chan;
105 unsigned int max_channels;
106 unsigned int iterations;
107 unsigned int xor_sources;
108 unsigned int pq_sources;
114 * struct dmatest_info - test information.
115 * @params: test parameters
116 * @lock: access protection to the fields of this structure
118 static struct dmatest_info {
119 /* Test parameters */
120 struct dmatest_params params;
123 struct list_head channels;
124 unsigned int nr_channels;
128 .channels = LIST_HEAD_INIT(test_info.channels),
129 .lock = __MUTEX_INITIALIZER(test_info.lock),
132 static int dmatest_run_set(const char *val, const struct kernel_param *kp);
133 static int dmatest_run_get(char *val, const struct kernel_param *kp);
134 static const struct kernel_param_ops run_ops = {
135 .set = dmatest_run_set,
136 .get = dmatest_run_get,
138 static bool dmatest_run;
139 module_param_cb(run, &run_ops, &dmatest_run, S_IRUGO | S_IWUSR);
140 MODULE_PARM_DESC(run, "Run the test (default: false)");
142 /* Maximum amount of mismatched bytes in buffer to print */
143 #define MAX_ERROR_COUNT 32
146 * Initialization patterns. All bytes in the source buffer has bit 7
147 * set, all bytes in the destination buffer has bit 7 cleared.
149 * Bit 6 is set for all bytes which are to be copied by the DMA
150 * engine. Bit 5 is set for all bytes which are to be overwritten by
153 * The remaining bits are the inverse of a counter which increments by
154 * one for each byte address.
156 #define PATTERN_SRC 0x80
157 #define PATTERN_DST 0x00
158 #define PATTERN_COPY 0x40
159 #define PATTERN_OVERWRITE 0x20
160 #define PATTERN_COUNT_MASK 0x1f
162 struct dmatest_thread {
163 struct list_head node;
164 struct dmatest_info *info;
165 struct task_struct *task;
166 struct dma_chan *chan;
171 enum dma_transaction_type type;
175 struct dmatest_chan {
176 struct list_head node;
177 struct dma_chan *chan;
178 struct list_head threads;
181 static DECLARE_WAIT_QUEUE_HEAD(thread_wait);
184 static bool is_threaded_test_run(struct dmatest_info *info)
186 struct dmatest_chan *dtc;
188 list_for_each_entry(dtc, &info->channels, node) {
189 struct dmatest_thread *thread;
191 list_for_each_entry(thread, &dtc->threads, node) {
200 static int dmatest_wait_get(char *val, const struct kernel_param *kp)
202 struct dmatest_info *info = &test_info;
203 struct dmatest_params *params = &info->params;
205 if (params->iterations)
206 wait_event(thread_wait, !is_threaded_test_run(info));
208 return param_get_bool(val, kp);
211 static const struct kernel_param_ops wait_ops = {
212 .get = dmatest_wait_get,
213 .set = param_set_bool,
215 module_param_cb(wait, &wait_ops, &wait, S_IRUGO);
216 MODULE_PARM_DESC(wait, "Wait for tests to complete (default: false)");
218 static bool dmatest_match_channel(struct dmatest_params *params,
219 struct dma_chan *chan)
221 if (params->channel[0] == '\0')
223 return strcmp(dma_chan_name(chan), params->channel) == 0;
226 static bool dmatest_match_device(struct dmatest_params *params,
227 struct dma_device *device)
229 if (params->device[0] == '\0')
231 return strcmp(dev_name(device->dev), params->device) == 0;
234 static unsigned long dmatest_random(void)
238 prandom_bytes(&buf, sizeof(buf));
242 static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len,
243 unsigned int buf_size)
248 for (; (buf = *bufs); bufs++) {
249 for (i = 0; i < start; i++)
250 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
251 for ( ; i < start + len; i++)
252 buf[i] = PATTERN_SRC | PATTERN_COPY
253 | (~i & PATTERN_COUNT_MASK);
254 for ( ; i < buf_size; i++)
255 buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
260 static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len,
261 unsigned int buf_size)
266 for (; (buf = *bufs); bufs++) {
267 for (i = 0; i < start; i++)
268 buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
269 for ( ; i < start + len; i++)
270 buf[i] = PATTERN_DST | PATTERN_OVERWRITE
271 | (~i & PATTERN_COUNT_MASK);
272 for ( ; i < buf_size; i++)
273 buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
277 static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
278 unsigned int counter, bool is_srcbuf)
280 u8 diff = actual ^ pattern;
281 u8 expected = pattern | (~counter & PATTERN_COUNT_MASK);
282 const char *thread_name = current->comm;
285 pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n",
286 thread_name, index, expected, actual);
287 else if ((pattern & PATTERN_COPY)
288 && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
289 pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n",
290 thread_name, index, expected, actual);
291 else if (diff & PATTERN_SRC)
292 pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n",
293 thread_name, index, expected, actual);
295 pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n",
296 thread_name, index, expected, actual);
299 static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
300 unsigned int end, unsigned int counter, u8 pattern,
304 unsigned int error_count = 0;
308 unsigned int counter_orig = counter;
310 for (; (buf = *bufs); bufs++) {
311 counter = counter_orig;
312 for (i = start; i < end; i++) {
314 expected = pattern | (~counter & PATTERN_COUNT_MASK);
315 if (actual != expected) {
316 if (error_count < MAX_ERROR_COUNT)
317 dmatest_mismatch(actual, pattern, i,
325 if (error_count > MAX_ERROR_COUNT)
326 pr_warn("%s: %u errors suppressed\n",
327 current->comm, error_count - MAX_ERROR_COUNT);
332 /* poor man's completion - we want to use wait_event_freezable() on it */
333 struct dmatest_done {
335 wait_queue_head_t *wait;
338 static void dmatest_callback(void *arg)
340 struct dmatest_done *done = arg;
343 wake_up_all(done->wait);
346 static unsigned int min_odd(unsigned int x, unsigned int y)
348 unsigned int val = min(x, y);
350 return val % 2 ? val : val - 1;
353 static void result(const char *err, unsigned int n, unsigned int src_off,
354 unsigned int dst_off, unsigned int len, unsigned long data)
356 pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
357 current->comm, n, err, src_off, dst_off, len, data);
360 static void dbg_result(const char *err, unsigned int n, unsigned int src_off,
361 unsigned int dst_off, unsigned int len,
364 pr_debug("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
365 current->comm, n, err, src_off, dst_off, len, data);
368 #define verbose_result(err, n, src_off, dst_off, len, data) ({ \
370 result(err, n, src_off, dst_off, len, data); \
372 dbg_result(err, n, src_off, dst_off, len, data);\
375 static unsigned long long dmatest_persec(s64 runtime, unsigned int val)
377 unsigned long long per_sec = 1000000;
382 /* drop precision until runtime is 32-bits */
383 while (runtime > UINT_MAX) {
389 do_div(per_sec, runtime);
393 static unsigned long long dmatest_KBs(s64 runtime, unsigned long long len)
395 return dmatest_persec(runtime, len >> 10);
399 * This function repeatedly tests DMA transfers of various lengths and
400 * offsets for a given operation type until it is told to exit by
401 * kthread_stop(). There may be multiple threads running this function
402 * in parallel for a single channel, and there may be multiple channels
403 * being tested in parallel.
405 * Before each test, the source and destination buffer is initialized
406 * with a known pattern. This pattern is different depending on
407 * whether it's in an area which is supposed to be copied or
408 * overwritten, and different in the source and destination buffers.
409 * So if the DMA engine doesn't copy exactly what we tell it to copy,
412 static int dmatest_func(void *data)
414 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_wait);
415 struct dmatest_thread *thread = data;
416 struct dmatest_done done = { .wait = &done_wait };
417 struct dmatest_info *info;
418 struct dmatest_params *params;
419 struct dma_chan *chan;
420 struct dma_device *dev;
421 unsigned int error_count;
422 unsigned int failed_tests = 0;
423 unsigned int total_tests = 0;
425 enum dma_status status;
426 enum dma_ctrl_flags flags;
432 ktime_t ktime, start, diff;
433 ktime_t filltime = 0;
434 ktime_t comparetime = 0;
436 unsigned long long total_len = 0;
445 params = &info->params;
448 if (thread->type == DMA_MEMCPY) {
449 align = dev->copy_align;
450 src_cnt = dst_cnt = 1;
451 } else if (thread->type == DMA_SG) {
452 align = dev->copy_align;
453 src_cnt = dst_cnt = sg_buffers;
454 } else if (thread->type == DMA_XOR) {
455 /* force odd to ensure dst = src */
456 src_cnt = min_odd(params->xor_sources | 1, dev->max_xor);
458 align = dev->xor_align;
459 } else if (thread->type == DMA_PQ) {
460 /* force odd to ensure dst = src */
461 src_cnt = min_odd(params->pq_sources | 1, dma_maxpq(dev, 0));
463 align = dev->pq_align;
465 pq_coefs = kmalloc(params->pq_sources + 1, GFP_KERNEL);
467 goto err_thread_type;
469 for (i = 0; i < src_cnt; i++)
472 goto err_thread_type;
474 thread->srcs = kcalloc(src_cnt + 1, sizeof(u8 *), GFP_KERNEL);
478 thread->usrcs = kcalloc(src_cnt + 1, sizeof(u8 *), GFP_KERNEL);
482 for (i = 0; i < src_cnt; i++) {
483 thread->usrcs[i] = kmalloc(params->buf_size + align,
485 if (!thread->usrcs[i])
488 /* align srcs to alignment restriction */
490 thread->srcs[i] = PTR_ALIGN(thread->usrcs[i], align);
492 thread->srcs[i] = thread->usrcs[i];
494 thread->srcs[i] = NULL;
496 thread->dsts = kcalloc(dst_cnt + 1, sizeof(u8 *), GFP_KERNEL);
500 thread->udsts = kcalloc(dst_cnt + 1, sizeof(u8 *), GFP_KERNEL);
504 for (i = 0; i < dst_cnt; i++) {
505 thread->udsts[i] = kmalloc(params->buf_size + align,
507 if (!thread->udsts[i])
510 /* align dsts to alignment restriction */
512 thread->dsts[i] = PTR_ALIGN(thread->udsts[i], align);
514 thread->dsts[i] = thread->udsts[i];
516 thread->dsts[i] = NULL;
518 set_user_nice(current, 10);
521 * src and dst buffers are freed by ourselves below
523 flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
526 while (!kthread_should_stop()
527 && !(params->iterations && total_tests >= params->iterations)) {
528 struct dma_async_tx_descriptor *tx = NULL;
529 struct dmaengine_unmap_data *um;
530 dma_addr_t srcs[src_cnt];
532 unsigned int src_off, dst_off, len;
533 struct scatterlist tx_sg[src_cnt];
534 struct scatterlist rx_sg[src_cnt];
538 if (1 << align > params->buf_size) {
539 pr_err("%u-byte buffer too small for %d-byte alignment\n",
540 params->buf_size, 1 << align);
544 if (params->noverify)
545 len = params->buf_size;
547 len = dmatest_random() % params->buf_size + 1;
549 len = (len >> align) << align;
555 if (params->noverify) {
560 src_off = dmatest_random() % (params->buf_size - len + 1);
561 dst_off = dmatest_random() % (params->buf_size - len + 1);
563 src_off = (src_off >> align) << align;
564 dst_off = (dst_off >> align) << align;
566 dmatest_init_srcs(thread->srcs, src_off, len,
568 dmatest_init_dsts(thread->dsts, dst_off, len,
571 diff = ktime_sub(ktime_get(), start);
572 filltime = ktime_add(filltime, diff);
575 um = dmaengine_get_unmap_data(dev->dev, src_cnt + dst_cnt,
579 result("unmap data NULL", total_tests,
580 src_off, dst_off, len, ret);
584 um->len = params->buf_size;
585 for (i = 0; i < src_cnt; i++) {
586 void *buf = thread->srcs[i];
587 struct page *pg = virt_to_page(buf);
588 unsigned pg_off = (unsigned long) buf & ~PAGE_MASK;
590 um->addr[i] = dma_map_page(dev->dev, pg, pg_off,
591 um->len, DMA_TO_DEVICE);
592 srcs[i] = um->addr[i] + src_off;
593 ret = dma_mapping_error(dev->dev, um->addr[i]);
595 dmaengine_unmap_put(um);
596 result("src mapping error", total_tests,
597 src_off, dst_off, len, ret);
603 /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
604 dsts = &um->addr[src_cnt];
605 for (i = 0; i < dst_cnt; i++) {
606 void *buf = thread->dsts[i];
607 struct page *pg = virt_to_page(buf);
608 unsigned pg_off = (unsigned long) buf & ~PAGE_MASK;
610 dsts[i] = dma_map_page(dev->dev, pg, pg_off, um->len,
612 ret = dma_mapping_error(dev->dev, dsts[i]);
614 dmaengine_unmap_put(um);
615 result("dst mapping error", total_tests,
616 src_off, dst_off, len, ret);
623 sg_init_table(tx_sg, src_cnt);
624 sg_init_table(rx_sg, src_cnt);
625 for (i = 0; i < src_cnt; i++) {
626 sg_dma_address(&rx_sg[i]) = srcs[i];
627 sg_dma_address(&tx_sg[i]) = dsts[i] + dst_off;
628 sg_dma_len(&tx_sg[i]) = len;
629 sg_dma_len(&rx_sg[i]) = len;
632 if (thread->type == DMA_MEMCPY)
633 tx = dev->device_prep_dma_memcpy(chan,
635 srcs[0], len, flags);
636 else if (thread->type == DMA_SG)
637 tx = dev->device_prep_dma_sg(chan, tx_sg, src_cnt,
638 rx_sg, src_cnt, flags);
639 else if (thread->type == DMA_XOR)
640 tx = dev->device_prep_dma_xor(chan,
644 else if (thread->type == DMA_PQ) {
645 dma_addr_t dma_pq[dst_cnt];
647 for (i = 0; i < dst_cnt; i++)
648 dma_pq[i] = dsts[i] + dst_off;
649 tx = dev->device_prep_dma_pq(chan, dma_pq, srcs,
655 dmaengine_unmap_put(um);
656 result("prep error", total_tests, src_off,
664 tx->callback = dmatest_callback;
665 tx->callback_param = &done;
666 cookie = tx->tx_submit(tx);
668 if (dma_submit_error(cookie)) {
669 dmaengine_unmap_put(um);
670 result("submit error", total_tests, src_off,
676 dma_async_issue_pending(chan);
678 wait_event_freezable_timeout(done_wait, done.done,
679 msecs_to_jiffies(params->timeout));
681 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
685 * We're leaving the timed out dma operation with
686 * dangling pointer to done_wait. To make this
687 * correct, we'll need to allocate wait_done for
688 * each test iteration and perform "who's gonna
689 * free it this time?" dancing. For now, just
692 dmaengine_unmap_put(um);
693 result("test timed out", total_tests, src_off, dst_off,
697 } else if (status != DMA_COMPLETE) {
698 dmaengine_unmap_put(um);
699 result(status == DMA_ERROR ?
700 "completion error status" :
701 "completion busy status", total_tests, src_off,
707 dmaengine_unmap_put(um);
709 if (params->noverify) {
710 verbose_result("test passed", total_tests, src_off,
716 pr_debug("%s: verifying source buffer...\n", current->comm);
717 error_count = dmatest_verify(thread->srcs, 0, src_off,
718 0, PATTERN_SRC, true);
719 error_count += dmatest_verify(thread->srcs, src_off,
720 src_off + len, src_off,
721 PATTERN_SRC | PATTERN_COPY, true);
722 error_count += dmatest_verify(thread->srcs, src_off + len,
723 params->buf_size, src_off + len,
726 pr_debug("%s: verifying dest buffer...\n", current->comm);
727 error_count += dmatest_verify(thread->dsts, 0, dst_off,
728 0, PATTERN_DST, false);
729 error_count += dmatest_verify(thread->dsts, dst_off,
730 dst_off + len, src_off,
731 PATTERN_SRC | PATTERN_COPY, false);
732 error_count += dmatest_verify(thread->dsts, dst_off + len,
733 params->buf_size, dst_off + len,
736 diff = ktime_sub(ktime_get(), start);
737 comparetime = ktime_add(comparetime, diff);
740 result("data error", total_tests, src_off, dst_off,
744 verbose_result("test passed", total_tests, src_off,
748 ktime = ktime_sub(ktime_get(), ktime);
749 ktime = ktime_sub(ktime, comparetime);
750 ktime = ktime_sub(ktime, filltime);
751 runtime = ktime_to_us(ktime);
755 for (i = 0; thread->udsts[i]; i++)
756 kfree(thread->udsts[i]);
757 kfree(thread->udsts);
762 for (i = 0; thread->usrcs[i]; i++)
763 kfree(thread->usrcs[i]);
764 kfree(thread->usrcs);
770 pr_info("%s: summary %u tests, %u failures %llu iops %llu KB/s (%d)\n",
771 current->comm, total_tests, failed_tests,
772 dmatest_persec(runtime, total_tests),
773 dmatest_KBs(runtime, total_len), ret);
775 /* terminate all transfers on specified channels */
777 dmaengine_terminate_all(chan);
780 wake_up(&thread_wait);
785 static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
787 struct dmatest_thread *thread;
788 struct dmatest_thread *_thread;
791 list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
792 ret = kthread_stop(thread->task);
793 pr_debug("thread %s exited with status %d\n",
794 thread->task->comm, ret);
795 list_del(&thread->node);
796 put_task_struct(thread->task);
800 /* terminate all transfers on specified channels */
801 dmaengine_terminate_all(dtc->chan);
806 static int dmatest_add_threads(struct dmatest_info *info,
807 struct dmatest_chan *dtc, enum dma_transaction_type type)
809 struct dmatest_params *params = &info->params;
810 struct dmatest_thread *thread;
811 struct dma_chan *chan = dtc->chan;
815 if (type == DMA_MEMCPY)
817 else if (type == DMA_SG)
819 else if (type == DMA_XOR)
821 else if (type == DMA_PQ)
826 for (i = 0; i < params->threads_per_chan; i++) {
827 thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
829 pr_warn("No memory for %s-%s%u\n",
830 dma_chan_name(chan), op, i);
834 thread->chan = dtc->chan;
837 thread->task = kthread_create(dmatest_func, thread, "%s-%s%u",
838 dma_chan_name(chan), op, i);
839 if (IS_ERR(thread->task)) {
840 pr_warn("Failed to create thread %s-%s%u\n",
841 dma_chan_name(chan), op, i);
846 /* srcbuf and dstbuf are allocated by the thread itself */
847 get_task_struct(thread->task);
848 list_add_tail(&thread->node, &dtc->threads);
849 wake_up_process(thread->task);
855 static int dmatest_add_channel(struct dmatest_info *info,
856 struct dma_chan *chan)
858 struct dmatest_chan *dtc;
859 struct dma_device *dma_dev = chan->device;
860 unsigned int thread_count = 0;
863 dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
865 pr_warn("No memory for %s\n", dma_chan_name(chan));
870 INIT_LIST_HEAD(&dtc->threads);
872 if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
874 cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY);
875 thread_count += cnt > 0 ? cnt : 0;
879 if (dma_has_cap(DMA_SG, dma_dev->cap_mask)) {
881 cnt = dmatest_add_threads(info, dtc, DMA_SG);
882 thread_count += cnt > 0 ? cnt : 0;
886 if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
887 cnt = dmatest_add_threads(info, dtc, DMA_XOR);
888 thread_count += cnt > 0 ? cnt : 0;
890 if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
891 cnt = dmatest_add_threads(info, dtc, DMA_PQ);
892 thread_count += cnt > 0 ? cnt : 0;
895 pr_info("Started %u threads using %s\n",
896 thread_count, dma_chan_name(chan));
898 list_add_tail(&dtc->node, &info->channels);
904 static bool filter(struct dma_chan *chan, void *param)
906 struct dmatest_params *params = param;
908 if (!dmatest_match_channel(params, chan) ||
909 !dmatest_match_device(params, chan->device))
915 static void request_channels(struct dmatest_info *info,
916 enum dma_transaction_type type)
921 dma_cap_set(type, mask);
923 struct dmatest_params *params = &info->params;
924 struct dma_chan *chan;
926 chan = dma_request_channel(mask, filter, params);
928 if (dmatest_add_channel(info, chan)) {
929 dma_release_channel(chan);
930 break; /* add_channel failed, punt */
933 break; /* no more channels available */
934 if (params->max_channels &&
935 info->nr_channels >= params->max_channels)
936 break; /* we have all we need */
940 static void run_threaded_test(struct dmatest_info *info)
942 struct dmatest_params *params = &info->params;
944 /* Copy test parameters */
945 params->buf_size = test_buf_size;
946 strlcpy(params->channel, strim(test_channel), sizeof(params->channel));
947 strlcpy(params->device, strim(test_device), sizeof(params->device));
948 params->threads_per_chan = threads_per_chan;
949 params->max_channels = max_channels;
950 params->iterations = iterations;
951 params->xor_sources = xor_sources;
952 params->pq_sources = pq_sources;
953 params->timeout = timeout;
954 params->noverify = noverify;
956 request_channels(info, DMA_MEMCPY);
957 request_channels(info, DMA_XOR);
958 request_channels(info, DMA_SG);
959 request_channels(info, DMA_PQ);
962 static void stop_threaded_test(struct dmatest_info *info)
964 struct dmatest_chan *dtc, *_dtc;
965 struct dma_chan *chan;
967 list_for_each_entry_safe(dtc, _dtc, &info->channels, node) {
968 list_del(&dtc->node);
970 dmatest_cleanup_channel(dtc);
971 pr_debug("dropped channel %s\n", dma_chan_name(chan));
972 dma_release_channel(chan);
975 info->nr_channels = 0;
978 static void restart_threaded_test(struct dmatest_info *info, bool run)
980 /* we might be called early to set run=, defer running until all
981 * parameters have been evaluated
986 /* Stop any running test first */
987 stop_threaded_test(info);
989 /* Run test with new parameters */
990 run_threaded_test(info);
993 static int dmatest_run_get(char *val, const struct kernel_param *kp)
995 struct dmatest_info *info = &test_info;
997 mutex_lock(&info->lock);
998 if (is_threaded_test_run(info)) {
1001 stop_threaded_test(info);
1002 dmatest_run = false;
1004 mutex_unlock(&info->lock);
1006 return param_get_bool(val, kp);
1009 static int dmatest_run_set(const char *val, const struct kernel_param *kp)
1011 struct dmatest_info *info = &test_info;
1014 mutex_lock(&info->lock);
1015 ret = param_set_bool(val, kp);
1017 mutex_unlock(&info->lock);
1021 if (is_threaded_test_run(info))
1023 else if (dmatest_run)
1024 restart_threaded_test(info, dmatest_run);
1026 mutex_unlock(&info->lock);
1031 static int __init dmatest_init(void)
1033 struct dmatest_info *info = &test_info;
1034 struct dmatest_params *params = &info->params;
1037 mutex_lock(&info->lock);
1038 run_threaded_test(info);
1039 mutex_unlock(&info->lock);
1042 if (params->iterations && wait)
1043 wait_event(thread_wait, !is_threaded_test_run(info));
1045 /* module parameters are stable, inittime tests are started,
1046 * let userspace take over 'run' control
1048 info->did_init = true;
1052 /* when compiled-in wait for drivers to load first */
1053 late_initcall(dmatest_init);
1055 static void __exit dmatest_exit(void)
1057 struct dmatest_info *info = &test_info;
1059 mutex_lock(&info->lock);
1060 stop_threaded_test(info);
1061 mutex_unlock(&info->lock);
1063 module_exit(dmatest_exit);
1065 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
1066 MODULE_LICENSE("GPL v2");