drivers/dma/dmatest.c

   1 /*
   2  * DMA Engine test module
   3  *
   4  * Copyright (C) 2007 Atmel Corporation
   5  * Copyright (C) 2013 Intel Corporation
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  12
  13 #include <linux/delay.h>
  14 #include <linux/dma-mapping.h>
  15 #include <linux/dmaengine.h>
  16 #include <linux/freezer.h>
  17 #include <linux/init.h>
  18 #include <linux/kthread.h>
  19 #include <linux/sched/task.h>
  20 #include <linux/module.h>
  21 #include <linux/moduleparam.h>
  22 #include <linux/random.h>
  23 #include <linux/slab.h>
  24 #include <linux/wait.h>
  25
  26 static unsigned int test_buf_size = 16384;
  27 module_param(test_buf_size, uint, S_IRUGO | S_IWUSR);
  28 MODULE_PARM_DESC(test_buf_size, "Size of the memcpy test buffer");
  29
  30 static char test_channel[20];
  31 module_param_string(channel, test_channel, sizeof(test_channel),
  32                 S_IRUGO | S_IWUSR);
  33 MODULE_PARM_DESC(channel, "Bus ID of the channel to test (default: any)");
  34
  35 static char test_device[32];
  36 module_param_string(device, test_device, sizeof(test_device),
  37                 S_IRUGO | S_IWUSR);
  38 MODULE_PARM_DESC(device, "Bus ID of the DMA Engine to test (default: any)");
  39
  40 static unsigned int threads_per_chan = 1;
  41 module_param(threads_per_chan, uint, S_IRUGO | S_IWUSR);
  42 MODULE_PARM_DESC(threads_per_chan,
  43                 "Number of threads to start per channel (default: 1)");
  44
  45 static unsigned int max_channels;
  46 module_param(max_channels, uint, S_IRUGO | S_IWUSR);
  47 MODULE_PARM_DESC(max_channels,
  48                 "Maximum number of channels to use (default: all)");
  49
  50 static unsigned int iterations;
  51 module_param(iterations, uint, S_IRUGO | S_IWUSR);
  52 MODULE_PARM_DESC(iterations,
  53                 "Iterations before stopping test (default: infinite)");
  54
  55 static unsigned int sg_buffers = 1;
  56 module_param(sg_buffers, uint, S_IRUGO | S_IWUSR);
  57 MODULE_PARM_DESC(sg_buffers,
  58                 "Number of scatter gather buffers (default: 1)");
  59
  60 static unsigned int dmatest;
  61 module_param(dmatest, uint, S_IRUGO | S_IWUSR);
  62 MODULE_PARM_DESC(dmatest,
  63                 "dmatest 0-memcpy 1-slave_sg (default: 0)");
  64
  65 static unsigned int xor_sources = 3;
  66 module_param(xor_sources, uint, S_IRUGO | S_IWUSR);
  67 MODULE_PARM_DESC(xor_sources,
  68                 "Number of xor source buffers (default: 3)");
  69
  70 static unsigned int pq_sources = 3;
  71 module_param(pq_sources, uint, S_IRUGO | S_IWUSR);
  72 MODULE_PARM_DESC(pq_sources,
  73                 "Number of p+q source buffers (default: 3)");
  74
  75 static int timeout = 3000;
  76 module_param(timeout, uint, S_IRUGO | S_IWUSR);
  77 MODULE_PARM_DESC(timeout, "Transfer Timeout in msec (default: 3000), "
  78                  "Pass -1 for infinite timeout");
  79
  80 static bool noverify;
  81 module_param(noverify, bool, S_IRUGO | S_IWUSR);
  82 MODULE_PARM_DESC(noverify, "Disable random data setup and verification");
  83
  84 static bool verbose;
  85 module_param(verbose, bool, S_IRUGO | S_IWUSR);
  86 MODULE_PARM_DESC(verbose, "Enable \"success\" result messages (default: off)");
  87
  88 /**
  89  * struct dmatest_params - test parameters.
  90  * @buf_size:           size of the memcpy test buffer
  91  * @channel:            bus ID of the channel to test
  92  * @device:             bus ID of the DMA Engine to test
  93  * @threads_per_chan:   number of threads to start per channel
  94  * @max_channels:       maximum number of channels to use
  95  * @iterations:         iterations before stopping test
  96  * @xor_sources:        number of xor source buffers
  97  * @pq_sources:         number of p+q source buffers
  98  * @timeout:            transfer timeout in msec, -1 for infinite timeout
  99  */
 100 struct dmatest_params {
 101         unsigned int    buf_size;
 102         char            channel[20];
 103         char            device[32];
 104         unsigned int    threads_per_chan;
 105         unsigned int    max_channels;
 106         unsigned int    iterations;
 107         unsigned int    xor_sources;
 108         unsigned int    pq_sources;
 109         int             timeout;
 110         bool            noverify;
 111 };
 112
 113 /**
 114  * struct dmatest_info - test information.
 115  * @params:             test parameters
 116  * @lock:               access protection to the fields of this structure
 117  */
 118 static struct dmatest_info {
 119         /* Test parameters */
 120         struct dmatest_params   params;
 121
 122         /* Internal state */
 123         struct list_head        channels;
 124         unsigned int            nr_channels;
 125         struct mutex            lock;
 126         bool                    did_init;
 127 } test_info = {
 128         .channels = LIST_HEAD_INIT(test_info.channels),
 129         .lock = __MUTEX_INITIALIZER(test_info.lock),
 130 };
 131
 132 static int dmatest_run_set(const char *val, const struct kernel_param *kp);
 133 static int dmatest_run_get(char *val, const struct kernel_param *kp);
 134 static const struct kernel_param_ops run_ops = {
 135         .set = dmatest_run_set,
 136         .get = dmatest_run_get,
 137 };
 138 static bool dmatest_run;
 139 module_param_cb(run, &run_ops, &dmatest_run, S_IRUGO | S_IWUSR);
 140 MODULE_PARM_DESC(run, "Run the test (default: false)");
 141
 142 /* Maximum amount of mismatched bytes in buffer to print */
 143 #define MAX_ERROR_COUNT         32
 144
 145 /*
 146  * Initialization patterns. All bytes in the source buffer has bit 7
 147  * set, all bytes in the destination buffer has bit 7 cleared.
 148  *
 149  * Bit 6 is set for all bytes which are to be copied by the DMA
 150  * engine. Bit 5 is set for all bytes which are to be overwritten by
 151  * the DMA engine.
 152  *
 153  * The remaining bits are the inverse of a counter which increments by
 154  * one for each byte address.
 155  */
 156 #define PATTERN_SRC             0x80
 157 #define PATTERN_DST             0x00
 158 #define PATTERN_COPY            0x40
 159 #define PATTERN_OVERWRITE       0x20
 160 #define PATTERN_COUNT_MASK      0x1f
 161
 162 struct dmatest_thread {
 163         struct list_head        node;
 164         struct dmatest_info     *info;
 165         struct task_struct      *task;
 166         struct dma_chan         *chan;
 167         u8                      **srcs;
 168         u8                      **usrcs;
 169         u8                      **dsts;
 170         u8                      **udsts;
 171         enum dma_transaction_type type;
 172         bool                    done;
 173 };
 174
 175 struct dmatest_chan {
 176         struct list_head        node;
 177         struct dma_chan         *chan;
 178         struct list_head        threads;
 179 };
 180
 181 static DECLARE_WAIT_QUEUE_HEAD(thread_wait);
 182 static bool wait;
 183
 184 static bool is_threaded_test_run(struct dmatest_info *info)
 185 {
 186         struct dmatest_chan *dtc;
 187
 188         list_for_each_entry(dtc, &info->channels, node) {
 189                 struct dmatest_thread *thread;
 190
 191                 list_for_each_entry(thread, &dtc->threads, node) {
 192                         if (!thread->done)
 193                                 return true;
 194                 }
 195         }
 196
 197         return false;
 198 }
 199
 200 static int dmatest_wait_get(char *val, const struct kernel_param *kp)
 201 {
 202         struct dmatest_info *info = &test_info;
 203         struct dmatest_params *params = &info->params;
 204
 205         if (params->iterations)
 206                 wait_event(thread_wait, !is_threaded_test_run(info));
 207         wait = true;
 208         return param_get_bool(val, kp);
 209 }
 210
 211 static const struct kernel_param_ops wait_ops = {
 212         .get = dmatest_wait_get,
 213         .set = param_set_bool,
 214 };
 215 module_param_cb(wait, &wait_ops, &wait, S_IRUGO);
 216 MODULE_PARM_DESC(wait, "Wait for tests to complete (default: false)");
 217
 218 static bool dmatest_match_channel(struct dmatest_params *params,
 219                 struct dma_chan *chan)
 220 {
 221         if (params->channel[0] == '\0')
 222                 return true;
 223         return strcmp(dma_chan_name(chan), params->channel) == 0;
 224 }
 225
 226 static bool dmatest_match_device(struct dmatest_params *params,
 227                 struct dma_device *device)
 228 {
 229         if (params->device[0] == '\0')
 230                 return true;
 231         return strcmp(dev_name(device->dev), params->device) == 0;
 232 }
 233
 234 static unsigned long dmatest_random(void)
 235 {
 236         unsigned long buf;
 237
 238         prandom_bytes(&buf, sizeof(buf));
 239         return buf;
 240 }
 241
 242 static void dmatest_init_srcs(u8 **bufs, unsigned int start, unsigned int len,
 243                 unsigned int buf_size)
 244 {
 245         unsigned int i;
 246         u8 *buf;
 247
 248         for (; (buf = *bufs); bufs++) {
 249                 for (i = 0; i < start; i++)
 250                         buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
 251                 for ( ; i < start + len; i++)
 252                         buf[i] = PATTERN_SRC | PATTERN_COPY
 253                                 | (~i & PATTERN_COUNT_MASK);
 254                 for ( ; i < buf_size; i++)
 255                         buf[i] = PATTERN_SRC | (~i & PATTERN_COUNT_MASK);
 256                 buf++;
 257         }
 258 }
 259
 260 static void dmatest_init_dsts(u8 **bufs, unsigned int start, unsigned int len,
 261                 unsigned int buf_size)
 262 {
 263         unsigned int i;
 264         u8 *buf;
 265
 266         for (; (buf = *bufs); bufs++) {
 267                 for (i = 0; i < start; i++)
 268                         buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
 269                 for ( ; i < start + len; i++)
 270                         buf[i] = PATTERN_DST | PATTERN_OVERWRITE
 271                                 | (~i & PATTERN_COUNT_MASK);
 272                 for ( ; i < buf_size; i++)
 273                         buf[i] = PATTERN_DST | (~i & PATTERN_COUNT_MASK);
 274         }
 275 }
 276
 277 static void dmatest_mismatch(u8 actual, u8 pattern, unsigned int index,
 278                 unsigned int counter, bool is_srcbuf)
 279 {
 280         u8              diff = actual ^ pattern;
 281         u8              expected = pattern | (~counter & PATTERN_COUNT_MASK);
 282         const char      *thread_name = current->comm;
 283
 284         if (is_srcbuf)
 285                 pr_warn("%s: srcbuf[0x%x] overwritten! Expected %02x, got %02x\n",
 286                         thread_name, index, expected, actual);
 287         else if ((pattern & PATTERN_COPY)
 288                         && (diff & (PATTERN_COPY | PATTERN_OVERWRITE)))
 289                 pr_warn("%s: dstbuf[0x%x] not copied! Expected %02x, got %02x\n",
 290                         thread_name, index, expected, actual);
 291         else if (diff & PATTERN_SRC)
 292                 pr_warn("%s: dstbuf[0x%x] was copied! Expected %02x, got %02x\n",
 293                         thread_name, index, expected, actual);
 294         else
 295                 pr_warn("%s: dstbuf[0x%x] mismatch! Expected %02x, got %02x\n",
 296                         thread_name, index, expected, actual);
 297 }
 298
 299 static unsigned int dmatest_verify(u8 **bufs, unsigned int start,
 300                 unsigned int end, unsigned int counter, u8 pattern,
 301                 bool is_srcbuf)
 302 {
 303         unsigned int i;
 304         unsigned int error_count = 0;
 305         u8 actual;
 306         u8 expected;
 307         u8 *buf;
 308         unsigned int counter_orig = counter;
 309
 310         for (; (buf = *bufs); bufs++) {
 311                 counter = counter_orig;
 312                 for (i = start; i < end; i++) {
 313                         actual = buf[i];
 314                         expected = pattern | (~counter & PATTERN_COUNT_MASK);
 315                         if (actual != expected) {
 316                                 if (error_count < MAX_ERROR_COUNT)
 317                                         dmatest_mismatch(actual, pattern, i,
 318                                                          counter, is_srcbuf);
 319                                 error_count++;
 320                         }
 321                         counter++;
 322                 }
 323         }
 324
 325         if (error_count > MAX_ERROR_COUNT)
 326                 pr_warn("%s: %u errors suppressed\n",
 327                         current->comm, error_count - MAX_ERROR_COUNT);
 328
 329         return error_count;
 330 }
 331
 332 /* poor man's completion - we want to use wait_event_freezable() on it */
 333 struct dmatest_done {
 334         bool                    done;
 335         wait_queue_head_t       *wait;
 336 };
 337
 338 static void dmatest_callback(void *arg)
 339 {
 340         struct dmatest_done *done = arg;
 341
 342         done->done = true;
 343         wake_up_all(done->wait);
 344 }
 345
 346 static unsigned int min_odd(unsigned int x, unsigned int y)
 347 {
 348         unsigned int val = min(x, y);
 349
 350         return val % 2 ? val : val - 1;
 351 }
 352
 353 static void result(const char *err, unsigned int n, unsigned int src_off,
 354                    unsigned int dst_off, unsigned int len, unsigned long data)
 355 {
 356         pr_info("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
 357                 current->comm, n, err, src_off, dst_off, len, data);
 358 }
 359
 360 static void dbg_result(const char *err, unsigned int n, unsigned int src_off,
 361                        unsigned int dst_off, unsigned int len,
 362                        unsigned long data)
 363 {
 364         pr_debug("%s: result #%u: '%s' with src_off=0x%x dst_off=0x%x len=0x%x (%lu)\n",
 365                  current->comm, n, err, src_off, dst_off, len, data);
 366 }
 367
 368 #define verbose_result(err, n, src_off, dst_off, len, data) ({  \
 369         if (verbose)                                            \
 370                 result(err, n, src_off, dst_off, len, data);    \
 371         else                                                    \
 372                 dbg_result(err, n, src_off, dst_off, len, data);\
 373 })
 374
 375 static unsigned long long dmatest_persec(s64 runtime, unsigned int val)
 376 {
 377         unsigned long long per_sec = 1000000;
 378
 379         if (runtime <= 0)
 380                 return 0;
 381
 382         /* drop precision until runtime is 32-bits */
 383         while (runtime > UINT_MAX) {
 384                 runtime >>= 1;
 385                 per_sec <<= 1;
 386         }
 387
 388         per_sec *= val;
 389         do_div(per_sec, runtime);
 390         return per_sec;
 391 }
 392
 393 static unsigned long long dmatest_KBs(s64 runtime, unsigned long long len)
 394 {
 395         return dmatest_persec(runtime, len >> 10);
 396 }
 397
 398 /*
 399  * This function repeatedly tests DMA transfers of various lengths and
 400  * offsets for a given operation type until it is told to exit by
 401  * kthread_stop(). There may be multiple threads running this function
 402  * in parallel for a single channel, and there may be multiple channels
 403  * being tested in parallel.
 404  *
 405  * Before each test, the source and destination buffer is initialized
 406  * with a known pattern. This pattern is different depending on
 407  * whether it's in an area which is supposed to be copied or
 408  * overwritten, and different in the source and destination buffers.
 409  * So if the DMA engine doesn't copy exactly what we tell it to copy,
 410  * we'll notice.
 411  */
 412 static int dmatest_func(void *data)
 413 {
 414         DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_wait);
 415         struct dmatest_thread   *thread = data;
 416         struct dmatest_done     done = { .wait = &done_wait };
 417         struct dmatest_info     *info;
 418         struct dmatest_params   *params;
 419         struct dma_chan         *chan;
 420         struct dma_device       *dev;
 421         unsigned int            error_count;
 422         unsigned int            failed_tests = 0;
 423         unsigned int            total_tests = 0;
 424         dma_cookie_t            cookie;
 425         enum dma_status         status;
 426         enum dma_ctrl_flags     flags;
 427         u8                      *pq_coefs = NULL;
 428         int                     ret;
 429         int                     src_cnt;
 430         int                     dst_cnt;
 431         int                     i;
 432         ktime_t                 ktime, start, diff;
 433         ktime_t                 filltime = 0;
 434         ktime_t                 comparetime = 0;
 435         s64                     runtime = 0;
 436         unsigned long long      total_len = 0;
 437         u8                      align = 0;
 438
 439         set_freezable();
 440
 441         ret = -ENOMEM;
 442
 443         smp_rmb();
 444         info = thread->info;
 445         params = &info->params;
 446         chan = thread->chan;
 447         dev = chan->device;
 448         if (thread->type == DMA_MEMCPY) {
 449                 align = dev->copy_align;
 450                 src_cnt = dst_cnt = 1;
 451         } else if (thread->type == DMA_SG) {
 452                 align = dev->copy_align;
 453                 src_cnt = dst_cnt = sg_buffers;
 454         } else if (thread->type == DMA_XOR) {
 455                 /* force odd to ensure dst = src */
 456                 src_cnt = min_odd(params->xor_sources | 1, dev->max_xor);
 457                 dst_cnt = 1;
 458                 align = dev->xor_align;
 459         } else if (thread->type == DMA_PQ) {
 460                 /* force odd to ensure dst = src */
 461                 src_cnt = min_odd(params->pq_sources | 1, dma_maxpq(dev, 0));
 462                 dst_cnt = 2;
 463                 align = dev->pq_align;
 464
 465                 pq_coefs = kmalloc(params->pq_sources + 1, GFP_KERNEL);
 466                 if (!pq_coefs)
 467                         goto err_thread_type;
 468
 469                 for (i = 0; i < src_cnt; i++)
 470                         pq_coefs[i] = 1;
 471         } else
 472                 goto err_thread_type;
 473
 474         thread->srcs = kcalloc(src_cnt + 1, sizeof(u8 *), GFP_KERNEL);
 475         if (!thread->srcs)
 476                 goto err_srcs;
 477
 478         thread->usrcs = kcalloc(src_cnt + 1, sizeof(u8 *), GFP_KERNEL);
 479         if (!thread->usrcs)
 480                 goto err_usrcs;
 481
 482         for (i = 0; i < src_cnt; i++) {
 483                 thread->usrcs[i] = kmalloc(params->buf_size + align,
 484                                            GFP_KERNEL);
 485                 if (!thread->usrcs[i])
 486                         goto err_srcbuf;
 487
 488                 /* align srcs to alignment restriction */
 489                 if (align)
 490                         thread->srcs[i] = PTR_ALIGN(thread->usrcs[i], align);
 491                 else
 492                         thread->srcs[i] = thread->usrcs[i];
 493         }
 494         thread->srcs[i] = NULL;
 495
 496         thread->dsts = kcalloc(dst_cnt + 1, sizeof(u8 *), GFP_KERNEL);
 497         if (!thread->dsts)
 498                 goto err_dsts;
 499
 500         thread->udsts = kcalloc(dst_cnt + 1, sizeof(u8 *), GFP_KERNEL);
 501         if (!thread->udsts)
 502                 goto err_udsts;
 503
 504         for (i = 0; i < dst_cnt; i++) {
 505                 thread->udsts[i] = kmalloc(params->buf_size + align,
 506                                            GFP_KERNEL);
 507                 if (!thread->udsts[i])
 508                         goto err_dstbuf;
 509
 510                 /* align dsts to alignment restriction */
 511                 if (align)
 512                         thread->dsts[i] = PTR_ALIGN(thread->udsts[i], align);
 513                 else
 514                         thread->dsts[i] = thread->udsts[i];
 515         }
 516         thread->dsts[i] = NULL;
 517
 518         set_user_nice(current, 10);
 519
 520         /*
 521          * src and dst buffers are freed by ourselves below
 522          */
 523         flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
 524
 525         ktime = ktime_get();
 526         while (!kthread_should_stop()
 527                && !(params->iterations && total_tests >= params->iterations)) {
 528                 struct dma_async_tx_descriptor *tx = NULL;
 529                 struct dmaengine_unmap_data *um;
 530                 dma_addr_t srcs[src_cnt];
 531                 dma_addr_t *dsts;
 532                 unsigned int src_off, dst_off, len;
 533                 struct scatterlist tx_sg[src_cnt];
 534                 struct scatterlist rx_sg[src_cnt];
 535
 536                 total_tests++;
 537
 538                 /* Check if buffer count fits into map count variable (u8) */
 539                 if ((src_cnt + dst_cnt) >= 255) {
 540                         pr_err("too many buffers (%d of 255 supported)\n",
 541                                src_cnt + dst_cnt);
 542                         break;
 543                 }
 544
 545                 if (1 << align > params->buf_size) {
 546                         pr_err("%u-byte buffer too small for %d-byte alignment\n",
 547                                params->buf_size, 1 << align);
 548                         break;
 549                 }
 550
 551                 if (params->noverify)
 552                         len = params->buf_size;
 553                 else
 554                         len = dmatest_random() % params->buf_size + 1;
 555
 556                 len = (len >> align) << align;
 557                 if (!len)
 558                         len = 1 << align;
 559
 560                 total_len += len;
 561
 562                 if (params->noverify) {
 563                         src_off = 0;
 564                         dst_off = 0;
 565                 } else {
 566                         start = ktime_get();
 567                         src_off = dmatest_random() % (params->buf_size - len + 1);
 568                         dst_off = dmatest_random() % (params->buf_size - len + 1);
 569
 570                         src_off = (src_off >> align) << align;
 571                         dst_off = (dst_off >> align) << align;
 572
 573                         dmatest_init_srcs(thread->srcs, src_off, len,
 574                                           params->buf_size);
 575                         dmatest_init_dsts(thread->dsts, dst_off, len,
 576                                           params->buf_size);
 577
 578                         diff = ktime_sub(ktime_get(), start);
 579                         filltime = ktime_add(filltime, diff);
 580                 }
 581
 582                 um = dmaengine_get_unmap_data(dev->dev, src_cnt + dst_cnt,
 583                                               GFP_KERNEL);
 584                 if (!um) {
 585                         failed_tests++;
 586                         result("unmap data NULL", total_tests,
 587                                src_off, dst_off, len, ret);
 588                         continue;
 589                 }
 590
 591                 um->len = params->buf_size;
 592                 for (i = 0; i < src_cnt; i++) {
 593                         void *buf = thread->srcs[i];
 594                         struct page *pg = virt_to_page(buf);
 595                         unsigned long pg_off = offset_in_page(buf);
 596
 597                         um->addr[i] = dma_map_page(dev->dev, pg, pg_off,
 598                                                    um->len, DMA_TO_DEVICE);
 599                         srcs[i] = um->addr[i] + src_off;
 600                         ret = dma_mapping_error(dev->dev, um->addr[i]);
 601                         if (ret) {
 602                                 dmaengine_unmap_put(um);
 603                                 result("src mapping error", total_tests,
 604                                        src_off, dst_off, len, ret);
 605                                 failed_tests++;
 606                                 continue;
 607                         }
 608                         um->to_cnt++;
 609                 }
 610                 /* map with DMA_BIDIRECTIONAL to force writeback/invalidate */
 611                 dsts = &um->addr[src_cnt];
 612                 for (i = 0; i < dst_cnt; i++) {
 613                         void *buf = thread->dsts[i];
 614                         struct page *pg = virt_to_page(buf);
 615                         unsigned long pg_off = offset_in_page(buf);
 616
 617                         dsts[i] = dma_map_page(dev->dev, pg, pg_off, um->len,
 618                                                DMA_BIDIRECTIONAL);
 619                         ret = dma_mapping_error(dev->dev, dsts[i]);
 620                         if (ret) {
 621                                 dmaengine_unmap_put(um);
 622                                 result("dst mapping error", total_tests,
 623                                        src_off, dst_off, len, ret);
 624                                 failed_tests++;
 625                                 continue;
 626                         }
 627                         um->bidi_cnt++;
 628                 }
 629
 630                 sg_init_table(tx_sg, src_cnt);
 631                 sg_init_table(rx_sg, src_cnt);
 632                 for (i = 0; i < src_cnt; i++) {
 633                         sg_dma_address(&rx_sg[i]) = srcs[i];
 634                         sg_dma_address(&tx_sg[i]) = dsts[i] + dst_off;
 635                         sg_dma_len(&tx_sg[i]) = len;
 636                         sg_dma_len(&rx_sg[i]) = len;
 637                 }
 638
 639                 if (thread->type == DMA_MEMCPY)
 640                         tx = dev->device_prep_dma_memcpy(chan,
 641                                                          dsts[0] + dst_off,
 642                                                          srcs[0], len, flags);
 643                 else if (thread->type == DMA_SG)
 644                         tx = dev->device_prep_dma_sg(chan, tx_sg, src_cnt,
 645                                                      rx_sg, src_cnt, flags);
 646                 else if (thread->type == DMA_XOR)
 647                         tx = dev->device_prep_dma_xor(chan,
 648                                                       dsts[0] + dst_off,
 649                                                       srcs, src_cnt,
 650                                                       len, flags);
 651                 else if (thread->type == DMA_PQ) {
 652                         dma_addr_t dma_pq[dst_cnt];
 653
 654                         for (i = 0; i < dst_cnt; i++)
 655                                 dma_pq[i] = dsts[i] + dst_off;
 656                         tx = dev->device_prep_dma_pq(chan, dma_pq, srcs,
 657                                                      src_cnt, pq_coefs,
 658                                                      len, flags);
 659                 }
 660
 661                 if (!tx) {
 662                         dmaengine_unmap_put(um);
 663                         result("prep error", total_tests, src_off,
 664                                dst_off, len, ret);
 665                         msleep(100);
 666                         failed_tests++;
 667                         continue;
 668                 }
 669
 670                 done.done = false;
 671                 tx->callback = dmatest_callback;
 672                 tx->callback_param = &done;
 673                 cookie = tx->tx_submit(tx);
 674
 675                 if (dma_submit_error(cookie)) {
 676                         dmaengine_unmap_put(um);
 677                         result("submit error", total_tests, src_off,
 678                                dst_off, len, ret);
 679                         msleep(100);
 680                         failed_tests++;
 681                         continue;
 682                 }
 683                 dma_async_issue_pending(chan);
 684
 685                 wait_event_freezable_timeout(done_wait, done.done,
 686                                              msecs_to_jiffies(params->timeout));
 687
 688                 status = dma_async_is_tx_complete(chan, cookie, NULL, NULL);
 689
 690                 if (!done.done) {
 691                         /*
 692                          * We're leaving the timed out dma operation with
 693                          * dangling pointer to done_wait.  To make this
 694                          * correct, we'll need to allocate wait_done for
 695                          * each test iteration and perform "who's gonna
 696                          * free it this time?" dancing.  For now, just
 697                          * leave it dangling.
 698                          */
 699                         dmaengine_unmap_put(um);
 700                         result("test timed out", total_tests, src_off, dst_off,
 701                                len, 0);
 702                         failed_tests++;
 703                         continue;
 704                 } else if (status != DMA_COMPLETE) {
 705                         dmaengine_unmap_put(um);
 706                         result(status == DMA_ERROR ?
 707                                "completion error status" :
 708                                "completion busy status", total_tests, src_off,
 709                                dst_off, len, ret);
 710                         failed_tests++;
 711                         continue;
 712                 }
 713
 714                 dmaengine_unmap_put(um);
 715
 716                 if (params->noverify) {
 717                         verbose_result("test passed", total_tests, src_off,
 718                                        dst_off, len, 0);
 719                         continue;
 720                 }
 721
 722                 start = ktime_get();
 723                 pr_debug("%s: verifying source buffer...\n", current->comm);
 724                 error_count = dmatest_verify(thread->srcs, 0, src_off,
 725                                 0, PATTERN_SRC, true);
 726                 error_count += dmatest_verify(thread->srcs, src_off,
 727                                 src_off + len, src_off,
 728                                 PATTERN_SRC | PATTERN_COPY, true);
 729                 error_count += dmatest_verify(thread->srcs, src_off + len,
 730                                 params->buf_size, src_off + len,
 731                                 PATTERN_SRC, true);
 732
 733                 pr_debug("%s: verifying dest buffer...\n", current->comm);
 734                 error_count += dmatest_verify(thread->dsts, 0, dst_off,
 735                                 0, PATTERN_DST, false);
 736                 error_count += dmatest_verify(thread->dsts, dst_off,
 737                                 dst_off + len, src_off,
 738                                 PATTERN_SRC | PATTERN_COPY, false);
 739                 error_count += dmatest_verify(thread->dsts, dst_off + len,
 740                                 params->buf_size, dst_off + len,
 741                                 PATTERN_DST, false);
 742
 743                 diff = ktime_sub(ktime_get(), start);
 744                 comparetime = ktime_add(comparetime, diff);
 745
 746                 if (error_count) {
 747                         result("data error", total_tests, src_off, dst_off,
 748                                len, error_count);
 749                         failed_tests++;
 750                 } else {
 751                         verbose_result("test passed", total_tests, src_off,
 752                                        dst_off, len, 0);
 753                 }
 754         }
 755         ktime = ktime_sub(ktime_get(), ktime);
 756         ktime = ktime_sub(ktime, comparetime);
 757         ktime = ktime_sub(ktime, filltime);
 758         runtime = ktime_to_us(ktime);
 759
 760         ret = 0;
 761 err_dstbuf:
 762         for (i = 0; thread->udsts[i]; i++)
 763                 kfree(thread->udsts[i]);
 764         kfree(thread->udsts);
 765 err_udsts:
 766         kfree(thread->dsts);
 767 err_dsts:
 768 err_srcbuf:
 769         for (i = 0; thread->usrcs[i]; i++)
 770                 kfree(thread->usrcs[i]);
 771         kfree(thread->usrcs);
 772 err_usrcs:
 773         kfree(thread->srcs);
 774 err_srcs:
 775         kfree(pq_coefs);
 776 err_thread_type:
 777         pr_info("%s: summary %u tests, %u failures %llu iops %llu KB/s (%d)\n",
 778                 current->comm, total_tests, failed_tests,
 779                 dmatest_persec(runtime, total_tests),
 780                 dmatest_KBs(runtime, total_len), ret);
 781
 782         /* terminate all transfers on specified channels */
 783         if (ret)
 784                 dmaengine_terminate_all(chan);
 785
 786         thread->done = true;
 787         wake_up(&thread_wait);
 788
 789         return ret;
 790 }
 791
 792 static void dmatest_cleanup_channel(struct dmatest_chan *dtc)
 793 {
 794         struct dmatest_thread   *thread;
 795         struct dmatest_thread   *_thread;
 796         int                     ret;
 797
 798         list_for_each_entry_safe(thread, _thread, &dtc->threads, node) {
 799                 ret = kthread_stop(thread->task);
 800                 pr_debug("thread %s exited with status %d\n",
 801                          thread->task->comm, ret);
 802                 list_del(&thread->node);
 803                 put_task_struct(thread->task);
 804                 kfree(thread);
 805         }
 806
 807         /* terminate all transfers on specified channels */
 808         dmaengine_terminate_all(dtc->chan);
 809
 810         kfree(dtc);
 811 }
 812
 813 static int dmatest_add_threads(struct dmatest_info *info,
 814                 struct dmatest_chan *dtc, enum dma_transaction_type type)
 815 {
 816         struct dmatest_params *params = &info->params;
 817         struct dmatest_thread *thread;
 818         struct dma_chan *chan = dtc->chan;
 819         char *op;
 820         unsigned int i;
 821
 822         if (type == DMA_MEMCPY)
 823                 op = "copy";
 824         else if (type == DMA_SG)
 825                 op = "sg";
 826         else if (type == DMA_XOR)
 827                 op = "xor";
 828         else if (type == DMA_PQ)
 829                 op = "pq";
 830         else
 831                 return -EINVAL;
 832
 833         for (i = 0; i < params->threads_per_chan; i++) {
 834                 thread = kzalloc(sizeof(struct dmatest_thread), GFP_KERNEL);
 835                 if (!thread) {
 836                         pr_warn("No memory for %s-%s%u\n",
 837                                 dma_chan_name(chan), op, i);
 838                         break;
 839                 }
 840                 thread->info = info;
 841                 thread->chan = dtc->chan;
 842                 thread->type = type;
 843                 smp_wmb();
 844                 thread->task = kthread_create(dmatest_func, thread, "%s-%s%u",
 845                                 dma_chan_name(chan), op, i);
 846                 if (IS_ERR(thread->task)) {
 847                         pr_warn("Failed to create thread %s-%s%u\n",
 848                                 dma_chan_name(chan), op, i);
 849                         kfree(thread);
 850                         break;
 851                 }
 852
 853                 /* srcbuf and dstbuf are allocated by the thread itself */
 854                 get_task_struct(thread->task);
 855                 list_add_tail(&thread->node, &dtc->threads);
 856                 wake_up_process(thread->task);
 857         }
 858
 859         return i;
 860 }
 861
 862 static int dmatest_add_channel(struct dmatest_info *info,
 863                 struct dma_chan *chan)
 864 {
 865         struct dmatest_chan     *dtc;
 866         struct dma_device       *dma_dev = chan->device;
 867         unsigned int            thread_count = 0;
 868         int cnt;
 869
 870         dtc = kmalloc(sizeof(struct dmatest_chan), GFP_KERNEL);
 871         if (!dtc) {
 872                 pr_warn("No memory for %s\n", dma_chan_name(chan));
 873                 return -ENOMEM;
 874         }
 875
 876         dtc->chan = chan;
 877         INIT_LIST_HEAD(&dtc->threads);
 878
 879         if (dma_has_cap(DMA_MEMCPY, dma_dev->cap_mask)) {
 880                 if (dmatest == 0) {
 881                         cnt = dmatest_add_threads(info, dtc, DMA_MEMCPY);
 882                         thread_count += cnt > 0 ? cnt : 0;
 883                 }
 884         }
 885
 886         if (dma_has_cap(DMA_SG, dma_dev->cap_mask)) {
 887                 if (dmatest == 1) {
 888                         cnt = dmatest_add_threads(info, dtc, DMA_SG);
 889                         thread_count += cnt > 0 ? cnt : 0;
 890                 }
 891         }
 892
 893         if (dma_has_cap(DMA_XOR, dma_dev->cap_mask)) {
 894                 cnt = dmatest_add_threads(info, dtc, DMA_XOR);
 895                 thread_count += cnt > 0 ? cnt : 0;
 896         }
 897         if (dma_has_cap(DMA_PQ, dma_dev->cap_mask)) {
 898                 cnt = dmatest_add_threads(info, dtc, DMA_PQ);
 899                 thread_count += cnt > 0 ? cnt : 0;
 900         }
 901
 902         pr_info("Started %u threads using %s\n",
 903                 thread_count, dma_chan_name(chan));
 904
 905         list_add_tail(&dtc->node, &info->channels);
 906         info->nr_channels++;
 907
 908         return 0;
 909 }
 910
 911 static bool filter(struct dma_chan *chan, void *param)
 912 {
 913         struct dmatest_params *params = param;
 914
 915         if (!dmatest_match_channel(params, chan) ||
 916             !dmatest_match_device(params, chan->device))
 917                 return false;
 918         else
 919                 return true;
 920 }
 921
 922 static void request_channels(struct dmatest_info *info,
 923                              enum dma_transaction_type type)
 924 {
 925         dma_cap_mask_t mask;
 926
 927         dma_cap_zero(mask);
 928         dma_cap_set(type, mask);
 929         for (;;) {
 930                 struct dmatest_params *params = &info->params;
 931                 struct dma_chan *chan;
 932
 933                 chan = dma_request_channel(mask, filter, params);
 934                 if (chan) {
 935                         if (dmatest_add_channel(info, chan)) {
 936                                 dma_release_channel(chan);
 937                                 break; /* add_channel failed, punt */
 938                         }
 939                 } else
 940                         break; /* no more channels available */
 941                 if (params->max_channels &&
 942                     info->nr_channels >= params->max_channels)
 943                         break; /* we have all we need */
 944         }
 945 }
 946
 947 static void run_threaded_test(struct dmatest_info *info)
 948 {
 949         struct dmatest_params *params = &info->params;
 950
 951         /* Copy test parameters */
 952         params->buf_size = test_buf_size;
 953         strlcpy(params->channel, strim(test_channel), sizeof(params->channel));
 954         strlcpy(params->device, strim(test_device), sizeof(params->device));
 955         params->threads_per_chan = threads_per_chan;
 956         params->max_channels = max_channels;
 957         params->iterations = iterations;
 958         params->xor_sources = xor_sources;
 959         params->pq_sources = pq_sources;
 960         params->timeout = timeout;
 961         params->noverify = noverify;
 962
 963         request_channels(info, DMA_MEMCPY);
 964         request_channels(info, DMA_XOR);
 965         request_channels(info, DMA_SG);
 966         request_channels(info, DMA_PQ);
 967 }
 968
 969 static void stop_threaded_test(struct dmatest_info *info)
 970 {
 971         struct dmatest_chan *dtc, *_dtc;
 972         struct dma_chan *chan;
 973
 974         list_for_each_entry_safe(dtc, _dtc, &info->channels, node) {
 975                 list_del(&dtc->node);
 976                 chan = dtc->chan;
 977                 dmatest_cleanup_channel(dtc);
 978                 pr_debug("dropped channel %s\n", dma_chan_name(chan));
 979                 dma_release_channel(chan);
 980         }
 981
 982         info->nr_channels = 0;
 983 }
 984
 985 static void restart_threaded_test(struct dmatest_info *info, bool run)
 986 {
 987         /* we might be called early to set run=, defer running until all
 988          * parameters have been evaluated
 989          */
 990         if (!info->did_init)
 991                 return;
 992
 993         /* Stop any running test first */
 994         stop_threaded_test(info);
 995
 996         /* Run test with new parameters */
 997         run_threaded_test(info);
 998 }
 999
1000 static int dmatest_run_get(char *val, const struct kernel_param *kp)
1001 {
1002         struct dmatest_info *info = &test_info;
1003
1004         mutex_lock(&info->lock);
1005         if (is_threaded_test_run(info)) {
1006                 dmatest_run = true;
1007         } else {
1008                 stop_threaded_test(info);
1009                 dmatest_run = false;
1010         }
1011         mutex_unlock(&info->lock);
1012
1013         return param_get_bool(val, kp);
1014 }
1015
1016 static int dmatest_run_set(const char *val, const struct kernel_param *kp)
1017 {
1018         struct dmatest_info *info = &test_info;
1019         int ret;
1020
1021         mutex_lock(&info->lock);
1022         ret = param_set_bool(val, kp);
1023         if (ret) {
1024                 mutex_unlock(&info->lock);
1025                 return ret;
1026         }
1027
1028         if (is_threaded_test_run(info))
1029                 ret = -EBUSY;
1030         else if (dmatest_run)
1031                 restart_threaded_test(info, dmatest_run);
1032
1033         mutex_unlock(&info->lock);
1034
1035         return ret;
1036 }
1037
1038 static int __init dmatest_init(void)
1039 {
1040         struct dmatest_info *info = &test_info;
1041         struct dmatest_params *params = &info->params;
1042
1043         if (dmatest_run) {
1044                 mutex_lock(&info->lock);
1045                 run_threaded_test(info);
1046                 mutex_unlock(&info->lock);
1047         }
1048
1049         if (params->iterations && wait)
1050                 wait_event(thread_wait, !is_threaded_test_run(info));
1051
1052         /* module parameters are stable, inittime tests are started,
1053          * let userspace take over 'run' control
1054          */
1055         info->did_init = true;
1056
1057         return 0;
1058 }
1059 /* when compiled-in wait for drivers to load first */
1060 late_initcall(dmatest_init);
1061
1062 static void __exit dmatest_exit(void)
1063 {
1064         struct dmatest_info *info = &test_info;
1065
1066         mutex_lock(&info->lock);
1067         stop_threaded_test(info);
1068         mutex_unlock(&info->lock);
1069 }
1070 module_exit(dmatest_exit);
1071
1072 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
1073 MODULE_LICENSE("GPL v2");