2 * Freescale PXP Register Definitions
4 * Copyright (C) 2012-2013 Freescale Semiconductor, Inc. All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
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18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 * This file is created by xml file. Don't Edit it.
23 * Template revision: 1.3
26 #ifndef __ARCH_ARM___PXP_H
27 #define __ARCH_ARM___PXP_H
29 #define HW_PXP_CTRL (0x00000000)
30 #define HW_PXP_CTRL_SET (0x00000004)
31 #define HW_PXP_CTRL_CLR (0x00000008)
32 #define HW_PXP_CTRL_TOG (0x0000000c)
34 #define BM_PXP_CTRL_SFTRST 0x80000000
35 #define BM_PXP_CTRL_CLKGATE 0x40000000
36 #define BM_PXP_CTRL_RSVD4 0x20000000
37 #define BM_PXP_CTRL_EN_REPEAT 0x10000000
38 #define BP_PXP_CTRL_RSVD3 26
39 #define BM_PXP_CTRL_RSVD3 0x0C000000
40 #define BF_PXP_CTRL_RSVD3(v) \
41 (((v) << 26) & BM_PXP_CTRL_RSVD3)
42 #define BP_PXP_CTRL_INTERLACED_INPUT 24
43 #define BM_PXP_CTRL_INTERLACED_INPUT 0x03000000
44 #define BF_PXP_CTRL_INTERLACED_INPUT(v) \
45 (((v) << 24) & BM_PXP_CTRL_INTERLACED_INPUT)
46 #define BV_PXP_CTRL_INTERLACED_INPUT__PROGRESSIVE 0x0
47 #define BV_PXP_CTRL_INTERLACED_INPUT__FIELD0 0x2
48 #define BV_PXP_CTRL_INTERLACED_INPUT__FIELD1 0x3
49 #define BM_PXP_CTRL_BLOCK_SIZE 0x00800000
50 #define BV_PXP_CTRL_BLOCK_SIZE__8X8 0x0
51 #define BV_PXP_CTRL_BLOCK_SIZE__16X16 0x1
52 #define BM_PXP_CTRL_ROT_POS 0x00400000
53 #define BM_PXP_CTRL_IN_PLACE 0x00200000
54 #define BP_PXP_CTRL_RSVD1 12
55 #define BM_PXP_CTRL_RSVD1 0x001FF000
56 #define BF_PXP_CTRL_RSVD1(v) \
57 (((v) << 12) & BM_PXP_CTRL_RSVD1)
58 #define BM_PXP_CTRL_VFLIP 0x00000800
59 #define BM_PXP_CTRL_HFLIP 0x00000400
60 #define BP_PXP_CTRL_ROTATE 8
61 #define BM_PXP_CTRL_ROTATE 0x00000300
62 #define BF_PXP_CTRL_ROTATE(v) \
63 (((v) << 8) & BM_PXP_CTRL_ROTATE)
64 #define BV_PXP_CTRL_ROTATE__ROT_0 0x0
65 #define BV_PXP_CTRL_ROTATE__ROT_90 0x1
66 #define BV_PXP_CTRL_ROTATE__ROT_180 0x2
67 #define BV_PXP_CTRL_ROTATE__ROT_270 0x3
68 #define BP_PXP_CTRL_RSVD0 5
69 #define BM_PXP_CTRL_RSVD0 0x000000E0
70 #define BF_PXP_CTRL_RSVD0(v) \
71 (((v) << 5) & BM_PXP_CTRL_RSVD0)
72 #define BM_PXP_CTRL_ENABLE_LCD_HANDSHAKE 0x00000010
73 #define BM_PXP_CTRL_LUT_DMA_IRQ_ENABLE 0x00000008
74 #define BM_PXP_CTRL_NEXT_IRQ_ENABLE 0x00000004
75 #define BM_PXP_CTRL_IRQ_ENABLE 0x00000002
76 #define BM_PXP_CTRL_ENABLE 0x00000001
78 #define HW_PXP_STAT (0x00000010)
79 #define HW_PXP_STAT_SET (0x00000014)
80 #define HW_PXP_STAT_CLR (0x00000018)
81 #define HW_PXP_STAT_TOG (0x0000001c)
83 #define BP_PXP_STAT_BLOCKX 24
84 #define BM_PXP_STAT_BLOCKX 0xFF000000
85 #define BF_PXP_STAT_BLOCKX(v) \
86 (((v) << 24) & BM_PXP_STAT_BLOCKX)
87 #define BP_PXP_STAT_BLOCKY 16
88 #define BM_PXP_STAT_BLOCKY 0x00FF0000
89 #define BF_PXP_STAT_BLOCKY(v) \
90 (((v) << 16) & BM_PXP_STAT_BLOCKY)
91 #define BP_PXP_STAT_RSVD2 9
92 #define BM_PXP_STAT_RSVD2 0x0000FE00
93 #define BF_PXP_STAT_RSVD2(v) \
94 (((v) << 9) & BM_PXP_STAT_RSVD2)
95 #define BM_PXP_STAT_LUT_DMA_LOAD_DONE_IRQ 0x00000100
96 #define BP_PXP_STAT_AXI_ERROR_ID 4
97 #define BM_PXP_STAT_AXI_ERROR_ID 0x000000F0
98 #define BF_PXP_STAT_AXI_ERROR_ID(v) \
99 (((v) << 4) & BM_PXP_STAT_AXI_ERROR_ID)
100 #define BM_PXP_STAT_NEXT_IRQ 0x00000008
101 #define BM_PXP_STAT_AXI_READ_ERROR 0x00000004
102 #define BM_PXP_STAT_AXI_WRITE_ERROR 0x00000002
103 #define BM_PXP_STAT_IRQ 0x00000001
105 #define HW_PXP_OUT_CTRL (0x00000020)
106 #define HW_PXP_OUT_CTRL_SET (0x00000024)
107 #define HW_PXP_OUT_CTRL_CLR (0x00000028)
108 #define HW_PXP_OUT_CTRL_TOG (0x0000002c)
110 #define BP_PXP_OUT_CTRL_ALPHA 24
111 #define BM_PXP_OUT_CTRL_ALPHA 0xFF000000
112 #define BF_PXP_OUT_CTRL_ALPHA(v) \
113 (((v) << 24) & BM_PXP_OUT_CTRL_ALPHA)
114 #define BM_PXP_OUT_CTRL_ALPHA_OUTPUT 0x00800000
115 #define BP_PXP_OUT_CTRL_RSVD1 10
116 #define BM_PXP_OUT_CTRL_RSVD1 0x007FFC00
117 #define BF_PXP_OUT_CTRL_RSVD1(v) \
118 (((v) << 10) & BM_PXP_OUT_CTRL_RSVD1)
119 #define BP_PXP_OUT_CTRL_INTERLACED_OUTPUT 8
120 #define BM_PXP_OUT_CTRL_INTERLACED_OUTPUT 0x00000300
121 #define BF_PXP_OUT_CTRL_INTERLACED_OUTPUT(v) \
122 (((v) << 8) & BM_PXP_OUT_CTRL_INTERLACED_OUTPUT)
123 #define BV_PXP_OUT_CTRL_INTERLACED_OUTPUT__PROGRESSIVE 0x0
124 #define BV_PXP_OUT_CTRL_INTERLACED_OUTPUT__FIELD0 0x1
125 #define BV_PXP_OUT_CTRL_INTERLACED_OUTPUT__FIELD1 0x2
126 #define BV_PXP_OUT_CTRL_INTERLACED_OUTPUT__INTERLACED 0x3
127 #define BP_PXP_OUT_CTRL_RSVD0 5
128 #define BM_PXP_OUT_CTRL_RSVD0 0x000000E0
129 #define BF_PXP_OUT_CTRL_RSVD0(v) \
130 (((v) << 5) & BM_PXP_OUT_CTRL_RSVD0)
131 #define BP_PXP_OUT_CTRL_FORMAT 0
132 #define BM_PXP_OUT_CTRL_FORMAT 0x0000001F
133 #define BF_PXP_OUT_CTRL_FORMAT(v) \
134 (((v) << 0) & BM_PXP_OUT_CTRL_FORMAT)
135 #define BV_PXP_OUT_CTRL_FORMAT__ARGB8888 0x0
136 #define BV_PXP_OUT_CTRL_FORMAT__RGB888 0x4
137 #define BV_PXP_OUT_CTRL_FORMAT__RGB888P 0x5
138 #define BV_PXP_OUT_CTRL_FORMAT__ARGB1555 0x8
139 #define BV_PXP_OUT_CTRL_FORMAT__ARGB4444 0x9
140 #define BV_PXP_OUT_CTRL_FORMAT__RGB555 0xC
141 #define BV_PXP_OUT_CTRL_FORMAT__RGB444 0xD
142 #define BV_PXP_OUT_CTRL_FORMAT__RGB565 0xE
143 #define BV_PXP_OUT_CTRL_FORMAT__YUV1P444 0x10
144 #define BV_PXP_OUT_CTRL_FORMAT__UYVY1P422 0x12
145 #define BV_PXP_OUT_CTRL_FORMAT__VYUY1P422 0x13
146 #define BV_PXP_OUT_CTRL_FORMAT__Y8 0x14
147 #define BV_PXP_OUT_CTRL_FORMAT__Y4 0x15
148 #define BV_PXP_OUT_CTRL_FORMAT__YUV2P422 0x18
149 #define BV_PXP_OUT_CTRL_FORMAT__YUV2P420 0x19
150 #define BV_PXP_OUT_CTRL_FORMAT__YVU2P422 0x1A
151 #define BV_PXP_OUT_CTRL_FORMAT__YVU2P420 0x1B
153 #define HW_PXP_OUT_BUF (0x00000030)
155 #define BP_PXP_OUT_BUF_ADDR 0
156 #define BM_PXP_OUT_BUF_ADDR 0xFFFFFFFF
157 #define BF_PXP_OUT_BUF_ADDR(v) (v)
159 #define HW_PXP_OUT_BUF2 (0x00000040)
161 #define BP_PXP_OUT_BUF2_ADDR 0
162 #define BM_PXP_OUT_BUF2_ADDR 0xFFFFFFFF
163 #define BF_PXP_OUT_BUF2_ADDR(v) (v)
165 #define HW_PXP_OUT_PITCH (0x00000050)
167 #define BP_PXP_OUT_PITCH_RSVD 16
168 #define BM_PXP_OUT_PITCH_RSVD 0xFFFF0000
169 #define BF_PXP_OUT_PITCH_RSVD(v) \
170 (((v) << 16) & BM_PXP_OUT_PITCH_RSVD)
171 #define BP_PXP_OUT_PITCH_PITCH 0
172 #define BM_PXP_OUT_PITCH_PITCH 0x0000FFFF
173 #define BF_PXP_OUT_PITCH_PITCH(v) \
174 (((v) << 0) & BM_PXP_OUT_PITCH_PITCH)
176 #define HW_PXP_OUT_LRC (0x00000060)
178 #define BP_PXP_OUT_LRC_RSVD1 30
179 #define BM_PXP_OUT_LRC_RSVD1 0xC0000000
180 #define BF_PXP_OUT_LRC_RSVD1(v) \
181 (((v) << 30) & BM_PXP_OUT_LRC_RSVD1)
182 #define BP_PXP_OUT_LRC_X 16
183 #define BM_PXP_OUT_LRC_X 0x3FFF0000
184 #define BF_PXP_OUT_LRC_X(v) \
185 (((v) << 16) & BM_PXP_OUT_LRC_X)
186 #define BP_PXP_OUT_LRC_RSVD0 14
187 #define BM_PXP_OUT_LRC_RSVD0 0x0000C000
188 #define BF_PXP_OUT_LRC_RSVD0(v) \
189 (((v) << 14) & BM_PXP_OUT_LRC_RSVD0)
190 #define BP_PXP_OUT_LRC_Y 0
191 #define BM_PXP_OUT_LRC_Y 0x00003FFF
192 #define BF_PXP_OUT_LRC_Y(v) \
193 (((v) << 0) & BM_PXP_OUT_LRC_Y)
195 #define HW_PXP_OUT_PS_ULC (0x00000070)
197 #define BP_PXP_OUT_PS_ULC_RSVD1 30
198 #define BM_PXP_OUT_PS_ULC_RSVD1 0xC0000000
199 #define BF_PXP_OUT_PS_ULC_RSVD1(v) \
200 (((v) << 30) & BM_PXP_OUT_PS_ULC_RSVD1)
201 #define BP_PXP_OUT_PS_ULC_X 16
202 #define BM_PXP_OUT_PS_ULC_X 0x3FFF0000
203 #define BF_PXP_OUT_PS_ULC_X(v) \
204 (((v) << 16) & BM_PXP_OUT_PS_ULC_X)
205 #define BP_PXP_OUT_PS_ULC_RSVD0 14
206 #define BM_PXP_OUT_PS_ULC_RSVD0 0x0000C000
207 #define BF_PXP_OUT_PS_ULC_RSVD0(v) \
208 (((v) << 14) & BM_PXP_OUT_PS_ULC_RSVD0)
209 #define BP_PXP_OUT_PS_ULC_Y 0
210 #define BM_PXP_OUT_PS_ULC_Y 0x00003FFF
211 #define BF_PXP_OUT_PS_ULC_Y(v) \
212 (((v) << 0) & BM_PXP_OUT_PS_ULC_Y)
214 #define HW_PXP_OUT_PS_LRC (0x00000080)
216 #define BP_PXP_OUT_PS_LRC_RSVD1 30
217 #define BM_PXP_OUT_PS_LRC_RSVD1 0xC0000000
218 #define BF_PXP_OUT_PS_LRC_RSVD1(v) \
219 (((v) << 30) & BM_PXP_OUT_PS_LRC_RSVD1)
220 #define BP_PXP_OUT_PS_LRC_X 16
221 #define BM_PXP_OUT_PS_LRC_X 0x3FFF0000
222 #define BF_PXP_OUT_PS_LRC_X(v) \
223 (((v) << 16) & BM_PXP_OUT_PS_LRC_X)
224 #define BP_PXP_OUT_PS_LRC_RSVD0 14
225 #define BM_PXP_OUT_PS_LRC_RSVD0 0x0000C000
226 #define BF_PXP_OUT_PS_LRC_RSVD0(v) \
227 (((v) << 14) & BM_PXP_OUT_PS_LRC_RSVD0)
228 #define BP_PXP_OUT_PS_LRC_Y 0
229 #define BM_PXP_OUT_PS_LRC_Y 0x00003FFF
230 #define BF_PXP_OUT_PS_LRC_Y(v) \
231 (((v) << 0) & BM_PXP_OUT_PS_LRC_Y)
233 #define HW_PXP_OUT_AS_ULC (0x00000090)
235 #define BP_PXP_OUT_AS_ULC_RSVD1 30
236 #define BM_PXP_OUT_AS_ULC_RSVD1 0xC0000000
237 #define BF_PXP_OUT_AS_ULC_RSVD1(v) \
238 (((v) << 30) & BM_PXP_OUT_AS_ULC_RSVD1)
239 #define BP_PXP_OUT_AS_ULC_X 16
240 #define BM_PXP_OUT_AS_ULC_X 0x3FFF0000
241 #define BF_PXP_OUT_AS_ULC_X(v) \
242 (((v) << 16) & BM_PXP_OUT_AS_ULC_X)
243 #define BP_PXP_OUT_AS_ULC_RSVD0 14
244 #define BM_PXP_OUT_AS_ULC_RSVD0 0x0000C000
245 #define BF_PXP_OUT_AS_ULC_RSVD0(v) \
246 (((v) << 14) & BM_PXP_OUT_AS_ULC_RSVD0)
247 #define BP_PXP_OUT_AS_ULC_Y 0
248 #define BM_PXP_OUT_AS_ULC_Y 0x00003FFF
249 #define BF_PXP_OUT_AS_ULC_Y(v) \
250 (((v) << 0) & BM_PXP_OUT_AS_ULC_Y)
252 #define HW_PXP_OUT_AS_LRC (0x000000a0)
254 #define BP_PXP_OUT_AS_LRC_RSVD1 30
255 #define BM_PXP_OUT_AS_LRC_RSVD1 0xC0000000
256 #define BF_PXP_OUT_AS_LRC_RSVD1(v) \
257 (((v) << 30) & BM_PXP_OUT_AS_LRC_RSVD1)
258 #define BP_PXP_OUT_AS_LRC_X 16
259 #define BM_PXP_OUT_AS_LRC_X 0x3FFF0000
260 #define BF_PXP_OUT_AS_LRC_X(v) \
261 (((v) << 16) & BM_PXP_OUT_AS_LRC_X)
262 #define BP_PXP_OUT_AS_LRC_RSVD0 14
263 #define BM_PXP_OUT_AS_LRC_RSVD0 0x0000C000
264 #define BF_PXP_OUT_AS_LRC_RSVD0(v) \
265 (((v) << 14) & BM_PXP_OUT_AS_LRC_RSVD0)
266 #define BP_PXP_OUT_AS_LRC_Y 0
267 #define BM_PXP_OUT_AS_LRC_Y 0x00003FFF
268 #define BF_PXP_OUT_AS_LRC_Y(v) \
269 (((v) << 0) & BM_PXP_OUT_AS_LRC_Y)
271 #define HW_PXP_PS_CTRL (0x000000b0)
272 #define HW_PXP_PS_CTRL_SET (0x000000b4)
273 #define HW_PXP_PS_CTRL_CLR (0x000000b8)
274 #define HW_PXP_PS_CTRL_TOG (0x000000bc)
276 #define BP_PXP_PS_CTRL_RSVD1 12
277 #define BM_PXP_PS_CTRL_RSVD1 0xFFFFF000
278 #define BF_PXP_PS_CTRL_RSVD1(v) \
279 (((v) << 12) & BM_PXP_PS_CTRL_RSVD1)
280 #define BP_PXP_PS_CTRL_DECX 10
281 #define BM_PXP_PS_CTRL_DECX 0x00000C00
282 #define BF_PXP_PS_CTRL_DECX(v) \
283 (((v) << 10) & BM_PXP_PS_CTRL_DECX)
284 #define BV_PXP_PS_CTRL_DECX__DISABLE 0x0
285 #define BV_PXP_PS_CTRL_DECX__DECX2 0x1
286 #define BV_PXP_PS_CTRL_DECX__DECX4 0x2
287 #define BV_PXP_PS_CTRL_DECX__DECX8 0x3
288 #define BP_PXP_PS_CTRL_DECY 8
289 #define BM_PXP_PS_CTRL_DECY 0x00000300
290 #define BF_PXP_PS_CTRL_DECY(v) \
291 (((v) << 8) & BM_PXP_PS_CTRL_DECY)
292 #define BV_PXP_PS_CTRL_DECY__DISABLE 0x0
293 #define BV_PXP_PS_CTRL_DECY__DECY2 0x1
294 #define BV_PXP_PS_CTRL_DECY__DECY4 0x2
295 #define BV_PXP_PS_CTRL_DECY__DECY8 0x3
296 #define BP_PXP_PS_CTRL_RSVD0 5
297 #define BM_PXP_PS_CTRL_RSVD0 0x000000E0
298 #define BF_PXP_PS_CTRL_RSVD0(v) \
299 (((v) << 5) & BM_PXP_PS_CTRL_RSVD0)
300 #define BP_PXP_PS_CTRL_FORMAT 0
301 #define BM_PXP_PS_CTRL_FORMAT 0x0000001F
302 #define BF_PXP_PS_CTRL_FORMAT(v) \
303 (((v) << 0) & BM_PXP_PS_CTRL_FORMAT)
304 #define BV_PXP_PS_CTRL_FORMAT__RGB888 0x4
305 #define BV_PXP_PS_CTRL_FORMAT__RGB555 0xC
306 #define BV_PXP_PS_CTRL_FORMAT__RGB444 0xD
307 #define BV_PXP_PS_CTRL_FORMAT__RGB565 0xE
308 #define BV_PXP_PS_CTRL_FORMAT__YUV1P444 0x10
309 #define BV_PXP_PS_CTRL_FORMAT__UYVY1P422 0x12
310 #define BV_PXP_PS_CTRL_FORMAT__VYUY1P422 0x13
311 #define BV_PXP_PS_CTRL_FORMAT__Y8 0x14
312 #define BV_PXP_PS_CTRL_FORMAT__Y4 0x15
313 #define BV_PXP_PS_CTRL_FORMAT__YUV2P422 0x18
314 #define BV_PXP_PS_CTRL_FORMAT__YUV2P420 0x19
315 #define BV_PXP_PS_CTRL_FORMAT__YVU2P422 0x1A
316 #define BV_PXP_PS_CTRL_FORMAT__YVU2P420 0x1B
317 #define BV_PXP_PS_CTRL_FORMAT__YUV422 0x1E
318 #define BV_PXP_PS_CTRL_FORMAT__YUV420 0x1F
320 #define HW_PXP_PS_BUF (0x000000c0)
322 #define BP_PXP_PS_BUF_ADDR 0
323 #define BM_PXP_PS_BUF_ADDR 0xFFFFFFFF
324 #define BF_PXP_PS_BUF_ADDR(v) (v)
326 #define HW_PXP_PS_UBUF (0x000000d0)
328 #define BP_PXP_PS_UBUF_ADDR 0
329 #define BM_PXP_PS_UBUF_ADDR 0xFFFFFFFF
330 #define BF_PXP_PS_UBUF_ADDR(v) (v)
332 #define HW_PXP_PS_VBUF (0x000000e0)
334 #define BP_PXP_PS_VBUF_ADDR 0
335 #define BM_PXP_PS_VBUF_ADDR 0xFFFFFFFF
336 #define BF_PXP_PS_VBUF_ADDR(v) (v)
338 #define HW_PXP_PS_PITCH (0x000000f0)
340 #define BP_PXP_PS_PITCH_RSVD 16
341 #define BM_PXP_PS_PITCH_RSVD 0xFFFF0000
342 #define BF_PXP_PS_PITCH_RSVD(v) \
343 (((v) << 16) & BM_PXP_PS_PITCH_RSVD)
344 #define BP_PXP_PS_PITCH_PITCH 0
345 #define BM_PXP_PS_PITCH_PITCH 0x0000FFFF
346 #define BF_PXP_PS_PITCH_PITCH(v) \
347 (((v) << 0) & BM_PXP_PS_PITCH_PITCH)
349 #define HW_PXP_PS_BACKGROUND (0x00000100)
351 #define BP_PXP_PS_BACKGROUND_RSVD 24
352 #define BM_PXP_PS_BACKGROUND_RSVD 0xFF000000
353 #define BF_PXP_PS_BACKGROUND_RSVD(v) \
354 (((v) << 24) & BM_PXP_PS_BACKGROUND_RSVD)
355 #define BP_PXP_PS_BACKGROUND_COLOR 0
356 #define BM_PXP_PS_BACKGROUND_COLOR 0x00FFFFFF
357 #define BF_PXP_PS_BACKGROUND_COLOR(v) \
358 (((v) << 0) & BM_PXP_PS_BACKGROUND_COLOR)
360 #define HW_PXP_PS_SCALE (0x00000110)
362 #define BM_PXP_PS_SCALE_RSVD2 0x80000000
363 #define BP_PXP_PS_SCALE_YSCALE 16
364 #define BM_PXP_PS_SCALE_YSCALE 0x7FFF0000
365 #define BF_PXP_PS_SCALE_YSCALE(v) \
366 (((v) << 16) & BM_PXP_PS_SCALE_YSCALE)
367 #define BM_PXP_PS_SCALE_RSVD1 0x00008000
368 #define BP_PXP_PS_SCALE_XSCALE 0
369 #define BM_PXP_PS_SCALE_XSCALE 0x00007FFF
370 #define BF_PXP_PS_SCALE_XSCALE(v) \
371 (((v) << 0) & BM_PXP_PS_SCALE_XSCALE)
373 #define HW_PXP_PS_OFFSET (0x00000120)
375 #define BP_PXP_PS_OFFSET_RSVD2 28
376 #define BM_PXP_PS_OFFSET_RSVD2 0xF0000000
377 #define BF_PXP_PS_OFFSET_RSVD2(v) \
378 (((v) << 28) & BM_PXP_PS_OFFSET_RSVD2)
379 #define BP_PXP_PS_OFFSET_YOFFSET 16
380 #define BM_PXP_PS_OFFSET_YOFFSET 0x0FFF0000
381 #define BF_PXP_PS_OFFSET_YOFFSET(v) \
382 (((v) << 16) & BM_PXP_PS_OFFSET_YOFFSET)
383 #define BP_PXP_PS_OFFSET_RSVD1 12
384 #define BM_PXP_PS_OFFSET_RSVD1 0x0000F000
385 #define BF_PXP_PS_OFFSET_RSVD1(v) \
386 (((v) << 12) & BM_PXP_PS_OFFSET_RSVD1)
387 #define BP_PXP_PS_OFFSET_XOFFSET 0
388 #define BM_PXP_PS_OFFSET_XOFFSET 0x00000FFF
389 #define BF_PXP_PS_OFFSET_XOFFSET(v) \
390 (((v) << 0) & BM_PXP_PS_OFFSET_XOFFSET)
392 #define HW_PXP_PS_CLRKEYLOW (0x00000130)
394 #define BP_PXP_PS_CLRKEYLOW_RSVD1 24
395 #define BM_PXP_PS_CLRKEYLOW_RSVD1 0xFF000000
396 #define BF_PXP_PS_CLRKEYLOW_RSVD1(v) \
397 (((v) << 24) & BM_PXP_PS_CLRKEYLOW_RSVD1)
398 #define BP_PXP_PS_CLRKEYLOW_PIXEL 0
399 #define BM_PXP_PS_CLRKEYLOW_PIXEL 0x00FFFFFF
400 #define BF_PXP_PS_CLRKEYLOW_PIXEL(v) \
401 (((v) << 0) & BM_PXP_PS_CLRKEYLOW_PIXEL)
403 #define HW_PXP_PS_CLRKEYHIGH (0x00000140)
405 #define BP_PXP_PS_CLRKEYHIGH_RSVD1 24
406 #define BM_PXP_PS_CLRKEYHIGH_RSVD1 0xFF000000
407 #define BF_PXP_PS_CLRKEYHIGH_RSVD1(v) \
408 (((v) << 24) & BM_PXP_PS_CLRKEYHIGH_RSVD1)
409 #define BP_PXP_PS_CLRKEYHIGH_PIXEL 0
410 #define BM_PXP_PS_CLRKEYHIGH_PIXEL 0x00FFFFFF
411 #define BF_PXP_PS_CLRKEYHIGH_PIXEL(v) \
412 (((v) << 0) & BM_PXP_PS_CLRKEYHIGH_PIXEL)
414 #define HW_PXP_AS_CTRL (0x00000150)
416 #define BP_PXP_AS_CTRL_RSVD1 21
417 #define BM_PXP_AS_CTRL_RSVD1 0xFFE00000
418 #define BF_PXP_AS_CTRL_RSVD1(v) \
419 (((v) << 21) & BM_PXP_AS_CTRL_RSVD1)
420 #define BM_PXP_AS_CTRL_ALPHA_INVERT 0x00100000
421 #define BP_PXP_AS_CTRL_ROP 16
422 #define BM_PXP_AS_CTRL_ROP 0x000F0000
423 #define BF_PXP_AS_CTRL_ROP(v) \
424 (((v) << 16) & BM_PXP_AS_CTRL_ROP)
425 #define BV_PXP_AS_CTRL_ROP__MASKAS 0x0
426 #define BV_PXP_AS_CTRL_ROP__MASKNOTAS 0x1
427 #define BV_PXP_AS_CTRL_ROP__MASKASNOT 0x2
428 #define BV_PXP_AS_CTRL_ROP__MERGEAS 0x3
429 #define BV_PXP_AS_CTRL_ROP__MERGENOTAS 0x4
430 #define BV_PXP_AS_CTRL_ROP__MERGEASNOT 0x5
431 #define BV_PXP_AS_CTRL_ROP__NOTCOPYAS 0x6
432 #define BV_PXP_AS_CTRL_ROP__NOT 0x7
433 #define BV_PXP_AS_CTRL_ROP__NOTMASKAS 0x8
434 #define BV_PXP_AS_CTRL_ROP__NOTMERGEAS 0x9
435 #define BV_PXP_AS_CTRL_ROP__XORAS 0xA
436 #define BV_PXP_AS_CTRL_ROP__NOTXORAS 0xB
437 #define BP_PXP_AS_CTRL_ALPHA 8
438 #define BM_PXP_AS_CTRL_ALPHA 0x0000FF00
439 #define BF_PXP_AS_CTRL_ALPHA(v) \
440 (((v) << 8) & BM_PXP_AS_CTRL_ALPHA)
441 #define BP_PXP_AS_CTRL_FORMAT 4
442 #define BM_PXP_AS_CTRL_FORMAT 0x000000F0
443 #define BF_PXP_AS_CTRL_FORMAT(v) \
444 (((v) << 4) & BM_PXP_AS_CTRL_FORMAT)
445 #define BV_PXP_AS_CTRL_FORMAT__ARGB8888 0x0
446 #define BV_PXP_AS_CTRL_FORMAT__RGB888 0x4
447 #define BV_PXP_AS_CTRL_FORMAT__ARGB1555 0x8
448 #define BV_PXP_AS_CTRL_FORMAT__ARGB4444 0x9
449 #define BV_PXP_AS_CTRL_FORMAT__RGB555 0xC
450 #define BV_PXP_AS_CTRL_FORMAT__RGB444 0xD
451 #define BV_PXP_AS_CTRL_FORMAT__RGB565 0xE
452 #define BM_PXP_AS_CTRL_ENABLE_COLORKEY 0x00000008
453 #define BP_PXP_AS_CTRL_ALPHA_CTRL 1
454 #define BM_PXP_AS_CTRL_ALPHA_CTRL 0x00000006
455 #define BF_PXP_AS_CTRL_ALPHA_CTRL(v) \
456 (((v) << 1) & BM_PXP_AS_CTRL_ALPHA_CTRL)
457 #define BV_PXP_AS_CTRL_ALPHA_CTRL__Embedded 0x0
458 #define BV_PXP_AS_CTRL_ALPHA_CTRL__Override 0x1
459 #define BV_PXP_AS_CTRL_ALPHA_CTRL__Multiply 0x2
460 #define BV_PXP_AS_CTRL_ALPHA_CTRL__ROPs 0x3
461 #define BM_PXP_AS_CTRL_RSVD0 0x00000001
463 #define HW_PXP_AS_BUF (0x00000160)
465 #define BP_PXP_AS_BUF_ADDR 0
466 #define BM_PXP_AS_BUF_ADDR 0xFFFFFFFF
467 #define BF_PXP_AS_BUF_ADDR(v) (v)
469 #define HW_PXP_AS_PITCH (0x00000170)
471 #define BP_PXP_AS_PITCH_RSVD 16
472 #define BM_PXP_AS_PITCH_RSVD 0xFFFF0000
473 #define BF_PXP_AS_PITCH_RSVD(v) \
474 (((v) << 16) & BM_PXP_AS_PITCH_RSVD)
475 #define BP_PXP_AS_PITCH_PITCH 0
476 #define BM_PXP_AS_PITCH_PITCH 0x0000FFFF
477 #define BF_PXP_AS_PITCH_PITCH(v) \
478 (((v) << 0) & BM_PXP_AS_PITCH_PITCH)
480 #define HW_PXP_AS_CLRKEYLOW (0x00000180)
482 #define BP_PXP_AS_CLRKEYLOW_RSVD1 24
483 #define BM_PXP_AS_CLRKEYLOW_RSVD1 0xFF000000
484 #define BF_PXP_AS_CLRKEYLOW_RSVD1(v) \
485 (((v) << 24) & BM_PXP_AS_CLRKEYLOW_RSVD1)
486 #define BP_PXP_AS_CLRKEYLOW_PIXEL 0
487 #define BM_PXP_AS_CLRKEYLOW_PIXEL 0x00FFFFFF
488 #define BF_PXP_AS_CLRKEYLOW_PIXEL(v) \
489 (((v) << 0) & BM_PXP_AS_CLRKEYLOW_PIXEL)
491 #define HW_PXP_AS_CLRKEYHIGH (0x00000190)
493 #define BP_PXP_AS_CLRKEYHIGH_RSVD1 24
494 #define BM_PXP_AS_CLRKEYHIGH_RSVD1 0xFF000000
495 #define BF_PXP_AS_CLRKEYHIGH_RSVD1(v) \
496 (((v) << 24) & BM_PXP_AS_CLRKEYHIGH_RSVD1)
497 #define BP_PXP_AS_CLRKEYHIGH_PIXEL 0
498 #define BM_PXP_AS_CLRKEYHIGH_PIXEL 0x00FFFFFF
499 #define BF_PXP_AS_CLRKEYHIGH_PIXEL(v) \
500 (((v) << 0) & BM_PXP_AS_CLRKEYHIGH_PIXEL)
502 #define HW_PXP_CSC1_COEF0 (0x000001a0)
504 #define BM_PXP_CSC1_COEF0_YCBCR_MODE 0x80000000
505 #define BM_PXP_CSC1_COEF0_BYPASS 0x40000000
506 #define BM_PXP_CSC1_COEF0_RSVD1 0x20000000
507 #define BP_PXP_CSC1_COEF0_C0 18
508 #define BM_PXP_CSC1_COEF0_C0 0x1FFC0000
509 #define BF_PXP_CSC1_COEF0_C0(v) \
510 (((v) << 18) & BM_PXP_CSC1_COEF0_C0)
511 #define BP_PXP_CSC1_COEF0_UV_OFFSET 9
512 #define BM_PXP_CSC1_COEF0_UV_OFFSET 0x0003FE00
513 #define BF_PXP_CSC1_COEF0_UV_OFFSET(v) \
514 (((v) << 9) & BM_PXP_CSC1_COEF0_UV_OFFSET)
515 #define BP_PXP_CSC1_COEF0_Y_OFFSET 0
516 #define BM_PXP_CSC1_COEF0_Y_OFFSET 0x000001FF
517 #define BF_PXP_CSC1_COEF0_Y_OFFSET(v) \
518 (((v) << 0) & BM_PXP_CSC1_COEF0_Y_OFFSET)
520 #define HW_PXP_CSC1_COEF1 (0x000001b0)
522 #define BP_PXP_CSC1_COEF1_RSVD1 27
523 #define BM_PXP_CSC1_COEF1_RSVD1 0xF8000000
524 #define BF_PXP_CSC1_COEF1_RSVD1(v) \
525 (((v) << 27) & BM_PXP_CSC1_COEF1_RSVD1)
526 #define BP_PXP_CSC1_COEF1_C1 16
527 #define BM_PXP_CSC1_COEF1_C1 0x07FF0000
528 #define BF_PXP_CSC1_COEF1_C1(v) \
529 (((v) << 16) & BM_PXP_CSC1_COEF1_C1)
530 #define BP_PXP_CSC1_COEF1_RSVD0 11
531 #define BM_PXP_CSC1_COEF1_RSVD0 0x0000F800
532 #define BF_PXP_CSC1_COEF1_RSVD0(v) \
533 (((v) << 11) & BM_PXP_CSC1_COEF1_RSVD0)
534 #define BP_PXP_CSC1_COEF1_C4 0
535 #define BM_PXP_CSC1_COEF1_C4 0x000007FF
536 #define BF_PXP_CSC1_COEF1_C4(v) \
537 (((v) << 0) & BM_PXP_CSC1_COEF1_C4)
539 #define HW_PXP_CSC1_COEF2 (0x000001c0)
541 #define BP_PXP_CSC1_COEF2_RSVD1 27
542 #define BM_PXP_CSC1_COEF2_RSVD1 0xF8000000
543 #define BF_PXP_CSC1_COEF2_RSVD1(v) \
544 (((v) << 27) & BM_PXP_CSC1_COEF2_RSVD1)
545 #define BP_PXP_CSC1_COEF2_C2 16
546 #define BM_PXP_CSC1_COEF2_C2 0x07FF0000
547 #define BF_PXP_CSC1_COEF2_C2(v) \
548 (((v) << 16) & BM_PXP_CSC1_COEF2_C2)
549 #define BP_PXP_CSC1_COEF2_RSVD0 11
550 #define BM_PXP_CSC1_COEF2_RSVD0 0x0000F800
551 #define BF_PXP_CSC1_COEF2_RSVD0(v) \
552 (((v) << 11) & BM_PXP_CSC1_COEF2_RSVD0)
553 #define BP_PXP_CSC1_COEF2_C3 0
554 #define BM_PXP_CSC1_COEF2_C3 0x000007FF
555 #define BF_PXP_CSC1_COEF2_C3(v) \
556 (((v) << 0) & BM_PXP_CSC1_COEF2_C3)
558 #define HW_PXP_CSC2_CTRL (0x000001d0)
560 #define BP_PXP_CSC2_CTRL_RSVD 3
561 #define BM_PXP_CSC2_CTRL_RSVD 0xFFFFFFF8
562 #define BF_PXP_CSC2_CTRL_RSVD(v) \
563 (((v) << 3) & BM_PXP_CSC2_CTRL_RSVD)
564 #define BP_PXP_CSC2_CTRL_CSC_MODE 1
565 #define BM_PXP_CSC2_CTRL_CSC_MODE 0x00000006
566 #define BF_PXP_CSC2_CTRL_CSC_MODE(v) \
567 (((v) << 1) & BM_PXP_CSC2_CTRL_CSC_MODE)
568 #define BV_PXP_CSC2_CTRL_CSC_MODE__YUV2RGB 0x0
569 #define BV_PXP_CSC2_CTRL_CSC_MODE__YCbCr2RGB 0x1
570 #define BV_PXP_CSC2_CTRL_CSC_MODE__RGB2YUV 0x2
571 #define BV_PXP_CSC2_CTRL_CSC_MODE__RGB2YCbCr 0x3
572 #define BM_PXP_CSC2_CTRL_BYPASS 0x00000001
574 #define HW_PXP_CSC2_COEF0 (0x000001e0)
576 #define BP_PXP_CSC2_COEF0_RSVD1 27
577 #define BM_PXP_CSC2_COEF0_RSVD1 0xF8000000
578 #define BF_PXP_CSC2_COEF0_RSVD1(v) \
579 (((v) << 27) & BM_PXP_CSC2_COEF0_RSVD1)
580 #define BP_PXP_CSC2_COEF0_A2 16
581 #define BM_PXP_CSC2_COEF0_A2 0x07FF0000
582 #define BF_PXP_CSC2_COEF0_A2(v) \
583 (((v) << 16) & BM_PXP_CSC2_COEF0_A2)
584 #define BP_PXP_CSC2_COEF0_RSVD0 11
585 #define BM_PXP_CSC2_COEF0_RSVD0 0x0000F800
586 #define BF_PXP_CSC2_COEF0_RSVD0(v) \
587 (((v) << 11) & BM_PXP_CSC2_COEF0_RSVD0)
588 #define BP_PXP_CSC2_COEF0_A1 0
589 #define BM_PXP_CSC2_COEF0_A1 0x000007FF
590 #define BF_PXP_CSC2_COEF0_A1(v) \
591 (((v) << 0) & BM_PXP_CSC2_COEF0_A1)
593 #define HW_PXP_CSC2_COEF1 (0x000001f0)
595 #define BP_PXP_CSC2_COEF1_RSVD1 27
596 #define BM_PXP_CSC2_COEF1_RSVD1 0xF8000000
597 #define BF_PXP_CSC2_COEF1_RSVD1(v) \
598 (((v) << 27) & BM_PXP_CSC2_COEF1_RSVD1)
599 #define BP_PXP_CSC2_COEF1_B1 16
600 #define BM_PXP_CSC2_COEF1_B1 0x07FF0000
601 #define BF_PXP_CSC2_COEF1_B1(v) \
602 (((v) << 16) & BM_PXP_CSC2_COEF1_B1)
603 #define BP_PXP_CSC2_COEF1_RSVD0 11
604 #define BM_PXP_CSC2_COEF1_RSVD0 0x0000F800
605 #define BF_PXP_CSC2_COEF1_RSVD0(v) \
606 (((v) << 11) & BM_PXP_CSC2_COEF1_RSVD0)
607 #define BP_PXP_CSC2_COEF1_A3 0
608 #define BM_PXP_CSC2_COEF1_A3 0x000007FF
609 #define BF_PXP_CSC2_COEF1_A3(v) \
610 (((v) << 0) & BM_PXP_CSC2_COEF1_A3)
612 #define HW_PXP_CSC2_COEF2 (0x00000200)
614 #define BP_PXP_CSC2_COEF2_RSVD1 27
615 #define BM_PXP_CSC2_COEF2_RSVD1 0xF8000000
616 #define BF_PXP_CSC2_COEF2_RSVD1(v) \
617 (((v) << 27) & BM_PXP_CSC2_COEF2_RSVD1)
618 #define BP_PXP_CSC2_COEF2_B3 16
619 #define BM_PXP_CSC2_COEF2_B3 0x07FF0000
620 #define BF_PXP_CSC2_COEF2_B3(v) \
621 (((v) << 16) & BM_PXP_CSC2_COEF2_B3)
622 #define BP_PXP_CSC2_COEF2_RSVD0 11
623 #define BM_PXP_CSC2_COEF2_RSVD0 0x0000F800
624 #define BF_PXP_CSC2_COEF2_RSVD0(v) \
625 (((v) << 11) & BM_PXP_CSC2_COEF2_RSVD0)
626 #define BP_PXP_CSC2_COEF2_B2 0
627 #define BM_PXP_CSC2_COEF2_B2 0x000007FF
628 #define BF_PXP_CSC2_COEF2_B2(v) \
629 (((v) << 0) & BM_PXP_CSC2_COEF2_B2)
631 #define HW_PXP_CSC2_COEF3 (0x00000210)
633 #define BP_PXP_CSC2_COEF3_RSVD1 27
634 #define BM_PXP_CSC2_COEF3_RSVD1 0xF8000000
635 #define BF_PXP_CSC2_COEF3_RSVD1(v) \
636 (((v) << 27) & BM_PXP_CSC2_COEF3_RSVD1)
637 #define BP_PXP_CSC2_COEF3_C2 16
638 #define BM_PXP_CSC2_COEF3_C2 0x07FF0000
639 #define BF_PXP_CSC2_COEF3_C2(v) \
640 (((v) << 16) & BM_PXP_CSC2_COEF3_C2)
641 #define BP_PXP_CSC2_COEF3_RSVD0 11
642 #define BM_PXP_CSC2_COEF3_RSVD0 0x0000F800
643 #define BF_PXP_CSC2_COEF3_RSVD0(v) \
644 (((v) << 11) & BM_PXP_CSC2_COEF3_RSVD0)
645 #define BP_PXP_CSC2_COEF3_C1 0
646 #define BM_PXP_CSC2_COEF3_C1 0x000007FF
647 #define BF_PXP_CSC2_COEF3_C1(v) \
648 (((v) << 0) & BM_PXP_CSC2_COEF3_C1)
650 #define HW_PXP_CSC2_COEF4 (0x00000220)
652 #define BP_PXP_CSC2_COEF4_RSVD1 25
653 #define BM_PXP_CSC2_COEF4_RSVD1 0xFE000000
654 #define BF_PXP_CSC2_COEF4_RSVD1(v) \
655 (((v) << 25) & BM_PXP_CSC2_COEF4_RSVD1)
656 #define BP_PXP_CSC2_COEF4_D1 16
657 #define BM_PXP_CSC2_COEF4_D1 0x01FF0000
658 #define BF_PXP_CSC2_COEF4_D1(v) \
659 (((v) << 16) & BM_PXP_CSC2_COEF4_D1)
660 #define BP_PXP_CSC2_COEF4_RSVD0 11
661 #define BM_PXP_CSC2_COEF4_RSVD0 0x0000F800
662 #define BF_PXP_CSC2_COEF4_RSVD0(v) \
663 (((v) << 11) & BM_PXP_CSC2_COEF4_RSVD0)
664 #define BP_PXP_CSC2_COEF4_C3 0
665 #define BM_PXP_CSC2_COEF4_C3 0x000007FF
666 #define BF_PXP_CSC2_COEF4_C3(v) \
667 (((v) << 0) & BM_PXP_CSC2_COEF4_C3)
669 #define HW_PXP_CSC2_COEF5 (0x00000230)
671 #define BP_PXP_CSC2_COEF5_RSVD1 25
672 #define BM_PXP_CSC2_COEF5_RSVD1 0xFE000000
673 #define BF_PXP_CSC2_COEF5_RSVD1(v) \
674 (((v) << 25) & BM_PXP_CSC2_COEF5_RSVD1)
675 #define BP_PXP_CSC2_COEF5_D3 16
676 #define BM_PXP_CSC2_COEF5_D3 0x01FF0000
677 #define BF_PXP_CSC2_COEF5_D3(v) \
678 (((v) << 16) & BM_PXP_CSC2_COEF5_D3)
679 #define BP_PXP_CSC2_COEF5_RSVD0 9
680 #define BM_PXP_CSC2_COEF5_RSVD0 0x0000FE00
681 #define BF_PXP_CSC2_COEF5_RSVD0(v) \
682 (((v) << 9) & BM_PXP_CSC2_COEF5_RSVD0)
683 #define BP_PXP_CSC2_COEF5_D2 0
684 #define BM_PXP_CSC2_COEF5_D2 0x000001FF
685 #define BF_PXP_CSC2_COEF5_D2(v) \
686 (((v) << 0) & BM_PXP_CSC2_COEF5_D2)
688 #define HW_PXP_LUT_CTRL (0x00000240)
690 #define BM_PXP_LUT_CTRL_BYPASS 0x80000000
691 #define BP_PXP_LUT_CTRL_RSVD3 26
692 #define BM_PXP_LUT_CTRL_RSVD3 0x7C000000
693 #define BF_PXP_LUT_CTRL_RSVD3(v) \
694 (((v) << 26) & BM_PXP_LUT_CTRL_RSVD3)
695 #define BP_PXP_LUT_CTRL_LOOKUP_MODE 24
696 #define BM_PXP_LUT_CTRL_LOOKUP_MODE 0x03000000
697 #define BF_PXP_LUT_CTRL_LOOKUP_MODE(v) \
698 (((v) << 24) & BM_PXP_LUT_CTRL_LOOKUP_MODE)
699 #define BV_PXP_LUT_CTRL_LOOKUP_MODE__CACHE_RGB565 0x0
700 #define BV_PXP_LUT_CTRL_LOOKUP_MODE__DIRECT_Y8 0x1
701 #define BV_PXP_LUT_CTRL_LOOKUP_MODE__DIRECT_RGB444 0x2
702 #define BV_PXP_LUT_CTRL_LOOKUP_MODE__DIRECT_RGB454 0x3
703 #define BP_PXP_LUT_CTRL_RSVD2 18
704 #define BM_PXP_LUT_CTRL_RSVD2 0x00FC0000
705 #define BF_PXP_LUT_CTRL_RSVD2(v) \
706 (((v) << 18) & BM_PXP_LUT_CTRL_RSVD2)
707 #define BP_PXP_LUT_CTRL_OUT_MODE 16
708 #define BM_PXP_LUT_CTRL_OUT_MODE 0x00030000
709 #define BF_PXP_LUT_CTRL_OUT_MODE(v) \
710 (((v) << 16) & BM_PXP_LUT_CTRL_OUT_MODE)
711 #define BV_PXP_LUT_CTRL_OUT_MODE__RESERVED 0x0
712 #define BV_PXP_LUT_CTRL_OUT_MODE__Y8 0x1
713 #define BV_PXP_LUT_CTRL_OUT_MODE__RGBW4444CFA 0x2
714 #define BV_PXP_LUT_CTRL_OUT_MODE__RGB888 0x3
715 #define BP_PXP_LUT_CTRL_RSVD1 11
716 #define BM_PXP_LUT_CTRL_RSVD1 0x0000F800
717 #define BF_PXP_LUT_CTRL_RSVD1(v) \
718 (((v) << 11) & BM_PXP_LUT_CTRL_RSVD1)
719 #define BM_PXP_LUT_CTRL_SEL_8KB 0x00000400
720 #define BM_PXP_LUT_CTRL_LRU_UPD 0x00000200
721 #define BM_PXP_LUT_CTRL_INVALID 0x00000100
722 #define BP_PXP_LUT_CTRL_RSVD0 1
723 #define BM_PXP_LUT_CTRL_RSVD0 0x000000FE
724 #define BF_PXP_LUT_CTRL_RSVD0(v) \
725 (((v) << 1) & BM_PXP_LUT_CTRL_RSVD0)
726 #define BM_PXP_LUT_CTRL_DMA_START 0x00000001
728 #define HW_PXP_LUT_ADDR (0x00000250)
730 #define BM_PXP_LUT_ADDR_RSVD2 0x80000000
731 #define BP_PXP_LUT_ADDR_NUM_BYTES 16
732 #define BM_PXP_LUT_ADDR_NUM_BYTES 0x7FFF0000
733 #define BF_PXP_LUT_ADDR_NUM_BYTES(v) \
734 (((v) << 16) & BM_PXP_LUT_ADDR_NUM_BYTES)
735 #define BP_PXP_LUT_ADDR_RSVD1 14
736 #define BM_PXP_LUT_ADDR_RSVD1 0x0000C000
737 #define BF_PXP_LUT_ADDR_RSVD1(v) \
738 (((v) << 14) & BM_PXP_LUT_ADDR_RSVD1)
739 #define BP_PXP_LUT_ADDR_ADDR 0
740 #define BM_PXP_LUT_ADDR_ADDR 0x00003FFF
741 #define BF_PXP_LUT_ADDR_ADDR(v) \
742 (((v) << 0) & BM_PXP_LUT_ADDR_ADDR)
744 #define HW_PXP_LUT_DATA (0x00000260)
746 #define BP_PXP_LUT_DATA_DATA 0
747 #define BM_PXP_LUT_DATA_DATA 0xFFFFFFFF
748 #define BF_PXP_LUT_DATA_DATA(v) (v)
750 #define HW_PXP_LUT_EXTMEM (0x00000270)
752 #define BP_PXP_LUT_EXTMEM_ADDR 0
753 #define BM_PXP_LUT_EXTMEM_ADDR 0xFFFFFFFF
754 #define BF_PXP_LUT_EXTMEM_ADDR(v) (v)
756 #define HW_PXP_CFA (0x00000280)
758 #define BP_PXP_CFA_DATA 0
759 #define BM_PXP_CFA_DATA 0xFFFFFFFF
760 #define BF_PXP_CFA_DATA(v) (v)
762 #define HW_PXP_HIST_CTRL (0x00000290)
764 #define BP_PXP_HIST_CTRL_RSVD 6
765 #define BM_PXP_HIST_CTRL_RSVD 0xFFFFFFC0
766 #define BF_PXP_HIST_CTRL_RSVD(v) \
767 (((v) << 6) & BM_PXP_HIST_CTRL_RSVD)
768 #define BP_PXP_HIST_CTRL_PANEL_MODE 4
769 #define BM_PXP_HIST_CTRL_PANEL_MODE 0x00000030
770 #define BF_PXP_HIST_CTRL_PANEL_MODE(v) \
771 (((v) << 4) & BM_PXP_HIST_CTRL_PANEL_MODE)
772 #define BV_PXP_HIST_CTRL_PANEL_MODE__GRAY4 0x0
773 #define BV_PXP_HIST_CTRL_PANEL_MODE__GRAY8 0x1
774 #define BV_PXP_HIST_CTRL_PANEL_MODE__GRAY16 0x2
775 #define BV_PXP_HIST_CTRL_PANEL_MODE__GRAY32 0x3
776 #define BP_PXP_HIST_CTRL_STATUS 0
777 #define BM_PXP_HIST_CTRL_STATUS 0x0000000F
778 #define BF_PXP_HIST_CTRL_STATUS(v) \
779 (((v) << 0) & BM_PXP_HIST_CTRL_STATUS)
781 #define HW_PXP_HIST2_PARAM (0x000002a0)
783 #define BP_PXP_HIST2_PARAM_RSVD 16
784 #define BM_PXP_HIST2_PARAM_RSVD 0xFFFF0000
785 #define BF_PXP_HIST2_PARAM_RSVD(v) \
786 (((v) << 16) & BM_PXP_HIST2_PARAM_RSVD)
787 #define BP_PXP_HIST2_PARAM_RSVD1 13
788 #define BM_PXP_HIST2_PARAM_RSVD1 0x0000E000
789 #define BF_PXP_HIST2_PARAM_RSVD1(v) \
790 (((v) << 13) & BM_PXP_HIST2_PARAM_RSVD1)
791 #define BP_PXP_HIST2_PARAM_VALUE1 8
792 #define BM_PXP_HIST2_PARAM_VALUE1 0x00001F00
793 #define BF_PXP_HIST2_PARAM_VALUE1(v) \
794 (((v) << 8) & BM_PXP_HIST2_PARAM_VALUE1)
795 #define BP_PXP_HIST2_PARAM_RSVD0 5
796 #define BM_PXP_HIST2_PARAM_RSVD0 0x000000E0
797 #define BF_PXP_HIST2_PARAM_RSVD0(v) \
798 (((v) << 5) & BM_PXP_HIST2_PARAM_RSVD0)
799 #define BP_PXP_HIST2_PARAM_VALUE0 0
800 #define BM_PXP_HIST2_PARAM_VALUE0 0x0000001F
801 #define BF_PXP_HIST2_PARAM_VALUE0(v) \
802 (((v) << 0) & BM_PXP_HIST2_PARAM_VALUE0)
804 #define HW_PXP_HIST4_PARAM (0x000002b0)
806 #define BP_PXP_HIST4_PARAM_RSVD3 29
807 #define BM_PXP_HIST4_PARAM_RSVD3 0xE0000000
808 #define BF_PXP_HIST4_PARAM_RSVD3(v) \
809 (((v) << 29) & BM_PXP_HIST4_PARAM_RSVD3)
810 #define BP_PXP_HIST4_PARAM_VALUE3 24
811 #define BM_PXP_HIST4_PARAM_VALUE3 0x1F000000
812 #define BF_PXP_HIST4_PARAM_VALUE3(v) \
813 (((v) << 24) & BM_PXP_HIST4_PARAM_VALUE3)
814 #define BP_PXP_HIST4_PARAM_RSVD2 21
815 #define BM_PXP_HIST4_PARAM_RSVD2 0x00E00000
816 #define BF_PXP_HIST4_PARAM_RSVD2(v) \
817 (((v) << 21) & BM_PXP_HIST4_PARAM_RSVD2)
818 #define BP_PXP_HIST4_PARAM_VALUE2 16
819 #define BM_PXP_HIST4_PARAM_VALUE2 0x001F0000
820 #define BF_PXP_HIST4_PARAM_VALUE2(v) \
821 (((v) << 16) & BM_PXP_HIST4_PARAM_VALUE2)
822 #define BP_PXP_HIST4_PARAM_RSVD1 13
823 #define BM_PXP_HIST4_PARAM_RSVD1 0x0000E000
824 #define BF_PXP_HIST4_PARAM_RSVD1(v) \
825 (((v) << 13) & BM_PXP_HIST4_PARAM_RSVD1)
826 #define BP_PXP_HIST4_PARAM_VALUE1 8
827 #define BM_PXP_HIST4_PARAM_VALUE1 0x00001F00
828 #define BF_PXP_HIST4_PARAM_VALUE1(v) \
829 (((v) << 8) & BM_PXP_HIST4_PARAM_VALUE1)
830 #define BP_PXP_HIST4_PARAM_RSVD0 5
831 #define BM_PXP_HIST4_PARAM_RSVD0 0x000000E0
832 #define BF_PXP_HIST4_PARAM_RSVD0(v) \
833 (((v) << 5) & BM_PXP_HIST4_PARAM_RSVD0)
834 #define BP_PXP_HIST4_PARAM_VALUE0 0
835 #define BM_PXP_HIST4_PARAM_VALUE0 0x0000001F
836 #define BF_PXP_HIST4_PARAM_VALUE0(v) \
837 (((v) << 0) & BM_PXP_HIST4_PARAM_VALUE0)
839 #define HW_PXP_HIST8_PARAM0 (0x000002c0)
841 #define BP_PXP_HIST8_PARAM0_RSVD3 29
842 #define BM_PXP_HIST8_PARAM0_RSVD3 0xE0000000
843 #define BF_PXP_HIST8_PARAM0_RSVD3(v) \
844 (((v) << 29) & BM_PXP_HIST8_PARAM0_RSVD3)
845 #define BP_PXP_HIST8_PARAM0_VALUE3 24
846 #define BM_PXP_HIST8_PARAM0_VALUE3 0x1F000000
847 #define BF_PXP_HIST8_PARAM0_VALUE3(v) \
848 (((v) << 24) & BM_PXP_HIST8_PARAM0_VALUE3)
849 #define BP_PXP_HIST8_PARAM0_RSVD2 21
850 #define BM_PXP_HIST8_PARAM0_RSVD2 0x00E00000
851 #define BF_PXP_HIST8_PARAM0_RSVD2(v) \
852 (((v) << 21) & BM_PXP_HIST8_PARAM0_RSVD2)
853 #define BP_PXP_HIST8_PARAM0_VALUE2 16
854 #define BM_PXP_HIST8_PARAM0_VALUE2 0x001F0000
855 #define BF_PXP_HIST8_PARAM0_VALUE2(v) \
856 (((v) << 16) & BM_PXP_HIST8_PARAM0_VALUE2)
857 #define BP_PXP_HIST8_PARAM0_RSVD1 13
858 #define BM_PXP_HIST8_PARAM0_RSVD1 0x0000E000
859 #define BF_PXP_HIST8_PARAM0_RSVD1(v) \
860 (((v) << 13) & BM_PXP_HIST8_PARAM0_RSVD1)
861 #define BP_PXP_HIST8_PARAM0_VALUE1 8
862 #define BM_PXP_HIST8_PARAM0_VALUE1 0x00001F00
863 #define BF_PXP_HIST8_PARAM0_VALUE1(v) \
864 (((v) << 8) & BM_PXP_HIST8_PARAM0_VALUE1)
865 #define BP_PXP_HIST8_PARAM0_RSVD0 5
866 #define BM_PXP_HIST8_PARAM0_RSVD0 0x000000E0
867 #define BF_PXP_HIST8_PARAM0_RSVD0(v) \
868 (((v) << 5) & BM_PXP_HIST8_PARAM0_RSVD0)
869 #define BP_PXP_HIST8_PARAM0_VALUE0 0
870 #define BM_PXP_HIST8_PARAM0_VALUE0 0x0000001F
871 #define BF_PXP_HIST8_PARAM0_VALUE0(v) \
872 (((v) << 0) & BM_PXP_HIST8_PARAM0_VALUE0)
874 #define HW_PXP_HIST8_PARAM1 (0x000002d0)
876 #define BP_PXP_HIST8_PARAM1_RSVD7 29
877 #define BM_PXP_HIST8_PARAM1_RSVD7 0xE0000000
878 #define BF_PXP_HIST8_PARAM1_RSVD7(v) \
879 (((v) << 29) & BM_PXP_HIST8_PARAM1_RSVD7)
880 #define BP_PXP_HIST8_PARAM1_VALUE7 24
881 #define BM_PXP_HIST8_PARAM1_VALUE7 0x1F000000
882 #define BF_PXP_HIST8_PARAM1_VALUE7(v) \
883 (((v) << 24) & BM_PXP_HIST8_PARAM1_VALUE7)
884 #define BP_PXP_HIST8_PARAM1_RSVD6 21
885 #define BM_PXP_HIST8_PARAM1_RSVD6 0x00E00000
886 #define BF_PXP_HIST8_PARAM1_RSVD6(v) \
887 (((v) << 21) & BM_PXP_HIST8_PARAM1_RSVD6)
888 #define BP_PXP_HIST8_PARAM1_VALUE6 16
889 #define BM_PXP_HIST8_PARAM1_VALUE6 0x001F0000
890 #define BF_PXP_HIST8_PARAM1_VALUE6(v) \
891 (((v) << 16) & BM_PXP_HIST8_PARAM1_VALUE6)
892 #define BP_PXP_HIST8_PARAM1_RSVD5 13
893 #define BM_PXP_HIST8_PARAM1_RSVD5 0x0000E000
894 #define BF_PXP_HIST8_PARAM1_RSVD5(v) \
895 (((v) << 13) & BM_PXP_HIST8_PARAM1_RSVD5)
896 #define BP_PXP_HIST8_PARAM1_VALUE5 8
897 #define BM_PXP_HIST8_PARAM1_VALUE5 0x00001F00
898 #define BF_PXP_HIST8_PARAM1_VALUE5(v) \
899 (((v) << 8) & BM_PXP_HIST8_PARAM1_VALUE5)
900 #define BP_PXP_HIST8_PARAM1_RSVD4 5
901 #define BM_PXP_HIST8_PARAM1_RSVD4 0x000000E0
902 #define BF_PXP_HIST8_PARAM1_RSVD4(v) \
903 (((v) << 5) & BM_PXP_HIST8_PARAM1_RSVD4)
904 #define BP_PXP_HIST8_PARAM1_VALUE4 0
905 #define BM_PXP_HIST8_PARAM1_VALUE4 0x0000001F
906 #define BF_PXP_HIST8_PARAM1_VALUE4(v) \
907 (((v) << 0) & BM_PXP_HIST8_PARAM1_VALUE4)
909 #define HW_PXP_HIST16_PARAM0 (0x000002e0)
911 #define BP_PXP_HIST16_PARAM0_RSVD3 29
912 #define BM_PXP_HIST16_PARAM0_RSVD3 0xE0000000
913 #define BF_PXP_HIST16_PARAM0_RSVD3(v) \
914 (((v) << 29) & BM_PXP_HIST16_PARAM0_RSVD3)
915 #define BP_PXP_HIST16_PARAM0_VALUE3 24
916 #define BM_PXP_HIST16_PARAM0_VALUE3 0x1F000000
917 #define BF_PXP_HIST16_PARAM0_VALUE3(v) \
918 (((v) << 24) & BM_PXP_HIST16_PARAM0_VALUE3)
919 #define BP_PXP_HIST16_PARAM0_RSVD2 21
920 #define BM_PXP_HIST16_PARAM0_RSVD2 0x00E00000
921 #define BF_PXP_HIST16_PARAM0_RSVD2(v) \
922 (((v) << 21) & BM_PXP_HIST16_PARAM0_RSVD2)
923 #define BP_PXP_HIST16_PARAM0_VALUE2 16
924 #define BM_PXP_HIST16_PARAM0_VALUE2 0x001F0000
925 #define BF_PXP_HIST16_PARAM0_VALUE2(v) \
926 (((v) << 16) & BM_PXP_HIST16_PARAM0_VALUE2)
927 #define BP_PXP_HIST16_PARAM0_RSVD1 13
928 #define BM_PXP_HIST16_PARAM0_RSVD1 0x0000E000
929 #define BF_PXP_HIST16_PARAM0_RSVD1(v) \
930 (((v) << 13) & BM_PXP_HIST16_PARAM0_RSVD1)
931 #define BP_PXP_HIST16_PARAM0_VALUE1 8
932 #define BM_PXP_HIST16_PARAM0_VALUE1 0x00001F00
933 #define BF_PXP_HIST16_PARAM0_VALUE1(v) \
934 (((v) << 8) & BM_PXP_HIST16_PARAM0_VALUE1)
935 #define BP_PXP_HIST16_PARAM0_RSVD0 5
936 #define BM_PXP_HIST16_PARAM0_RSVD0 0x000000E0
937 #define BF_PXP_HIST16_PARAM0_RSVD0(v) \
938 (((v) << 5) & BM_PXP_HIST16_PARAM0_RSVD0)
939 #define BP_PXP_HIST16_PARAM0_VALUE0 0
940 #define BM_PXP_HIST16_PARAM0_VALUE0 0x0000001F
941 #define BF_PXP_HIST16_PARAM0_VALUE0(v) \
942 (((v) << 0) & BM_PXP_HIST16_PARAM0_VALUE0)
944 #define HW_PXP_HIST16_PARAM1 (0x000002f0)
946 #define BP_PXP_HIST16_PARAM1_RSVD7 29
947 #define BM_PXP_HIST16_PARAM1_RSVD7 0xE0000000
948 #define BF_PXP_HIST16_PARAM1_RSVD7(v) \
949 (((v) << 29) & BM_PXP_HIST16_PARAM1_RSVD7)
950 #define BP_PXP_HIST16_PARAM1_VALUE7 24
951 #define BM_PXP_HIST16_PARAM1_VALUE7 0x1F000000
952 #define BF_PXP_HIST16_PARAM1_VALUE7(v) \
953 (((v) << 24) & BM_PXP_HIST16_PARAM1_VALUE7)
954 #define BP_PXP_HIST16_PARAM1_RSVD6 21
955 #define BM_PXP_HIST16_PARAM1_RSVD6 0x00E00000
956 #define BF_PXP_HIST16_PARAM1_RSVD6(v) \
957 (((v) << 21) & BM_PXP_HIST16_PARAM1_RSVD6)
958 #define BP_PXP_HIST16_PARAM1_VALUE6 16
959 #define BM_PXP_HIST16_PARAM1_VALUE6 0x001F0000
960 #define BF_PXP_HIST16_PARAM1_VALUE6(v) \
961 (((v) << 16) & BM_PXP_HIST16_PARAM1_VALUE6)
962 #define BP_PXP_HIST16_PARAM1_RSVD5 13
963 #define BM_PXP_HIST16_PARAM1_RSVD5 0x0000E000
964 #define BF_PXP_HIST16_PARAM1_RSVD5(v) \
965 (((v) << 13) & BM_PXP_HIST16_PARAM1_RSVD5)
966 #define BP_PXP_HIST16_PARAM1_VALUE5 8
967 #define BM_PXP_HIST16_PARAM1_VALUE5 0x00001F00
968 #define BF_PXP_HIST16_PARAM1_VALUE5(v) \
969 (((v) << 8) & BM_PXP_HIST16_PARAM1_VALUE5)
970 #define BP_PXP_HIST16_PARAM1_RSVD4 5
971 #define BM_PXP_HIST16_PARAM1_RSVD4 0x000000E0
972 #define BF_PXP_HIST16_PARAM1_RSVD4(v) \
973 (((v) << 5) & BM_PXP_HIST16_PARAM1_RSVD4)
974 #define BP_PXP_HIST16_PARAM1_VALUE4 0
975 #define BM_PXP_HIST16_PARAM1_VALUE4 0x0000001F
976 #define BF_PXP_HIST16_PARAM1_VALUE4(v) \
977 (((v) << 0) & BM_PXP_HIST16_PARAM1_VALUE4)
979 #define HW_PXP_HIST16_PARAM2 (0x00000300)
981 #define BP_PXP_HIST16_PARAM2_RSVD11 29
982 #define BM_PXP_HIST16_PARAM2_RSVD11 0xE0000000
983 #define BF_PXP_HIST16_PARAM2_RSVD11(v) \
984 (((v) << 29) & BM_PXP_HIST16_PARAM2_RSVD11)
985 #define BP_PXP_HIST16_PARAM2_VALUE11 24
986 #define BM_PXP_HIST16_PARAM2_VALUE11 0x1F000000
987 #define BF_PXP_HIST16_PARAM2_VALUE11(v) \
988 (((v) << 24) & BM_PXP_HIST16_PARAM2_VALUE11)
989 #define BP_PXP_HIST16_PARAM2_RSVD10 21
990 #define BM_PXP_HIST16_PARAM2_RSVD10 0x00E00000
991 #define BF_PXP_HIST16_PARAM2_RSVD10(v) \
992 (((v) << 21) & BM_PXP_HIST16_PARAM2_RSVD10)
993 #define BP_PXP_HIST16_PARAM2_VALUE10 16
994 #define BM_PXP_HIST16_PARAM2_VALUE10 0x001F0000
995 #define BF_PXP_HIST16_PARAM2_VALUE10(v) \
996 (((v) << 16) & BM_PXP_HIST16_PARAM2_VALUE10)
997 #define BP_PXP_HIST16_PARAM2_RSVD9 13
998 #define BM_PXP_HIST16_PARAM2_RSVD9 0x0000E000
999 #define BF_PXP_HIST16_PARAM2_RSVD9(v) \
1000 (((v) << 13) & BM_PXP_HIST16_PARAM2_RSVD9)
1001 #define BP_PXP_HIST16_PARAM2_VALUE9 8
1002 #define BM_PXP_HIST16_PARAM2_VALUE9 0x00001F00
1003 #define BF_PXP_HIST16_PARAM2_VALUE9(v) \
1004 (((v) << 8) & BM_PXP_HIST16_PARAM2_VALUE9)
1005 #define BP_PXP_HIST16_PARAM2_RSVD8 5
1006 #define BM_PXP_HIST16_PARAM2_RSVD8 0x000000E0
1007 #define BF_PXP_HIST16_PARAM2_RSVD8(v) \
1008 (((v) << 5) & BM_PXP_HIST16_PARAM2_RSVD8)
1009 #define BP_PXP_HIST16_PARAM2_VALUE8 0
1010 #define BM_PXP_HIST16_PARAM2_VALUE8 0x0000001F
1011 #define BF_PXP_HIST16_PARAM2_VALUE8(v) \
1012 (((v) << 0) & BM_PXP_HIST16_PARAM2_VALUE8)
1014 #define HW_PXP_HIST16_PARAM3 (0x00000310)
1016 #define BP_PXP_HIST16_PARAM3_RSVD15 29
1017 #define BM_PXP_HIST16_PARAM3_RSVD15 0xE0000000
1018 #define BF_PXP_HIST16_PARAM3_RSVD15(v) \
1019 (((v) << 29) & BM_PXP_HIST16_PARAM3_RSVD15)
1020 #define BP_PXP_HIST16_PARAM3_VALUE15 24
1021 #define BM_PXP_HIST16_PARAM3_VALUE15 0x1F000000
1022 #define BF_PXP_HIST16_PARAM3_VALUE15(v) \
1023 (((v) << 24) & BM_PXP_HIST16_PARAM3_VALUE15)
1024 #define BP_PXP_HIST16_PARAM3_RSVD14 21
1025 #define BM_PXP_HIST16_PARAM3_RSVD14 0x00E00000
1026 #define BF_PXP_HIST16_PARAM3_RSVD14(v) \
1027 (((v) << 21) & BM_PXP_HIST16_PARAM3_RSVD14)
1028 #define BP_PXP_HIST16_PARAM3_VALUE14 16
1029 #define BM_PXP_HIST16_PARAM3_VALUE14 0x001F0000
1030 #define BF_PXP_HIST16_PARAM3_VALUE14(v) \
1031 (((v) << 16) & BM_PXP_HIST16_PARAM3_VALUE14)
1032 #define BP_PXP_HIST16_PARAM3_RSVD13 13
1033 #define BM_PXP_HIST16_PARAM3_RSVD13 0x0000E000
1034 #define BF_PXP_HIST16_PARAM3_RSVD13(v) \
1035 (((v) << 13) & BM_PXP_HIST16_PARAM3_RSVD13)
1036 #define BP_PXP_HIST16_PARAM3_VALUE13 8
1037 #define BM_PXP_HIST16_PARAM3_VALUE13 0x00001F00
1038 #define BF_PXP_HIST16_PARAM3_VALUE13(v) \
1039 (((v) << 8) & BM_PXP_HIST16_PARAM3_VALUE13)
1040 #define BP_PXP_HIST16_PARAM3_RSVD12 5
1041 #define BM_PXP_HIST16_PARAM3_RSVD12 0x000000E0
1042 #define BF_PXP_HIST16_PARAM3_RSVD12(v) \
1043 (((v) << 5) & BM_PXP_HIST16_PARAM3_RSVD12)
1044 #define BP_PXP_HIST16_PARAM3_VALUE12 0
1045 #define BM_PXP_HIST16_PARAM3_VALUE12 0x0000001F
1046 #define BF_PXP_HIST16_PARAM3_VALUE12(v) \
1047 (((v) << 0) & BM_PXP_HIST16_PARAM3_VALUE12)
1049 #define HW_PXP_POWER (0x00000320)
1051 #define BP_PXP_POWER_CTRL 12
1052 #define BM_PXP_POWER_CTRL 0xFFFFF000
1053 #define BF_PXP_POWER_CTRL(v) \
1054 (((v) << 12) & BM_PXP_POWER_CTRL)
1055 #define BP_PXP_POWER_ROT_MEM_LP_STATE 9
1056 #define BM_PXP_POWER_ROT_MEM_LP_STATE 0x00000E00
1057 #define BF_PXP_POWER_ROT_MEM_LP_STATE(v) \
1058 (((v) << 9) & BM_PXP_POWER_ROT_MEM_LP_STATE)
1059 #define BV_PXP_POWER_ROT_MEM_LP_STATE__NONE 0x0
1060 #define BV_PXP_POWER_ROT_MEM_LP_STATE__LS 0x1
1061 #define BV_PXP_POWER_ROT_MEM_LP_STATE__DS 0x2
1062 #define BV_PXP_POWER_ROT_MEM_LP_STATE__SD 0x4
1063 #define BP_PXP_POWER_LUT_LP_STATE_WAY1_BANKN 6
1064 #define BM_PXP_POWER_LUT_LP_STATE_WAY1_BANKN 0x000001C0
1065 #define BF_PXP_POWER_LUT_LP_STATE_WAY1_BANKN(v) \
1066 (((v) << 6) & BM_PXP_POWER_LUT_LP_STATE_WAY1_BANKN)
1067 #define BV_PXP_POWER_LUT_LP_STATE_WAY1_BANKN__NONE 0x0
1068 #define BV_PXP_POWER_LUT_LP_STATE_WAY1_BANKN__LS 0x1
1069 #define BV_PXP_POWER_LUT_LP_STATE_WAY1_BANKN__DS 0x2
1070 #define BV_PXP_POWER_LUT_LP_STATE_WAY1_BANKN__SD 0x4
1071 #define BP_PXP_POWER_LUT_LP_STATE_WAY0_BANKN 3
1072 #define BM_PXP_POWER_LUT_LP_STATE_WAY0_BANKN 0x00000038
1073 #define BF_PXP_POWER_LUT_LP_STATE_WAY0_BANKN(v) \
1074 (((v) << 3) & BM_PXP_POWER_LUT_LP_STATE_WAY0_BANKN)
1075 #define BV_PXP_POWER_LUT_LP_STATE_WAY0_BANKN__NONE 0x0
1076 #define BV_PXP_POWER_LUT_LP_STATE_WAY0_BANKN__LS 0x1
1077 #define BV_PXP_POWER_LUT_LP_STATE_WAY0_BANKN__DS 0x2
1078 #define BV_PXP_POWER_LUT_LP_STATE_WAY0_BANKN__SD 0x4
1079 #define BP_PXP_POWER_LUT_LP_STATE_WAY0_BANK0 0
1080 #define BM_PXP_POWER_LUT_LP_STATE_WAY0_BANK0 0x00000007
1081 #define BF_PXP_POWER_LUT_LP_STATE_WAY0_BANK0(v) \
1082 (((v) << 0) & BM_PXP_POWER_LUT_LP_STATE_WAY0_BANK0)
1083 #define BV_PXP_POWER_LUT_LP_STATE_WAY0_BANK0__NONE 0x0
1084 #define BV_PXP_POWER_LUT_LP_STATE_WAY0_BANK0__LS 0x1
1085 #define BV_PXP_POWER_LUT_LP_STATE_WAY0_BANK0__DS 0x2
1086 #define BV_PXP_POWER_LUT_LP_STATE_WAY0_BANK0__SD 0x4
1088 #define HW_PXP_NEXT (0x00000400)
1090 #define BP_PXP_NEXT_POINTER 2
1091 #define BM_PXP_NEXT_POINTER 0xFFFFFFFC
1092 #define BF_PXP_NEXT_POINTER(v) \
1093 (((v) << 2) & BM_PXP_NEXT_POINTER)
1094 #define BM_PXP_NEXT_RSVD 0x00000002
1095 #define BM_PXP_NEXT_ENABLED 0x00000001
1097 #define HW_PXP_DEBUGCTRL (0x00000410)
1099 #define BP_PXP_DEBUGCTRL_RSVD 12
1100 #define BM_PXP_DEBUGCTRL_RSVD 0xFFFFF000
1101 #define BF_PXP_DEBUGCTRL_RSVD(v) \
1102 (((v) << 12) & BM_PXP_DEBUGCTRL_RSVD)
1103 #define BP_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT 8
1104 #define BM_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT 0x00000F00
1105 #define BF_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT(v) \
1106 (((v) << 8) & BM_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT)
1107 #define BV_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT__NONE 0x0
1108 #define BV_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT__MISS_CNT 0x1
1109 #define BV_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT__HIT_CNT 0x2
1110 #define BV_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT__LAT_CNT 0x4
1111 #define BV_PXP_DEBUGCTRL_LUT_CLR_STAT_CNT__MAX_LAT 0x8
1112 #define BP_PXP_DEBUGCTRL_SELECT 0
1113 #define BM_PXP_DEBUGCTRL_SELECT 0x000000FF
1114 #define BF_PXP_DEBUGCTRL_SELECT(v) \
1115 (((v) << 0) & BM_PXP_DEBUGCTRL_SELECT)
1116 #define BV_PXP_DEBUGCTRL_SELECT__NONE 0x0
1117 #define BV_PXP_DEBUGCTRL_SELECT__CTRL 0x1
1118 #define BV_PXP_DEBUGCTRL_SELECT__PSBUF 0x2
1119 #define BV_PXP_DEBUGCTRL_SELECT__PSBAX 0x3
1120 #define BV_PXP_DEBUGCTRL_SELECT__PSBAY 0x4
1121 #define BV_PXP_DEBUGCTRL_SELECT__ASBUF 0x5
1122 #define BV_PXP_DEBUGCTRL_SELECT__ROTATION 0x6
1123 #define BV_PXP_DEBUGCTRL_SELECT__OUTBUF0 0x7
1124 #define BV_PXP_DEBUGCTRL_SELECT__OUTBUF1 0x8
1125 #define BV_PXP_DEBUGCTRL_SELECT__OUTBUF2 0x9
1126 #define BV_PXP_DEBUGCTRL_SELECT__LUT_STAT 0x10
1127 #define BV_PXP_DEBUGCTRL_SELECT__LUT_MISS 0x11
1128 #define BV_PXP_DEBUGCTRL_SELECT__LUT_HIT 0x12
1129 #define BV_PXP_DEBUGCTRL_SELECT__LUT_LAT 0x13
1130 #define BV_PXP_DEBUGCTRL_SELECT__LUT_MAX_LAT 0x14
1132 #define HW_PXP_DEBUG (0x00000420)
1134 #define BP_PXP_DEBUG_DATA 0
1135 #define BM_PXP_DEBUG_DATA 0xFFFFFFFF
1136 #define BF_PXP_DEBUG_DATA(v) (v)
1138 #define HW_PXP_VERSION (0x00000430)
1140 #define BP_PXP_VERSION_MAJOR 24
1141 #define BM_PXP_VERSION_MAJOR 0xFF000000
1142 #define BF_PXP_VERSION_MAJOR(v) \
1143 (((v) << 24) & BM_PXP_VERSION_MAJOR)
1144 #define BP_PXP_VERSION_MINOR 16
1145 #define BM_PXP_VERSION_MINOR 0x00FF0000
1146 #define BF_PXP_VERSION_MINOR(v) \
1147 (((v) << 16) & BM_PXP_VERSION_MINOR)
1148 #define BP_PXP_VERSION_STEP 0
1149 #define BM_PXP_VERSION_STEP 0x0000FFFF
1150 #define BF_PXP_VERSION_STEP(v) \
1151 (((v) << 0) & BM_PXP_VERSION_STEP)
1152 #endif /* __ARCH_ARM___PXP_H */