2 * edac_mc kernel module
3 * (C) 2005 Linux Networx (http://lnxi.com)
4 * This file may be distributed under the terms of the
5 * GNU General Public License.
7 * Written by Thayne Harbaugh
8 * Based on work by Dan Hollis <goemon at anime dot net> and others.
9 * http://www.anime.net/~goemon/linux-ecc/
11 * Modified by Dave Peterson and Doug Thompson
15 #include <linux/module.h>
16 #include <linux/proc_fs.h>
17 #include <linux/kernel.h>
18 #include <linux/types.h>
19 #include <linux/smp.h>
20 #include <linux/init.h>
21 #include <linux/sysctl.h>
22 #include <linux/highmem.h>
23 #include <linux/timer.h>
24 #include <linux/slab.h>
25 #include <linux/jiffies.h>
26 #include <linux/spinlock.h>
27 #include <linux/list.h>
28 #include <linux/sysdev.h>
29 #include <linux/ctype.h>
30 #include <linux/kthread.h>
31 #include <asm/uaccess.h>
36 #define EDAC_MC_VERSION "Ver: 2.0.0 " __DATE__
38 /* For now, disable the EDAC sysfs code. The sysfs interface that EDAC
39 * presents to user space needs more thought, and is likely to change
42 #define DISABLE_EDAC_SYSFS
44 #ifdef CONFIG_EDAC_DEBUG
45 /* Values of 0 to 4 will generate output */
46 int edac_debug_level = 1;
47 EXPORT_SYMBOL_GPL(edac_debug_level);
50 /* EDAC Controls, setable by module parameter, and sysfs */
51 static int log_ue = 1;
52 static int log_ce = 1;
53 static int panic_on_ue;
54 static int poll_msec = 1000;
56 static int check_pci_parity = 0; /* default YES check PCI parity */
57 static int panic_on_pci_parity; /* default no panic on PCI Parity */
58 static atomic_t pci_parity_count = ATOMIC_INIT(0);
60 /* lock to memory controller's control array */
61 static DECLARE_MUTEX(mem_ctls_mutex);
62 static struct list_head mc_devices = LIST_HEAD_INIT(mc_devices);
64 static struct task_struct *edac_thread;
66 /* Structure of the whitelist and blacklist arrays */
67 struct edac_pci_device_list {
68 unsigned int vendor; /* Vendor ID */
69 unsigned int device; /* Deviice ID */
72 #define MAX_LISTED_PCI_DEVICES 32
74 /* List of PCI devices (vendor-id:device-id) that should be skipped */
75 static struct edac_pci_device_list pci_blacklist[MAX_LISTED_PCI_DEVICES];
76 static int pci_blacklist_count;
78 /* List of PCI devices (vendor-id:device-id) that should be scanned */
79 static struct edac_pci_device_list pci_whitelist[MAX_LISTED_PCI_DEVICES];
80 static int pci_whitelist_count ;
82 /* START sysfs data and methods */
84 #ifndef DISABLE_EDAC_SYSFS
86 static const char *mem_types[] = {
87 [MEM_EMPTY] = "Empty",
88 [MEM_RESERVED] = "Reserved",
89 [MEM_UNKNOWN] = "Unknown",
93 [MEM_SDR] = "Unbuffered-SDR",
94 [MEM_RDR] = "Registered-SDR",
95 [MEM_DDR] = "Unbuffered-DDR",
96 [MEM_RDDR] = "Registered-DDR",
100 static const char *dev_types[] = {
101 [DEV_UNKNOWN] = "Unknown",
111 static const char *edac_caps[] = {
112 [EDAC_UNKNOWN] = "Unknown",
113 [EDAC_NONE] = "None",
114 [EDAC_RESERVED] = "Reserved",
115 [EDAC_PARITY] = "PARITY",
117 [EDAC_SECDED] = "SECDED",
118 [EDAC_S2ECD2ED] = "S2ECD2ED",
119 [EDAC_S4ECD4ED] = "S4ECD4ED",
120 [EDAC_S8ECD8ED] = "S8ECD8ED",
121 [EDAC_S16ECD16ED] = "S16ECD16ED"
124 /* sysfs object: /sys/devices/system/edac */
125 static struct sysdev_class edac_class = {
126 set_kset_name("edac"),
130 * /sys/devices/system/edac/mc
131 * /sys/devices/system/edac/pci
133 static struct kobject edac_memctrl_kobj;
134 static struct kobject edac_pci_kobj;
136 /* We use these to wait for the reference counts on edac_memctrl_kobj and
137 * edac_pci_kobj to reach 0.
139 static struct completion edac_memctrl_kobj_complete;
140 static struct completion edac_pci_kobj_complete;
143 * /sys/devices/system/edac/mc;
144 * data structures and methods
147 static ssize_t memctrl_string_show(void *ptr, char *buffer)
149 char *value = (char*) ptr;
150 return sprintf(buffer, "%s\n", value);
154 static ssize_t memctrl_int_show(void *ptr, char *buffer)
156 int *value = (int*) ptr;
157 return sprintf(buffer, "%d\n", *value);
160 static ssize_t memctrl_int_store(void *ptr, const char *buffer, size_t count)
162 int *value = (int*) ptr;
164 if (isdigit(*buffer))
165 *value = simple_strtoul(buffer, NULL, 0);
170 struct memctrl_dev_attribute {
171 struct attribute attr;
173 ssize_t (*show)(void *,char *);
174 ssize_t (*store)(void *, const char *, size_t);
177 /* Set of show/store abstract level functions for memory control object */
178 static ssize_t memctrl_dev_show(struct kobject *kobj,
179 struct attribute *attr, char *buffer)
181 struct memctrl_dev_attribute *memctrl_dev;
182 memctrl_dev = (struct memctrl_dev_attribute*)attr;
184 if (memctrl_dev->show)
185 return memctrl_dev->show(memctrl_dev->value, buffer);
190 static ssize_t memctrl_dev_store(struct kobject *kobj, struct attribute *attr,
191 const char *buffer, size_t count)
193 struct memctrl_dev_attribute *memctrl_dev;
194 memctrl_dev = (struct memctrl_dev_attribute*)attr;
196 if (memctrl_dev->store)
197 return memctrl_dev->store(memctrl_dev->value, buffer, count);
202 static struct sysfs_ops memctrlfs_ops = {
203 .show = memctrl_dev_show,
204 .store = memctrl_dev_store
207 #define MEMCTRL_ATTR(_name,_mode,_show,_store) \
208 struct memctrl_dev_attribute attr_##_name = { \
209 .attr = {.name = __stringify(_name), .mode = _mode }, \
215 #define MEMCTRL_STRING_ATTR(_name,_data,_mode,_show,_store) \
216 struct memctrl_dev_attribute attr_##_name = { \
217 .attr = {.name = __stringify(_name), .mode = _mode }, \
223 /* cwrow<id> attribute f*/
225 MEMCTRL_STRING_ATTR(mc_version,EDAC_MC_VERSION,S_IRUGO,memctrl_string_show,NULL);
228 /* csrow<id> control files */
229 MEMCTRL_ATTR(panic_on_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
230 MEMCTRL_ATTR(log_ue,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
231 MEMCTRL_ATTR(log_ce,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
232 MEMCTRL_ATTR(poll_msec,S_IRUGO|S_IWUSR,memctrl_int_show,memctrl_int_store);
234 /* Base Attributes of the memory ECC object */
235 static struct memctrl_dev_attribute *memctrl_attr[] = {
243 /* Main MC kobject release() function */
244 static void edac_memctrl_master_release(struct kobject *kobj)
246 debugf1("%s()\n", __func__);
247 complete(&edac_memctrl_kobj_complete);
250 static struct kobj_type ktype_memctrl = {
251 .release = edac_memctrl_master_release,
252 .sysfs_ops = &memctrlfs_ops,
253 .default_attrs = (struct attribute **) memctrl_attr,
256 #endif /* DISABLE_EDAC_SYSFS */
258 /* Initialize the main sysfs entries for edac:
259 * /sys/devices/system/edac
266 static int edac_sysfs_memctrl_setup(void)
267 #ifdef DISABLE_EDAC_SYSFS
275 debugf1("%s()\n", __func__);
277 /* create the /sys/devices/system/edac directory */
278 err = sysdev_class_register(&edac_class);
281 /* Init the MC's kobject */
282 memset(&edac_memctrl_kobj, 0, sizeof (edac_memctrl_kobj));
283 edac_memctrl_kobj.parent = &edac_class.kset.kobj;
284 edac_memctrl_kobj.ktype = &ktype_memctrl;
286 /* generate sysfs "..../edac/mc" */
287 err = kobject_set_name(&edac_memctrl_kobj,"mc");
290 /* FIXME: maybe new sysdev_create_subdir() */
291 err = kobject_register(&edac_memctrl_kobj);
294 debugf1("Failed to register '.../edac/mc'\n");
296 debugf1("Registered '.../edac/mc' kobject\n");
299 debugf1("%s() error=%d\n", __func__, err);
303 #endif /* DISABLE_EDAC_SYSFS */
307 * the '..../edac/mc' kobject followed by '..../edac' itself
309 static void edac_sysfs_memctrl_teardown(void)
311 #ifndef DISABLE_EDAC_SYSFS
312 debugf0("MC: " __FILE__ ": %s()\n", __func__);
314 /* Unregister the MC's kobject and wait for reference count to reach
317 init_completion(&edac_memctrl_kobj_complete);
318 kobject_unregister(&edac_memctrl_kobj);
319 wait_for_completion(&edac_memctrl_kobj_complete);
321 /* Unregister the 'edac' object */
322 sysdev_class_unregister(&edac_class);
323 #endif /* DISABLE_EDAC_SYSFS */
326 #ifndef DISABLE_EDAC_SYSFS
329 * /sys/devices/system/edac/pci;
330 * data structures and methods
333 struct list_control {
334 struct edac_pci_device_list *list;
339 /* Output the list as: vendor_id:device:id<,vendor_id:device_id> */
340 static ssize_t edac_pci_list_string_show(void *ptr, char *buffer)
342 struct list_control *listctl;
343 struct edac_pci_device_list *list;
349 list = listctl->list;
351 for (i = 0; i < *(listctl->count); i++, list++ ) {
353 len += snprintf(p + len, (PAGE_SIZE-len), ",");
355 len += snprintf(p + len,
358 list->vendor,list->device);
361 len += snprintf(p + len,(PAGE_SIZE-len), "\n");
362 return (ssize_t) len;
367 * Scan string from **s to **e looking for one 'vendor:device' tuple
368 * where each field is a hex value
370 * return 0 if an entry is NOT found
371 * return 1 if an entry is found
372 * fill in *vendor_id and *device_id with values found
374 * In both cases, make sure *s has been moved forward toward *e
376 static int parse_one_device(const char **s,const char **e,
377 unsigned int *vendor_id, unsigned int *device_id)
379 const char *runner, *p;
381 /* if null byte, we are done */
383 (*s)++; /* keep *s moving */
387 /* skip over newlines & whitespace */
388 if ((**s == '\n') || isspace(**s)) {
393 if (!isxdigit(**s)) {
398 /* parse vendor_id */
401 while (runner < *e) {
402 /* scan for vendor:device delimiter */
403 if (*runner == ':') {
404 *vendor_id = simple_strtol((char*) *s, (char**) &p, 16);
412 if (!isxdigit(*runner)) {
417 /* parse device_id */
419 *device_id = simple_strtol((char*)runner, (char**)&p, 16);
427 static ssize_t edac_pci_list_string_store(void *ptr, const char *buffer,
430 struct list_control *listctl;
431 struct edac_pci_device_list *list;
432 unsigned int vendor_id, device_id;
439 list = listctl->list;
440 index = listctl->count;
443 while (*index < MAX_LISTED_PCI_DEVICES) {
444 if (parse_one_device(&s,&e,&vendor_id,&device_id)) {
445 list[ *index ].vendor = vendor_id;
446 list[ *index ].device = device_id;
450 /* check for all data consume */
459 static ssize_t edac_pci_int_show(void *ptr, char *buffer)
462 return sprintf(buffer,"%d\n",*value);
465 static ssize_t edac_pci_int_store(void *ptr, const char *buffer, size_t count)
469 if (isdigit(*buffer))
470 *value = simple_strtoul(buffer,NULL,0);
475 struct edac_pci_dev_attribute {
476 struct attribute attr;
478 ssize_t (*show)(void *,char *);
479 ssize_t (*store)(void *, const char *,size_t);
482 /* Set of show/store abstract level functions for PCI Parity object */
483 static ssize_t edac_pci_dev_show(struct kobject *kobj, struct attribute *attr,
486 struct edac_pci_dev_attribute *edac_pci_dev;
487 edac_pci_dev= (struct edac_pci_dev_attribute*)attr;
489 if (edac_pci_dev->show)
490 return edac_pci_dev->show(edac_pci_dev->value, buffer);
494 static ssize_t edac_pci_dev_store(struct kobject *kobj,
495 struct attribute *attr, const char *buffer, size_t count)
497 struct edac_pci_dev_attribute *edac_pci_dev;
498 edac_pci_dev= (struct edac_pci_dev_attribute*)attr;
500 if (edac_pci_dev->show)
501 return edac_pci_dev->store(edac_pci_dev->value, buffer, count);
505 static struct sysfs_ops edac_pci_sysfs_ops = {
506 .show = edac_pci_dev_show,
507 .store = edac_pci_dev_store
510 #define EDAC_PCI_ATTR(_name,_mode,_show,_store) \
511 struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
512 .attr = {.name = __stringify(_name), .mode = _mode }, \
518 #define EDAC_PCI_STRING_ATTR(_name,_data,_mode,_show,_store) \
519 struct edac_pci_dev_attribute edac_pci_attr_##_name = { \
520 .attr = {.name = __stringify(_name), .mode = _mode }, \
527 static struct list_control pci_whitelist_control = {
528 .list = pci_whitelist,
529 .count = &pci_whitelist_count
532 static struct list_control pci_blacklist_control = {
533 .list = pci_blacklist,
534 .count = &pci_blacklist_count
537 /* whitelist attribute */
538 EDAC_PCI_STRING_ATTR(pci_parity_whitelist,
539 &pci_whitelist_control,
541 edac_pci_list_string_show,
542 edac_pci_list_string_store);
544 EDAC_PCI_STRING_ATTR(pci_parity_blacklist,
545 &pci_blacklist_control,
547 edac_pci_list_string_show,
548 edac_pci_list_string_store);
551 /* PCI Parity control files */
552 EDAC_PCI_ATTR(check_pci_parity, S_IRUGO|S_IWUSR, edac_pci_int_show,
554 EDAC_PCI_ATTR(panic_on_pci_parity, S_IRUGO|S_IWUSR, edac_pci_int_show,
556 EDAC_PCI_ATTR(pci_parity_count, S_IRUGO, edac_pci_int_show, NULL);
558 /* Base Attributes of the memory ECC object */
559 static struct edac_pci_dev_attribute *edac_pci_attr[] = {
560 &edac_pci_attr_check_pci_parity,
561 &edac_pci_attr_panic_on_pci_parity,
562 &edac_pci_attr_pci_parity_count,
566 /* No memory to release */
567 static void edac_pci_release(struct kobject *kobj)
569 debugf1("%s()\n", __func__);
570 complete(&edac_pci_kobj_complete);
573 static struct kobj_type ktype_edac_pci = {
574 .release = edac_pci_release,
575 .sysfs_ops = &edac_pci_sysfs_ops,
576 .default_attrs = (struct attribute **) edac_pci_attr,
579 #endif /* DISABLE_EDAC_SYSFS */
582 * edac_sysfs_pci_setup()
585 static int edac_sysfs_pci_setup(void)
586 #ifdef DISABLE_EDAC_SYSFS
594 debugf1("%s()\n", __func__);
596 memset(&edac_pci_kobj, 0, sizeof(edac_pci_kobj));
597 edac_pci_kobj.parent = &edac_class.kset.kobj;
598 edac_pci_kobj.ktype = &ktype_edac_pci;
599 err = kobject_set_name(&edac_pci_kobj, "pci");
602 /* Instanstiate the csrow object */
603 /* FIXME: maybe new sysdev_create_subdir() */
604 err = kobject_register(&edac_pci_kobj);
607 debugf1("Failed to register '.../edac/pci'\n");
609 debugf1("Registered '.../edac/pci' kobject\n");
614 #endif /* DISABLE_EDAC_SYSFS */
616 static void edac_sysfs_pci_teardown(void)
618 #ifndef DISABLE_EDAC_SYSFS
619 debugf0("%s()\n", __func__);
620 init_completion(&edac_pci_kobj_complete);
621 kobject_unregister(&edac_pci_kobj);
622 wait_for_completion(&edac_pci_kobj_complete);
626 #ifndef DISABLE_EDAC_SYSFS
628 /* EDAC sysfs CSROW data structures and methods */
630 /* Set of more detailed csrow<id> attribute show/store functions */
631 static ssize_t csrow_ch0_dimm_label_show(struct csrow_info *csrow, char *data)
635 if (csrow->nr_channels > 0) {
636 size = snprintf(data, EDAC_MC_LABEL_LEN,"%s\n",
637 csrow->channels[0].label);
643 static ssize_t csrow_ch1_dimm_label_show(struct csrow_info *csrow, char *data)
647 if (csrow->nr_channels > 0) {
648 size = snprintf(data, EDAC_MC_LABEL_LEN, "%s\n",
649 csrow->channels[1].label);
655 static ssize_t csrow_ch0_dimm_label_store(struct csrow_info *csrow,
656 const char *data, size_t size)
658 ssize_t max_size = 0;
660 if (csrow->nr_channels > 0) {
661 max_size = min((ssize_t)size,(ssize_t)EDAC_MC_LABEL_LEN-1);
662 strncpy(csrow->channels[0].label, data, max_size);
663 csrow->channels[0].label[max_size] = '\0';
669 static ssize_t csrow_ch1_dimm_label_store(struct csrow_info *csrow,
670 const char *data, size_t size)
672 ssize_t max_size = 0;
674 if (csrow->nr_channels > 1) {
675 max_size = min((ssize_t)size,(ssize_t)EDAC_MC_LABEL_LEN-1);
676 strncpy(csrow->channels[1].label, data, max_size);
677 csrow->channels[1].label[max_size] = '\0';
683 static ssize_t csrow_ue_count_show(struct csrow_info *csrow, char *data)
685 return sprintf(data,"%u\n", csrow->ue_count);
688 static ssize_t csrow_ce_count_show(struct csrow_info *csrow, char *data)
690 return sprintf(data,"%u\n", csrow->ce_count);
693 static ssize_t csrow_ch0_ce_count_show(struct csrow_info *csrow, char *data)
697 if (csrow->nr_channels > 0) {
698 size = sprintf(data,"%u\n", csrow->channels[0].ce_count);
704 static ssize_t csrow_ch1_ce_count_show(struct csrow_info *csrow, char *data)
708 if (csrow->nr_channels > 1) {
709 size = sprintf(data,"%u\n", csrow->channels[1].ce_count);
715 static ssize_t csrow_size_show(struct csrow_info *csrow, char *data)
717 return sprintf(data,"%u\n", PAGES_TO_MiB(csrow->nr_pages));
720 static ssize_t csrow_mem_type_show(struct csrow_info *csrow, char *data)
722 return sprintf(data,"%s\n", mem_types[csrow->mtype]);
725 static ssize_t csrow_dev_type_show(struct csrow_info *csrow, char *data)
727 return sprintf(data,"%s\n", dev_types[csrow->dtype]);
730 static ssize_t csrow_edac_mode_show(struct csrow_info *csrow, char *data)
732 return sprintf(data,"%s\n", edac_caps[csrow->edac_mode]);
735 struct csrowdev_attribute {
736 struct attribute attr;
737 ssize_t (*show)(struct csrow_info *,char *);
738 ssize_t (*store)(struct csrow_info *, const char *,size_t);
741 #define to_csrow(k) container_of(k, struct csrow_info, kobj)
742 #define to_csrowdev_attr(a) container_of(a, struct csrowdev_attribute, attr)
744 /* Set of show/store higher level functions for csrow objects */
745 static ssize_t csrowdev_show(struct kobject *kobj, struct attribute *attr,
748 struct csrow_info *csrow = to_csrow(kobj);
749 struct csrowdev_attribute *csrowdev_attr = to_csrowdev_attr(attr);
751 if (csrowdev_attr->show)
752 return csrowdev_attr->show(csrow, buffer);
757 static ssize_t csrowdev_store(struct kobject *kobj, struct attribute *attr,
758 const char *buffer, size_t count)
760 struct csrow_info *csrow = to_csrow(kobj);
761 struct csrowdev_attribute * csrowdev_attr = to_csrowdev_attr(attr);
763 if (csrowdev_attr->store)
764 return csrowdev_attr->store(csrow, buffer, count);
769 static struct sysfs_ops csrowfs_ops = {
770 .show = csrowdev_show,
771 .store = csrowdev_store
774 #define CSROWDEV_ATTR(_name,_mode,_show,_store) \
775 struct csrowdev_attribute attr_##_name = { \
776 .attr = {.name = __stringify(_name), .mode = _mode }, \
781 /* cwrow<id>/attribute files */
782 CSROWDEV_ATTR(size_mb,S_IRUGO,csrow_size_show,NULL);
783 CSROWDEV_ATTR(dev_type,S_IRUGO,csrow_dev_type_show,NULL);
784 CSROWDEV_ATTR(mem_type,S_IRUGO,csrow_mem_type_show,NULL);
785 CSROWDEV_ATTR(edac_mode,S_IRUGO,csrow_edac_mode_show,NULL);
786 CSROWDEV_ATTR(ue_count,S_IRUGO,csrow_ue_count_show,NULL);
787 CSROWDEV_ATTR(ce_count,S_IRUGO,csrow_ce_count_show,NULL);
788 CSROWDEV_ATTR(ch0_ce_count,S_IRUGO,csrow_ch0_ce_count_show,NULL);
789 CSROWDEV_ATTR(ch1_ce_count,S_IRUGO,csrow_ch1_ce_count_show,NULL);
791 /* control/attribute files */
792 CSROWDEV_ATTR(ch0_dimm_label,S_IRUGO|S_IWUSR,
793 csrow_ch0_dimm_label_show,
794 csrow_ch0_dimm_label_store);
795 CSROWDEV_ATTR(ch1_dimm_label,S_IRUGO|S_IWUSR,
796 csrow_ch1_dimm_label_show,
797 csrow_ch1_dimm_label_store);
799 /* Attributes of the CSROW<id> object */
800 static struct csrowdev_attribute *csrow_attr[] = {
809 &attr_ch0_dimm_label,
810 &attr_ch1_dimm_label,
814 /* No memory to release */
815 static void edac_csrow_instance_release(struct kobject *kobj)
817 struct csrow_info *cs;
819 debugf1("%s()\n", __func__);
820 cs = container_of(kobj, struct csrow_info, kobj);
821 complete(&cs->kobj_complete);
824 static struct kobj_type ktype_csrow = {
825 .release = edac_csrow_instance_release,
826 .sysfs_ops = &csrowfs_ops,
827 .default_attrs = (struct attribute **) csrow_attr,
830 /* Create a CSROW object under specifed edac_mc_device */
831 static int edac_create_csrow_object(struct kobject *edac_mci_kobj,
832 struct csrow_info *csrow, int index)
836 debugf0("%s()\n", __func__);
837 memset(&csrow->kobj, 0, sizeof(csrow->kobj));
839 /* generate ..../edac/mc/mc<id>/csrow<index> */
841 csrow->kobj.parent = edac_mci_kobj;
842 csrow->kobj.ktype = &ktype_csrow;
844 /* name this instance of csrow<id> */
845 err = kobject_set_name(&csrow->kobj,"csrow%d",index);
848 /* Instanstiate the csrow object */
849 err = kobject_register(&csrow->kobj);
852 debugf0("Failed to register CSROW%d\n",index);
854 debugf0("Registered CSROW%d\n",index);
860 /* sysfs data structures and methods for the MCI kobjects */
862 static ssize_t mci_reset_counters_store(struct mem_ctl_info *mci,
863 const char *data, size_t count)
867 mci->ue_noinfo_count = 0;
868 mci->ce_noinfo_count = 0;
872 for (row = 0; row < mci->nr_csrows; row++) {
873 struct csrow_info *ri = &mci->csrows[row];
878 for (chan = 0; chan < ri->nr_channels; chan++)
879 ri->channels[chan].ce_count = 0;
882 mci->start_time = jiffies;
886 static ssize_t mci_ue_count_show(struct mem_ctl_info *mci, char *data)
888 return sprintf(data,"%d\n", mci->ue_count);
891 static ssize_t mci_ce_count_show(struct mem_ctl_info *mci, char *data)
893 return sprintf(data,"%d\n", mci->ce_count);
896 static ssize_t mci_ce_noinfo_show(struct mem_ctl_info *mci, char *data)
898 return sprintf(data,"%d\n", mci->ce_noinfo_count);
901 static ssize_t mci_ue_noinfo_show(struct mem_ctl_info *mci, char *data)
903 return sprintf(data,"%d\n", mci->ue_noinfo_count);
906 static ssize_t mci_seconds_show(struct mem_ctl_info *mci, char *data)
908 return sprintf(data,"%ld\n", (jiffies - mci->start_time) / HZ);
911 static ssize_t mci_mod_name_show(struct mem_ctl_info *mci, char *data)
913 return sprintf(data,"%s %s\n", mci->mod_name, mci->mod_ver);
916 static ssize_t mci_ctl_name_show(struct mem_ctl_info *mci, char *data)
918 return sprintf(data,"%s\n", mci->ctl_name);
921 static int mci_output_edac_cap(char *buf, unsigned long edac_cap)
926 for (bit_idx = 0; bit_idx < 8 * sizeof(edac_cap); bit_idx++) {
927 if ((edac_cap >> bit_idx) & 0x1)
928 p += sprintf(p, "%s ", edac_caps[bit_idx]);
934 static ssize_t mci_edac_capability_show(struct mem_ctl_info *mci, char *data)
938 p += mci_output_edac_cap(p,mci->edac_ctl_cap);
939 p += sprintf(p, "\n");
943 static ssize_t mci_edac_current_capability_show(struct mem_ctl_info *mci,
948 p += mci_output_edac_cap(p,mci->edac_cap);
949 p += sprintf(p, "\n");
953 static int mci_output_mtype_cap(char *buf, unsigned long mtype_cap)
958 for (bit_idx = 0; bit_idx < 8 * sizeof(mtype_cap); bit_idx++) {
959 if ((mtype_cap >> bit_idx) & 0x1)
960 p += sprintf(p, "%s ", mem_types[bit_idx]);
966 static ssize_t mci_supported_mem_type_show(struct mem_ctl_info *mci,
971 p += mci_output_mtype_cap(p,mci->mtype_cap);
972 p += sprintf(p, "\n");
976 static ssize_t mci_size_mb_show(struct mem_ctl_info *mci, char *data)
978 int total_pages, csrow_idx;
980 for (total_pages = csrow_idx = 0; csrow_idx < mci->nr_csrows;
982 struct csrow_info *csrow = &mci->csrows[csrow_idx];
984 if (!csrow->nr_pages)
987 total_pages += csrow->nr_pages;
990 return sprintf(data,"%u\n", PAGES_TO_MiB(total_pages));
993 struct mcidev_attribute {
994 struct attribute attr;
995 ssize_t (*show)(struct mem_ctl_info *,char *);
996 ssize_t (*store)(struct mem_ctl_info *, const char *,size_t);
999 #define to_mci(k) container_of(k, struct mem_ctl_info, edac_mci_kobj)
1000 #define to_mcidev_attr(a) container_of(a, struct mcidev_attribute, attr)
1002 static ssize_t mcidev_show(struct kobject *kobj, struct attribute *attr,
1005 struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
1006 struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr);
1008 if (mcidev_attr->show)
1009 return mcidev_attr->show(mem_ctl_info, buffer);
1014 static ssize_t mcidev_store(struct kobject *kobj, struct attribute *attr,
1015 const char *buffer, size_t count)
1017 struct mem_ctl_info *mem_ctl_info = to_mci(kobj);
1018 struct mcidev_attribute * mcidev_attr = to_mcidev_attr(attr);
1020 if (mcidev_attr->store)
1021 return mcidev_attr->store(mem_ctl_info, buffer, count);
1026 static struct sysfs_ops mci_ops = {
1027 .show = mcidev_show,
1028 .store = mcidev_store
1031 #define MCIDEV_ATTR(_name,_mode,_show,_store) \
1032 struct mcidev_attribute mci_attr_##_name = { \
1033 .attr = {.name = __stringify(_name), .mode = _mode }, \
1039 MCIDEV_ATTR(reset_counters,S_IWUSR,NULL,mci_reset_counters_store);
1041 /* Attribute files */
1042 MCIDEV_ATTR(mc_name,S_IRUGO,mci_ctl_name_show,NULL);
1043 MCIDEV_ATTR(module_name,S_IRUGO,mci_mod_name_show,NULL);
1044 MCIDEV_ATTR(edac_capability,S_IRUGO,mci_edac_capability_show,NULL);
1045 MCIDEV_ATTR(size_mb,S_IRUGO,mci_size_mb_show,NULL);
1046 MCIDEV_ATTR(seconds_since_reset,S_IRUGO,mci_seconds_show,NULL);
1047 MCIDEV_ATTR(ue_noinfo_count,S_IRUGO,mci_ue_noinfo_show,NULL);
1048 MCIDEV_ATTR(ce_noinfo_count,S_IRUGO,mci_ce_noinfo_show,NULL);
1049 MCIDEV_ATTR(ue_count,S_IRUGO,mci_ue_count_show,NULL);
1050 MCIDEV_ATTR(ce_count,S_IRUGO,mci_ce_count_show,NULL);
1051 MCIDEV_ATTR(edac_current_capability,S_IRUGO,
1052 mci_edac_current_capability_show,NULL);
1053 MCIDEV_ATTR(supported_mem_type,S_IRUGO,
1054 mci_supported_mem_type_show,NULL);
1056 static struct mcidev_attribute *mci_attr[] = {
1057 &mci_attr_reset_counters,
1058 &mci_attr_module_name,
1060 &mci_attr_edac_capability,
1061 &mci_attr_edac_current_capability,
1062 &mci_attr_supported_mem_type,
1064 &mci_attr_seconds_since_reset,
1065 &mci_attr_ue_noinfo_count,
1066 &mci_attr_ce_noinfo_count,
1073 * Release of a MC controlling instance
1075 static void edac_mci_instance_release(struct kobject *kobj)
1077 struct mem_ctl_info *mci;
1080 debugf0("%s() idx=%d\n", __func__, mci->mc_idx);
1081 complete(&mci->kobj_complete);
1084 static struct kobj_type ktype_mci = {
1085 .release = edac_mci_instance_release,
1086 .sysfs_ops = &mci_ops,
1087 .default_attrs = (struct attribute **) mci_attr,
1090 #endif /* DISABLE_EDAC_SYSFS */
1092 #define EDAC_DEVICE_SYMLINK "device"
1095 * Create a new Memory Controller kobject instance,
1096 * mc<id> under the 'mc' directory
1102 static int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
1103 #ifdef DISABLE_EDAC_SYSFS
1111 struct csrow_info *csrow;
1112 struct kobject *edac_mci_kobj=&mci->edac_mci_kobj;
1114 debugf0("%s() idx=%d\n", __func__, mci->mc_idx);
1115 memset(edac_mci_kobj, 0, sizeof(*edac_mci_kobj));
1117 /* set the name of the mc<id> object */
1118 err = kobject_set_name(edac_mci_kobj,"mc%d",mci->mc_idx);
1123 /* link to our parent the '..../edac/mc' object */
1124 edac_mci_kobj->parent = &edac_memctrl_kobj;
1125 edac_mci_kobj->ktype = &ktype_mci;
1127 /* register the mc<id> kobject */
1128 err = kobject_register(edac_mci_kobj);
1133 /* create a symlink for the device */
1134 err = sysfs_create_link(edac_mci_kobj, &mci->pdev->dev.kobj,
1135 EDAC_DEVICE_SYMLINK);
1140 /* Make directories for each CSROW object
1141 * under the mc<id> kobject
1143 for (i = 0; i < mci->nr_csrows; i++) {
1144 csrow = &mci->csrows[i];
1146 /* Only expose populated CSROWs */
1147 if (csrow->nr_pages > 0) {
1148 err = edac_create_csrow_object(edac_mci_kobj,csrow,i);
1157 /* CSROW error: backout what has already been registered, */
1159 for ( i--; i >= 0; i--) {
1160 if (csrow->nr_pages > 0) {
1161 init_completion(&csrow->kobj_complete);
1162 kobject_unregister(&mci->csrows[i].kobj);
1163 wait_for_completion(&csrow->kobj_complete);
1168 init_completion(&mci->kobj_complete);
1169 kobject_unregister(edac_mci_kobj);
1170 wait_for_completion(&mci->kobj_complete);
1173 #endif /* DISABLE_EDAC_SYSFS */
1176 * remove a Memory Controller instance
1178 static void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
1180 #ifndef DISABLE_EDAC_SYSFS
1183 debugf0("%s()\n", __func__);
1185 /* remove all csrow kobjects */
1186 for (i = 0; i < mci->nr_csrows; i++) {
1187 if (mci->csrows[i].nr_pages > 0) {
1188 init_completion(&mci->csrows[i].kobj_complete);
1189 kobject_unregister(&mci->csrows[i].kobj);
1190 wait_for_completion(&mci->csrows[i].kobj_complete);
1194 sysfs_remove_link(&mci->edac_mci_kobj, EDAC_DEVICE_SYMLINK);
1195 init_completion(&mci->kobj_complete);
1196 kobject_unregister(&mci->edac_mci_kobj);
1197 wait_for_completion(&mci->kobj_complete);
1198 #endif /* DISABLE_EDAC_SYSFS */
1201 /* END OF sysfs data and methods */
1203 #ifdef CONFIG_EDAC_DEBUG
1205 void edac_mc_dump_channel(struct channel_info *chan)
1207 debugf4("\tchannel = %p\n", chan);
1208 debugf4("\tchannel->chan_idx = %d\n", chan->chan_idx);
1209 debugf4("\tchannel->ce_count = %d\n", chan->ce_count);
1210 debugf4("\tchannel->label = '%s'\n", chan->label);
1211 debugf4("\tchannel->csrow = %p\n\n", chan->csrow);
1213 EXPORT_SYMBOL_GPL(edac_mc_dump_channel);
1215 void edac_mc_dump_csrow(struct csrow_info *csrow)
1217 debugf4("\tcsrow = %p\n", csrow);
1218 debugf4("\tcsrow->csrow_idx = %d\n", csrow->csrow_idx);
1219 debugf4("\tcsrow->first_page = 0x%lx\n",
1221 debugf4("\tcsrow->last_page = 0x%lx\n", csrow->last_page);
1222 debugf4("\tcsrow->page_mask = 0x%lx\n", csrow->page_mask);
1223 debugf4("\tcsrow->nr_pages = 0x%x\n", csrow->nr_pages);
1224 debugf4("\tcsrow->nr_channels = %d\n",
1225 csrow->nr_channels);
1226 debugf4("\tcsrow->channels = %p\n", csrow->channels);
1227 debugf4("\tcsrow->mci = %p\n\n", csrow->mci);
1229 EXPORT_SYMBOL_GPL(edac_mc_dump_csrow);
1231 void edac_mc_dump_mci(struct mem_ctl_info *mci)
1233 debugf3("\tmci = %p\n", mci);
1234 debugf3("\tmci->mtype_cap = %lx\n", mci->mtype_cap);
1235 debugf3("\tmci->edac_ctl_cap = %lx\n", mci->edac_ctl_cap);
1236 debugf3("\tmci->edac_cap = %lx\n", mci->edac_cap);
1237 debugf4("\tmci->edac_check = %p\n", mci->edac_check);
1238 debugf3("\tmci->nr_csrows = %d, csrows = %p\n",
1239 mci->nr_csrows, mci->csrows);
1240 debugf3("\tpdev = %p\n", mci->pdev);
1241 debugf3("\tmod_name:ctl_name = %s:%s\n",
1242 mci->mod_name, mci->ctl_name);
1243 debugf3("\tpvt_info = %p\n\n", mci->pvt_info);
1245 EXPORT_SYMBOL_GPL(edac_mc_dump_mci);
1247 #endif /* CONFIG_EDAC_DEBUG */
1249 /* 'ptr' points to a possibly unaligned item X such that sizeof(X) is 'size'.
1250 * Adjust 'ptr' so that its alignment is at least as stringent as what the
1251 * compiler would provide for X and return the aligned result.
1253 * If 'size' is a constant, the compiler will optimize this whole function
1254 * down to either a no-op or the addition of a constant to the value of 'ptr'.
1256 static inline char * align_ptr(void *ptr, unsigned size)
1260 /* Here we assume that the alignment of a "long long" is the most
1261 * stringent alignment that the compiler will ever provide by default.
1262 * As far as I know, this is a reasonable assumption.
1264 if (size > sizeof(long))
1265 align = sizeof(long long);
1266 else if (size > sizeof(int))
1267 align = sizeof(long);
1268 else if (size > sizeof(short))
1269 align = sizeof(int);
1270 else if (size > sizeof(char))
1271 align = sizeof(short);
1273 return (char *) ptr;
1278 return (char *) ptr;
1280 return (char *) (((unsigned long) ptr) + align - r);
1284 * edac_mc_alloc: Allocate a struct mem_ctl_info structure
1285 * @size_pvt: size of private storage needed
1286 * @nr_csrows: Number of CWROWS needed for this MC
1287 * @nr_chans: Number of channels for the MC
1289 * Everything is kmalloc'ed as one big chunk - more efficient.
1290 * Only can be used if all structures have the same lifetime - otherwise
1291 * you have to allocate and initialize your own structures.
1293 * Use edac_mc_free() to free mc structures allocated by this function.
1296 * NULL allocation failed
1297 * struct mem_ctl_info pointer
1299 struct mem_ctl_info *edac_mc_alloc(unsigned sz_pvt, unsigned nr_csrows,
1302 struct mem_ctl_info *mci;
1303 struct csrow_info *csi, *csrow;
1304 struct channel_info *chi, *chp, *chan;
1309 /* Figure out the offsets of the various items from the start of an mc
1310 * structure. We want the alignment of each item to be at least as
1311 * stringent as what the compiler would provide if we could simply
1312 * hardcode everything into a single struct.
1314 mci = (struct mem_ctl_info *) 0;
1315 csi = (struct csrow_info *)align_ptr(&mci[1], sizeof(*csi));
1316 chi = (struct channel_info *)
1317 align_ptr(&csi[nr_csrows], sizeof(*chi));
1318 pvt = align_ptr(&chi[nr_chans * nr_csrows], sz_pvt);
1319 size = ((unsigned long) pvt) + sz_pvt;
1321 if ((mci = kmalloc(size, GFP_KERNEL)) == NULL)
1324 /* Adjust pointers so they point within the memory we just allocated
1325 * rather than an imaginary chunk of memory located at address 0.
1327 csi = (struct csrow_info *) (((char *) mci) + ((unsigned long) csi));
1328 chi = (struct channel_info *) (((char *) mci) + ((unsigned long) chi));
1329 pvt = sz_pvt ? (((char *) mci) + ((unsigned long) pvt)) : NULL;
1331 memset(mci, 0, size); /* clear all fields */
1333 mci->pvt_info = pvt;
1334 mci->nr_csrows = nr_csrows;
1336 for (row = 0; row < nr_csrows; row++) {
1338 csrow->csrow_idx = row;
1340 csrow->nr_channels = nr_chans;
1341 chp = &chi[row * nr_chans];
1342 csrow->channels = chp;
1344 for (chn = 0; chn < nr_chans; chn++) {
1346 chan->chan_idx = chn;
1347 chan->csrow = csrow;
1353 EXPORT_SYMBOL_GPL(edac_mc_alloc);
1356 * edac_mc_free: Free a previously allocated 'mci' structure
1357 * @mci: pointer to a struct mem_ctl_info structure
1359 void edac_mc_free(struct mem_ctl_info *mci)
1363 EXPORT_SYMBOL_GPL(edac_mc_free);
1365 static struct mem_ctl_info *find_mci_by_pdev(struct pci_dev *pdev)
1367 struct mem_ctl_info *mci;
1368 struct list_head *item;
1370 debugf3("%s()\n", __func__);
1372 list_for_each(item, &mc_devices) {
1373 mci = list_entry(item, struct mem_ctl_info, link);
1375 if (mci->pdev == pdev)
1382 static int add_mc_to_global_list(struct mem_ctl_info *mci)
1384 struct list_head *item, *insert_before;
1385 struct mem_ctl_info *p;
1388 if (list_empty(&mc_devices)) {
1390 insert_before = &mc_devices;
1392 if (find_mci_by_pdev(mci->pdev)) {
1393 edac_printk(KERN_WARNING, EDAC_MC,
1394 "%s (%s) %s %s already assigned %d\n",
1395 mci->pdev->dev.bus_id,
1396 pci_name(mci->pdev), mci->mod_name,
1397 mci->ctl_name, mci->mc_idx);
1401 insert_before = NULL;
1404 list_for_each(item, &mc_devices) {
1405 p = list_entry(item, struct mem_ctl_info, link);
1407 if (p->mc_idx != i) {
1408 insert_before = item;
1417 if (insert_before == NULL)
1418 insert_before = &mc_devices;
1421 list_add_tail_rcu(&mci->link, insert_before);
1425 static void complete_mc_list_del(struct rcu_head *head)
1427 struct mem_ctl_info *mci;
1429 mci = container_of(head, struct mem_ctl_info, rcu);
1430 INIT_LIST_HEAD(&mci->link);
1431 complete(&mci->complete);
1434 static void del_mc_from_global_list(struct mem_ctl_info *mci)
1436 list_del_rcu(&mci->link);
1437 init_completion(&mci->complete);
1438 call_rcu(&mci->rcu, complete_mc_list_del);
1439 wait_for_completion(&mci->complete);
1443 * edac_mc_add_mc: Insert the 'mci' structure into the mci global list and
1444 * create sysfs entries associated with mci structure
1445 * @mci: pointer to the mci structure to be added to the list
1452 /* FIXME - should a warning be printed if no error detection? correction? */
1453 int edac_mc_add_mc(struct mem_ctl_info *mci)
1455 debugf0("%s()\n", __func__);
1456 #ifdef CONFIG_EDAC_DEBUG
1457 if (edac_debug_level >= 3)
1458 edac_mc_dump_mci(mci);
1460 if (edac_debug_level >= 4) {
1463 for (i = 0; i < mci->nr_csrows; i++) {
1466 edac_mc_dump_csrow(&mci->csrows[i]);
1467 for (j = 0; j < mci->csrows[i].nr_channels; j++)
1468 edac_mc_dump_channel(
1469 &mci->csrows[i].channels[j]);
1473 down(&mem_ctls_mutex);
1475 if (add_mc_to_global_list(mci))
1478 /* set load time so that error rate can be tracked */
1479 mci->start_time = jiffies;
1481 if (edac_create_sysfs_mci_device(mci)) {
1482 edac_mc_printk(mci, KERN_WARNING,
1483 "failed to create sysfs device\n");
1487 /* Report action taken */
1488 edac_mc_printk(mci, KERN_INFO, "Giving out device to %s %s: PCI %s\n",
1489 mci->mod_name, mci->ctl_name, pci_name(mci->pdev));
1491 up(&mem_ctls_mutex);
1495 del_mc_from_global_list(mci);
1498 up(&mem_ctls_mutex);
1501 EXPORT_SYMBOL_GPL(edac_mc_add_mc);
1504 * edac_mc_del_mc: Remove sysfs entries for specified mci structure and
1505 * remove mci structure from global list
1506 * @pdev: Pointer to 'struct pci_dev' representing mci structure to remove.
1508 * Return pointer to removed mci structure, or NULL if device not found.
1510 struct mem_ctl_info * edac_mc_del_mc(struct pci_dev *pdev)
1512 struct mem_ctl_info *mci;
1514 debugf0("MC: %s()\n", __func__);
1515 down(&mem_ctls_mutex);
1517 if ((mci = find_mci_by_pdev(pdev)) == NULL) {
1518 up(&mem_ctls_mutex);
1522 edac_remove_sysfs_mci_device(mci);
1523 del_mc_from_global_list(mci);
1524 up(&mem_ctls_mutex);
1525 edac_printk(KERN_INFO, EDAC_MC,
1526 "Removed device %d for %s %s: PCI %s\n", mci->mc_idx,
1527 mci->mod_name, mci->ctl_name, pci_name(mci->pdev));
1530 EXPORT_SYMBOL_GPL(edac_mc_del_mc);
1532 void edac_mc_scrub_block(unsigned long page, unsigned long offset, u32 size)
1536 unsigned long flags = 0;
1538 debugf3("%s()\n", __func__);
1540 /* ECC error page was not in our memory. Ignore it. */
1541 if(!pfn_valid(page))
1544 /* Find the actual page structure then map it and fix */
1545 pg = pfn_to_page(page);
1547 if (PageHighMem(pg))
1548 local_irq_save(flags);
1550 virt_addr = kmap_atomic(pg, KM_BOUNCE_READ);
1552 /* Perform architecture specific atomic scrub operation */
1553 atomic_scrub(virt_addr + offset, size);
1555 /* Unmap and complete */
1556 kunmap_atomic(virt_addr, KM_BOUNCE_READ);
1558 if (PageHighMem(pg))
1559 local_irq_restore(flags);
1561 EXPORT_SYMBOL_GPL(edac_mc_scrub_block);
1563 /* FIXME - should return -1 */
1564 int edac_mc_find_csrow_by_page(struct mem_ctl_info *mci, unsigned long page)
1566 struct csrow_info *csrows = mci->csrows;
1569 debugf1("MC%d: %s(): 0x%lx\n", mci->mc_idx, __func__, page);
1572 for (i = 0; i < mci->nr_csrows; i++) {
1573 struct csrow_info *csrow = &csrows[i];
1575 if (csrow->nr_pages == 0)
1578 debugf3("MC%d: %s(): first(0x%lx) page(0x%lx) last(0x%lx) "
1579 "mask(0x%lx)\n", mci->mc_idx, __func__,
1580 csrow->first_page, page, csrow->last_page,
1583 if ((page >= csrow->first_page) &&
1584 (page <= csrow->last_page) &&
1585 ((page & csrow->page_mask) ==
1586 (csrow->first_page & csrow->page_mask))) {
1593 edac_mc_printk(mci, KERN_ERR,
1594 "could not look up page error address %lx\n",
1595 (unsigned long) page);
1599 EXPORT_SYMBOL_GPL(edac_mc_find_csrow_by_page);
1601 /* FIXME - setable log (warning/emerg) levels */
1602 /* FIXME - integrate with evlog: http://evlog.sourceforge.net/ */
1603 void edac_mc_handle_ce(struct mem_ctl_info *mci,
1604 unsigned long page_frame_number, unsigned long offset_in_page,
1605 unsigned long syndrome, int row, int channel, const char *msg)
1607 unsigned long remapped_page;
1609 debugf3("MC%d: %s()\n", mci->mc_idx, __func__);
1611 /* FIXME - maybe make panic on INTERNAL ERROR an option */
1612 if (row >= mci->nr_csrows || row < 0) {
1613 /* something is wrong */
1614 edac_mc_printk(mci, KERN_ERR,
1615 "INTERNAL ERROR: row out of range "
1616 "(%d >= %d)\n", row, mci->nr_csrows);
1617 edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");
1621 if (channel >= mci->csrows[row].nr_channels || channel < 0) {
1622 /* something is wrong */
1623 edac_mc_printk(mci, KERN_ERR,
1624 "INTERNAL ERROR: channel out of range "
1625 "(%d >= %d)\n", channel,
1626 mci->csrows[row].nr_channels);
1627 edac_mc_handle_ce_no_info(mci, "INTERNAL ERROR");
1632 /* FIXME - put in DIMM location */
1633 edac_mc_printk(mci, KERN_WARNING,
1634 "CE page 0x%lx, offset 0x%lx, grain %d, syndrome "
1635 "0x%lx, row %d, channel %d, label \"%s\": %s\n",
1636 page_frame_number, offset_in_page,
1637 mci->csrows[row].grain, syndrome, row, channel,
1638 mci->csrows[row].channels[channel].label, msg);
1641 mci->csrows[row].ce_count++;
1642 mci->csrows[row].channels[channel].ce_count++;
1644 if (mci->scrub_mode & SCRUB_SW_SRC) {
1646 * Some MC's can remap memory so that it is still available
1647 * at a different address when PCI devices map into memory.
1648 * MC's that can't do this lose the memory where PCI devices
1649 * are mapped. This mapping is MC dependant and so we call
1650 * back into the MC driver for it to map the MC page to
1651 * a physical (CPU) page which can then be mapped to a virtual
1652 * page - which can then be scrubbed.
1654 remapped_page = mci->ctl_page_to_phys ?
1655 mci->ctl_page_to_phys(mci, page_frame_number) :
1658 edac_mc_scrub_block(remapped_page, offset_in_page,
1659 mci->csrows[row].grain);
1662 EXPORT_SYMBOL_GPL(edac_mc_handle_ce);
1664 void edac_mc_handle_ce_no_info(struct mem_ctl_info *mci, const char *msg)
1667 edac_mc_printk(mci, KERN_WARNING,
1668 "CE - no information available: %s\n", msg);
1670 mci->ce_noinfo_count++;
1673 EXPORT_SYMBOL_GPL(edac_mc_handle_ce_no_info);
1675 void edac_mc_handle_ue(struct mem_ctl_info *mci,
1676 unsigned long page_frame_number, unsigned long offset_in_page,
1677 int row, const char *msg)
1679 int len = EDAC_MC_LABEL_LEN * 4;
1680 char labels[len + 1];
1685 debugf3("MC%d: %s()\n", mci->mc_idx, __func__);
1687 /* FIXME - maybe make panic on INTERNAL ERROR an option */
1688 if (row >= mci->nr_csrows || row < 0) {
1689 /* something is wrong */
1690 edac_mc_printk(mci, KERN_ERR,
1691 "INTERNAL ERROR: row out of range "
1692 "(%d >= %d)\n", row, mci->nr_csrows);
1693 edac_mc_handle_ue_no_info(mci, "INTERNAL ERROR");
1697 chars = snprintf(pos, len + 1, "%s",
1698 mci->csrows[row].channels[0].label);
1702 for (chan = 1; (chan < mci->csrows[row].nr_channels) && (len > 0);
1704 chars = snprintf(pos, len + 1, ":%s",
1705 mci->csrows[row].channels[chan].label);
1711 edac_mc_printk(mci, KERN_EMERG,
1712 "UE page 0x%lx, offset 0x%lx, grain %d, row %d, "
1713 "labels \"%s\": %s\n", page_frame_number,
1714 offset_in_page, mci->csrows[row].grain, row, labels,
1718 panic("EDAC MC%d: UE page 0x%lx, offset 0x%lx, grain %d, "
1719 "row %d, labels \"%s\": %s\n", mci->mc_idx,
1720 page_frame_number, offset_in_page,
1721 mci->csrows[row].grain, row, labels, msg);
1724 mci->csrows[row].ue_count++;
1726 EXPORT_SYMBOL_GPL(edac_mc_handle_ue);
1728 void edac_mc_handle_ue_no_info(struct mem_ctl_info *mci, const char *msg)
1731 panic("EDAC MC%d: Uncorrected Error", mci->mc_idx);
1734 edac_mc_printk(mci, KERN_WARNING,
1735 "UE - no information available: %s\n", msg);
1736 mci->ue_noinfo_count++;
1739 EXPORT_SYMBOL_GPL(edac_mc_handle_ue_no_info);
1743 static u16 get_pci_parity_status(struct pci_dev *dev, int secondary)
1748 where = secondary ? PCI_SEC_STATUS : PCI_STATUS;
1749 pci_read_config_word(dev, where, &status);
1751 /* If we get back 0xFFFF then we must suspect that the card has been
1752 * pulled but the Linux PCI layer has not yet finished cleaning up.
1753 * We don't want to report on such devices
1756 if (status == 0xFFFF) {
1759 pci_read_config_dword(dev, 0, &sanity);
1761 if (sanity == 0xFFFFFFFF)
1765 status &= PCI_STATUS_DETECTED_PARITY | PCI_STATUS_SIG_SYSTEM_ERROR |
1769 /* reset only the bits we are interested in */
1770 pci_write_config_word(dev, where, status);
1775 typedef void (*pci_parity_check_fn_t) (struct pci_dev *dev);
1777 /* Clear any PCI parity errors logged by this device. */
1778 static void edac_pci_dev_parity_clear(struct pci_dev *dev)
1782 get_pci_parity_status(dev, 0);
1784 /* read the device TYPE, looking for bridges */
1785 pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
1787 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE)
1788 get_pci_parity_status(dev, 1);
1792 * PCI Parity polling
1795 static void edac_pci_dev_parity_test(struct pci_dev *dev)
1800 /* read the STATUS register on this device
1802 status = get_pci_parity_status(dev, 0);
1804 debugf2("PCI STATUS= 0x%04x %s\n", status, dev->dev.bus_id );
1806 /* check the status reg for errors */
1808 if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
1809 edac_printk(KERN_CRIT, EDAC_PCI,
1810 "Signaled System Error on %s\n",
1813 if (status & (PCI_STATUS_PARITY)) {
1814 edac_printk(KERN_CRIT, EDAC_PCI,
1815 "Master Data Parity Error on %s\n",
1818 atomic_inc(&pci_parity_count);
1821 if (status & (PCI_STATUS_DETECTED_PARITY)) {
1822 edac_printk(KERN_CRIT, EDAC_PCI,
1823 "Detected Parity Error on %s\n",
1826 atomic_inc(&pci_parity_count);
1830 /* read the device TYPE, looking for bridges */
1831 pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
1833 debugf2("PCI HEADER TYPE= 0x%02x %s\n", header_type, dev->dev.bus_id );
1835 if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
1836 /* On bridges, need to examine secondary status register */
1837 status = get_pci_parity_status(dev, 1);
1839 debugf2("PCI SEC_STATUS= 0x%04x %s\n",
1840 status, dev->dev.bus_id );
1842 /* check the secondary status reg for errors */
1844 if (status & (PCI_STATUS_SIG_SYSTEM_ERROR))
1845 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
1846 "Signaled System Error on %s\n",
1849 if (status & (PCI_STATUS_PARITY)) {
1850 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
1851 "Master Data Parity Error on "
1852 "%s\n", pci_name(dev));
1854 atomic_inc(&pci_parity_count);
1857 if (status & (PCI_STATUS_DETECTED_PARITY)) {
1858 edac_printk(KERN_CRIT, EDAC_PCI, "Bridge "
1859 "Detected Parity Error on %s\n",
1862 atomic_inc(&pci_parity_count);
1869 * check_dev_on_list: Scan for a PCI device on a white/black list
1870 * @list: an EDAC &edac_pci_device_list white/black list pointer
1871 * @free_index: index of next free entry on the list
1872 * @pci_dev: PCI Device pointer
1874 * see if list contains the device.
1876 * Returns: 0 not found
1879 static int check_dev_on_list(struct edac_pci_device_list *list,
1880 int free_index, struct pci_dev *dev)
1883 int rc = 0; /* Assume not found */
1884 unsigned short vendor=dev->vendor;
1885 unsigned short device=dev->device;
1887 /* Scan the list, looking for a vendor/device match */
1888 for (i = 0; i < free_index; i++, list++ ) {
1889 if ((list->vendor == vendor ) && (list->device == device )) {
1899 * pci_dev parity list iterator
1900 * Scan the PCI device list for one iteration, looking for SERRORs
1901 * Master Parity ERRORS or Parity ERRORs on primary or secondary devices
1903 static inline void edac_pci_dev_parity_iterator(pci_parity_check_fn_t fn)
1905 struct pci_dev *dev = NULL;
1907 /* request for kernel access to the next PCI device, if any,
1908 * and while we are looking at it have its reference count
1909 * bumped until we are done with it
1911 while((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
1912 /* if whitelist exists then it has priority, so only scan
1913 * those devices on the whitelist
1915 if (pci_whitelist_count > 0 ) {
1916 if (check_dev_on_list(pci_whitelist,
1917 pci_whitelist_count, dev))
1921 * if no whitelist, then check if this devices is
1924 if (!check_dev_on_list(pci_blacklist,
1925 pci_blacklist_count, dev))
1931 static void do_pci_parity_check(void)
1933 unsigned long flags;
1936 debugf3("%s()\n", __func__);
1938 if (!check_pci_parity)
1941 before_count = atomic_read(&pci_parity_count);
1943 /* scan all PCI devices looking for a Parity Error on devices and
1946 local_irq_save(flags);
1947 edac_pci_dev_parity_iterator(edac_pci_dev_parity_test);
1948 local_irq_restore(flags);
1950 /* Only if operator has selected panic on PCI Error */
1951 if (panic_on_pci_parity) {
1952 /* If the count is different 'after' from 'before' */
1953 if (before_count != atomic_read(&pci_parity_count))
1954 panic("EDAC: PCI Parity Error");
1958 static inline void clear_pci_parity_errors(void)
1960 /* Clear any PCI bus parity errors that devices initially have logged
1961 * in their registers.
1963 edac_pci_dev_parity_iterator(edac_pci_dev_parity_clear);
1966 #else /* CONFIG_PCI */
1968 static inline void do_pci_parity_check(void)
1973 static inline void clear_pci_parity_errors(void)
1978 #endif /* CONFIG_PCI */
1981 * Iterate over all MC instances and check for ECC, et al, errors
1983 static inline void check_mc_devices(void)
1985 struct list_head *item;
1986 struct mem_ctl_info *mci;
1988 debugf3("%s()\n", __func__);
1989 down(&mem_ctls_mutex);
1991 list_for_each(item, &mc_devices) {
1992 mci = list_entry(item, struct mem_ctl_info, link);
1994 if (mci->edac_check != NULL)
1995 mci->edac_check(mci);
1998 up(&mem_ctls_mutex);
2002 * Check MC status every poll_msec.
2003 * Check PCI status every poll_msec as well.
2005 * This where the work gets done for edac.
2007 * SMP safe, doesn't use NMI, and auto-rate-limits.
2009 static void do_edac_check(void)
2011 debugf3("%s()\n", __func__);
2013 do_pci_parity_check();
2016 static int edac_kernel_thread(void *arg)
2018 while (!kthread_should_stop()) {
2021 /* goto sleep for the interval */
2022 schedule_timeout_interruptible((HZ * poll_msec) / 1000);
2031 * module initialization entry point
2033 static int __init edac_mc_init(void)
2035 edac_printk(KERN_INFO, EDAC_MC, EDAC_MC_VERSION "\n");
2038 * Harvest and clear any boot/initialization PCI parity errors
2040 * FIXME: This only clears errors logged by devices present at time of
2041 * module initialization. We should also do an initial clear
2042 * of each newly hotplugged device.
2044 clear_pci_parity_errors();
2046 /* Create the MC sysfs entries */
2047 if (edac_sysfs_memctrl_setup()) {
2048 edac_printk(KERN_ERR, EDAC_MC,
2049 "Error initializing sysfs code\n");
2053 /* Create the PCI parity sysfs entries */
2054 if (edac_sysfs_pci_setup()) {
2055 edac_sysfs_memctrl_teardown();
2056 edac_printk(KERN_ERR, EDAC_MC,
2057 "EDAC PCI: Error initializing sysfs code\n");
2061 /* create our kernel thread */
2062 edac_thread = kthread_run(edac_kernel_thread, NULL, "kedac");
2064 if (IS_ERR(edac_thread)) {
2065 /* remove the sysfs entries */
2066 edac_sysfs_memctrl_teardown();
2067 edac_sysfs_pci_teardown();
2068 return PTR_ERR(edac_thread);
2076 * module exit/termination functioni
2078 static void __exit edac_mc_exit(void)
2080 debugf0("%s()\n", __func__);
2081 kthread_stop(edac_thread);
2083 /* tear down the sysfs device */
2084 edac_sysfs_memctrl_teardown();
2085 edac_sysfs_pci_teardown();
2088 module_init(edac_mc_init);
2089 module_exit(edac_mc_exit);
2091 MODULE_LICENSE("GPL");
2092 MODULE_AUTHOR("Linux Networx (http://lnxi.com) Thayne Harbaugh et al\n"
2093 "Based on work by Dan Hollis et al");
2094 MODULE_DESCRIPTION("Core library routines for MC reporting");
2096 module_param(panic_on_ue, int, 0644);
2097 MODULE_PARM_DESC(panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
2098 module_param(check_pci_parity, int, 0644);
2099 MODULE_PARM_DESC(check_pci_parity, "Check for PCI bus parity errors: 0=off 1=on");
2100 module_param(panic_on_pci_parity, int, 0644);
2101 MODULE_PARM_DESC(panic_on_pci_parity, "Panic on PCI Bus Parity error: 0=off 1=on");
2102 module_param(log_ue, int, 0644);
2103 MODULE_PARM_DESC(log_ue, "Log uncorrectable error to console: 0=off 1=on");
2104 module_param(log_ce, int, 0644);
2105 MODULE_PARM_DESC(log_ce, "Log correctable error to console: 0=off 1=on");
2106 module_param(poll_msec, int, 0644);
2107 MODULE_PARM_DESC(poll_msec, "Polling period in milliseconds");
2108 #ifdef CONFIG_EDAC_DEBUG
2109 module_param(edac_debug_level, int, 0644);
2110 MODULE_PARM_DESC(edac_debug_level, "Debug level");