2 * edac_mc kernel module
3 * (C) 2005-2007 Linux Networx (http://lnxi.com)
5 * This file may be distributed under the terms of the
6 * GNU General Public License.
8 * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com
10 * (c) 2012 - Mauro Carvalho Chehab <mchehab@redhat.com>
11 * The entire API were re-written, and ported to use struct device
15 #include <linux/ctype.h>
16 #include <linux/slab.h>
17 #include <linux/edac.h>
18 #include <linux/bug.h>
19 #include <linux/pm_runtime.h>
20 #include <linux/uaccess.h>
22 #include "edac_core.h"
23 #include "edac_module.h"
25 /* MC EDAC Controls, setable by module parameter, and sysfs */
26 static int edac_mc_log_ue = 1;
27 static int edac_mc_log_ce = 1;
28 static int edac_mc_panic_on_ue;
29 static int edac_mc_poll_msec = 1000;
31 /* Getter functions for above */
32 int edac_mc_get_log_ue(void)
34 return edac_mc_log_ue;
37 int edac_mc_get_log_ce(void)
39 return edac_mc_log_ce;
42 int edac_mc_get_panic_on_ue(void)
44 return edac_mc_panic_on_ue;
47 /* this is temporary */
48 int edac_mc_get_poll_msec(void)
50 return edac_mc_poll_msec;
53 static int edac_set_poll_msec(const char *val, struct kernel_param *kp)
61 ret = strict_strtol(val, 0, &l);
62 if (ret == -EINVAL || ((int)l != l))
64 *((int *)kp->arg) = l;
66 /* notify edac_mc engine to reset the poll period */
67 edac_mc_reset_delay_period(l);
72 /* Parameter declarations for above */
73 module_param(edac_mc_panic_on_ue, int, 0644);
74 MODULE_PARM_DESC(edac_mc_panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
75 module_param(edac_mc_log_ue, int, 0644);
76 MODULE_PARM_DESC(edac_mc_log_ue,
77 "Log uncorrectable error to console: 0=off 1=on");
78 module_param(edac_mc_log_ce, int, 0644);
79 MODULE_PARM_DESC(edac_mc_log_ce,
80 "Log correctable error to console: 0=off 1=on");
81 module_param_call(edac_mc_poll_msec, edac_set_poll_msec, param_get_int,
82 &edac_mc_poll_msec, 0644);
83 MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds");
85 static struct device mci_pdev;
88 * various constants for Memory Controllers
90 static const char *mem_types[] = {
91 [MEM_EMPTY] = "Empty",
92 [MEM_RESERVED] = "Reserved",
93 [MEM_UNKNOWN] = "Unknown",
97 [MEM_SDR] = "Unbuffered-SDR",
98 [MEM_RDR] = "Registered-SDR",
99 [MEM_DDR] = "Unbuffered-DDR",
100 [MEM_RDDR] = "Registered-DDR",
102 [MEM_DDR2] = "Unbuffered-DDR2",
103 [MEM_FB_DDR2] = "FullyBuffered-DDR2",
104 [MEM_RDDR2] = "Registered-DDR2",
106 [MEM_DDR3] = "Unbuffered-DDR3",
107 [MEM_RDDR3] = "Registered-DDR3"
110 static const char *dev_types[] = {
111 [DEV_UNKNOWN] = "Unknown",
121 static const char *edac_caps[] = {
122 [EDAC_UNKNOWN] = "Unknown",
123 [EDAC_NONE] = "None",
124 [EDAC_RESERVED] = "Reserved",
125 [EDAC_PARITY] = "PARITY",
127 [EDAC_SECDED] = "SECDED",
128 [EDAC_S2ECD2ED] = "S2ECD2ED",
129 [EDAC_S4ECD4ED] = "S4ECD4ED",
130 [EDAC_S8ECD8ED] = "S8ECD8ED",
131 [EDAC_S16ECD16ED] = "S16ECD16ED"
134 #ifdef CONFIG_EDAC_LEGACY_SYSFS
136 * EDAC sysfs CSROW data structures and methods
139 #define to_csrow(k) container_of(k, struct csrow_info, dev)
142 * We need it to avoid namespace conflicts between the legacy API
143 * and the per-dimm/per-rank one
145 #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
146 struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
148 struct dev_ch_attribute {
149 struct device_attribute attr;
153 #define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
154 struct dev_ch_attribute dev_attr_legacy_##_name = \
155 { __ATTR(_name, _mode, _show, _store), (_var) }
157 #define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
159 /* Set of more default csrow<id> attribute show/store functions */
160 static ssize_t csrow_ue_count_show(struct device *dev,
161 struct device_attribute *mattr, char *data)
163 struct csrow_info *csrow = to_csrow(dev);
165 return sprintf(data, "%u\n", csrow->ue_count);
168 static ssize_t csrow_ce_count_show(struct device *dev,
169 struct device_attribute *mattr, char *data)
171 struct csrow_info *csrow = to_csrow(dev);
173 return sprintf(data, "%u\n", csrow->ce_count);
176 static ssize_t csrow_size_show(struct device *dev,
177 struct device_attribute *mattr, char *data)
179 struct csrow_info *csrow = to_csrow(dev);
183 for (i = 0; i < csrow->nr_channels; i++)
184 nr_pages += csrow->channels[i].dimm->nr_pages;
185 return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages));
188 static ssize_t csrow_mem_type_show(struct device *dev,
189 struct device_attribute *mattr, char *data)
191 struct csrow_info *csrow = to_csrow(dev);
193 return sprintf(data, "%s\n", mem_types[csrow->channels[0].dimm->mtype]);
196 static ssize_t csrow_dev_type_show(struct device *dev,
197 struct device_attribute *mattr, char *data)
199 struct csrow_info *csrow = to_csrow(dev);
201 return sprintf(data, "%s\n", dev_types[csrow->channels[0].dimm->dtype]);
204 static ssize_t csrow_edac_mode_show(struct device *dev,
205 struct device_attribute *mattr,
208 struct csrow_info *csrow = to_csrow(dev);
210 return sprintf(data, "%s\n", edac_caps[csrow->channels[0].dimm->edac_mode]);
213 /* show/store functions for DIMM Label attributes */
214 static ssize_t channel_dimm_label_show(struct device *dev,
215 struct device_attribute *mattr,
218 struct csrow_info *csrow = to_csrow(dev);
219 unsigned chan = to_channel(mattr);
220 struct rank_info *rank = &csrow->channels[chan];
222 /* if field has not been initialized, there is nothing to send */
223 if (!rank->dimm->label[0])
226 return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n",
230 static ssize_t channel_dimm_label_store(struct device *dev,
231 struct device_attribute *mattr,
232 const char *data, size_t count)
234 struct csrow_info *csrow = to_csrow(dev);
235 unsigned chan = to_channel(mattr);
236 struct rank_info *rank = &csrow->channels[chan];
238 ssize_t max_size = 0;
240 max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
241 strncpy(rank->dimm->label, data, max_size);
242 rank->dimm->label[max_size] = '\0';
247 /* show function for dynamic chX_ce_count attribute */
248 static ssize_t channel_ce_count_show(struct device *dev,
249 struct device_attribute *mattr, char *data)
251 struct csrow_info *csrow = to_csrow(dev);
252 unsigned chan = to_channel(mattr);
253 struct rank_info *rank = &csrow->channels[chan];
255 return sprintf(data, "%u\n", rank->ce_count);
258 /* cwrow<id>/attribute files */
259 DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL);
260 DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL);
261 DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL);
262 DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL);
263 DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL);
264 DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL);
266 /* default attributes of the CSROW<id> object */
267 static struct attribute *csrow_attrs[] = {
268 &dev_attr_legacy_dev_type.attr,
269 &dev_attr_legacy_mem_type.attr,
270 &dev_attr_legacy_edac_mode.attr,
271 &dev_attr_legacy_size_mb.attr,
272 &dev_attr_legacy_ue_count.attr,
273 &dev_attr_legacy_ce_count.attr,
277 static struct attribute_group csrow_attr_grp = {
278 .attrs = csrow_attrs,
281 static const struct attribute_group *csrow_attr_groups[] = {
286 static void csrow_attr_release(struct device *device)
288 debugf1("Releasing csrow device %s\n", dev_name(device));
291 static struct device_type csrow_attr_type = {
292 .groups = csrow_attr_groups,
293 .release = csrow_attr_release,
297 * possible dynamic channel DIMM Label attribute files
301 #define EDAC_NR_CHANNELS 6
303 DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR,
304 channel_dimm_label_show, channel_dimm_label_store, 0);
305 DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR,
306 channel_dimm_label_show, channel_dimm_label_store, 1);
307 DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR,
308 channel_dimm_label_show, channel_dimm_label_store, 2);
309 DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR,
310 channel_dimm_label_show, channel_dimm_label_store, 3);
311 DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR,
312 channel_dimm_label_show, channel_dimm_label_store, 4);
313 DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR,
314 channel_dimm_label_show, channel_dimm_label_store, 5);
316 /* Total possible dynamic DIMM Label attribute file table */
317 static struct device_attribute *dynamic_csrow_dimm_attr[] = {
318 &dev_attr_legacy_ch0_dimm_label.attr,
319 &dev_attr_legacy_ch1_dimm_label.attr,
320 &dev_attr_legacy_ch2_dimm_label.attr,
321 &dev_attr_legacy_ch3_dimm_label.attr,
322 &dev_attr_legacy_ch4_dimm_label.attr,
323 &dev_attr_legacy_ch5_dimm_label.attr
326 /* possible dynamic channel ce_count attribute files */
327 DEVICE_CHANNEL(ch0_ce_count, S_IRUGO | S_IWUSR,
328 channel_ce_count_show, NULL, 0);
329 DEVICE_CHANNEL(ch1_ce_count, S_IRUGO | S_IWUSR,
330 channel_ce_count_show, NULL, 1);
331 DEVICE_CHANNEL(ch2_ce_count, S_IRUGO | S_IWUSR,
332 channel_ce_count_show, NULL, 2);
333 DEVICE_CHANNEL(ch3_ce_count, S_IRUGO | S_IWUSR,
334 channel_ce_count_show, NULL, 3);
335 DEVICE_CHANNEL(ch4_ce_count, S_IRUGO | S_IWUSR,
336 channel_ce_count_show, NULL, 4);
337 DEVICE_CHANNEL(ch5_ce_count, S_IRUGO | S_IWUSR,
338 channel_ce_count_show, NULL, 5);
340 /* Total possible dynamic ce_count attribute file table */
341 static struct device_attribute *dynamic_csrow_ce_count_attr[] = {
342 &dev_attr_legacy_ch0_ce_count.attr,
343 &dev_attr_legacy_ch1_ce_count.attr,
344 &dev_attr_legacy_ch2_ce_count.attr,
345 &dev_attr_legacy_ch3_ce_count.attr,
346 &dev_attr_legacy_ch4_ce_count.attr,
347 &dev_attr_legacy_ch5_ce_count.attr
350 /* Create a CSROW object under specifed edac_mc_device */
351 static int edac_create_csrow_object(struct mem_ctl_info *mci,
352 struct csrow_info *csrow, int index)
356 if (csrow->nr_channels >= EDAC_NR_CHANNELS)
359 csrow->dev.type = &csrow_attr_type;
360 csrow->dev.bus = &mci->bus;
361 device_initialize(&csrow->dev);
362 csrow->dev.parent = &mci->dev;
363 dev_set_name(&csrow->dev, "csrow%d", index);
364 dev_set_drvdata(&csrow->dev, csrow);
366 debugf0("%s(): creating (virtual) csrow node %s\n", __func__,
367 dev_name(&csrow->dev));
369 err = device_add(&csrow->dev);
373 for (chan = 0; chan < csrow->nr_channels; chan++) {
374 err = device_create_file(&csrow->dev,
375 dynamic_csrow_dimm_attr[chan]);
378 err = device_create_file(&csrow->dev,
379 dynamic_csrow_ce_count_attr[chan]);
381 device_remove_file(&csrow->dev,
382 dynamic_csrow_dimm_attr[chan]);
390 for (--chan; chan >= 0; chan--) {
391 device_remove_file(&csrow->dev,
392 dynamic_csrow_dimm_attr[chan]);
393 device_remove_file(&csrow->dev,
394 dynamic_csrow_ce_count_attr[chan]);
396 put_device(&csrow->dev);
401 /* Create a CSROW object under specifed edac_mc_device */
402 static int edac_create_csrow_objects(struct mem_ctl_info *mci)
405 struct csrow_info *csrow;
407 for (i = 0; i < mci->nr_csrows; i++) {
408 err = edac_create_csrow_object(mci, &mci->csrows[i], i);
415 for (--i; i >= 0; i--) {
416 csrow = &mci->csrows[i];
417 for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
418 device_remove_file(&csrow->dev,
419 dynamic_csrow_dimm_attr[chan]);
420 device_remove_file(&csrow->dev,
421 dynamic_csrow_ce_count_attr[chan]);
423 put_device(&mci->csrows[i].dev);
429 static void edac_delete_csrow_objects(struct mem_ctl_info *mci)
432 struct csrow_info *csrow;
434 for (i = mci->nr_csrows - 1; i >= 0; i--) {
435 csrow = &mci->csrows[i];
436 for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
437 debugf1("Removing csrow %d channel %d sysfs nodes\n",
439 device_remove_file(&csrow->dev,
440 dynamic_csrow_dimm_attr[chan]);
441 device_remove_file(&csrow->dev,
442 dynamic_csrow_ce_count_attr[chan]);
444 put_device(&mci->csrows[i].dev);
445 device_del(&mci->csrows[i].dev);
451 * Per-dimm (or per-rank) devices
454 #define to_dimm(k) container_of(k, struct dimm_info, dev)
456 /* show/store functions for DIMM Label attributes */
457 static ssize_t dimmdev_location_show(struct device *dev,
458 struct device_attribute *mattr, char *data)
460 struct dimm_info *dimm = to_dimm(dev);
461 struct mem_ctl_info *mci = dimm->mci;
465 for (i = 0; i < mci->n_layers; i++) {
466 p += sprintf(p, "%s %d ",
467 edac_layer_name[mci->layers[i].type],
474 static ssize_t dimmdev_label_show(struct device *dev,
475 struct device_attribute *mattr, char *data)
477 struct dimm_info *dimm = to_dimm(dev);
479 /* if field has not been initialized, there is nothing to send */
483 return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", dimm->label);
486 static ssize_t dimmdev_label_store(struct device *dev,
487 struct device_attribute *mattr,
491 struct dimm_info *dimm = to_dimm(dev);
493 ssize_t max_size = 0;
495 max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
496 strncpy(dimm->label, data, max_size);
497 dimm->label[max_size] = '\0';
502 static ssize_t dimmdev_size_show(struct device *dev,
503 struct device_attribute *mattr, char *data)
505 struct dimm_info *dimm = to_dimm(dev);
507 return sprintf(data, "%u\n", PAGES_TO_MiB(dimm->nr_pages));
510 static ssize_t dimmdev_mem_type_show(struct device *dev,
511 struct device_attribute *mattr, char *data)
513 struct dimm_info *dimm = to_dimm(dev);
515 return sprintf(data, "%s\n", mem_types[dimm->mtype]);
518 static ssize_t dimmdev_dev_type_show(struct device *dev,
519 struct device_attribute *mattr, char *data)
521 struct dimm_info *dimm = to_dimm(dev);
523 return sprintf(data, "%s\n", dev_types[dimm->dtype]);
526 static ssize_t dimmdev_edac_mode_show(struct device *dev,
527 struct device_attribute *mattr,
530 struct dimm_info *dimm = to_dimm(dev);
532 return sprintf(data, "%s\n", edac_caps[dimm->edac_mode]);
535 /* dimm/rank attribute files */
536 static DEVICE_ATTR(dimm_label, S_IRUGO | S_IWUSR,
537 dimmdev_label_show, dimmdev_label_store);
538 static DEVICE_ATTR(dimm_location, S_IRUGO, dimmdev_location_show, NULL);
539 static DEVICE_ATTR(size, S_IRUGO, dimmdev_size_show, NULL);
540 static DEVICE_ATTR(dimm_mem_type, S_IRUGO, dimmdev_mem_type_show, NULL);
541 static DEVICE_ATTR(dimm_dev_type, S_IRUGO, dimmdev_dev_type_show, NULL);
542 static DEVICE_ATTR(dimm_edac_mode, S_IRUGO, dimmdev_edac_mode_show, NULL);
544 /* attributes of the dimm<id>/rank<id> object */
545 static struct attribute *dimm_attrs[] = {
546 &dev_attr_dimm_label.attr,
547 &dev_attr_dimm_location.attr,
549 &dev_attr_dimm_mem_type.attr,
550 &dev_attr_dimm_dev_type.attr,
551 &dev_attr_dimm_edac_mode.attr,
555 static struct attribute_group dimm_attr_grp = {
559 static const struct attribute_group *dimm_attr_groups[] = {
564 static void dimm_attr_release(struct device *device)
566 debugf1("Releasing dimm device %s\n", dev_name(device));
569 static struct device_type dimm_attr_type = {
570 .groups = dimm_attr_groups,
571 .release = dimm_attr_release,
574 /* Create a DIMM object under specifed memory controller device */
575 static int edac_create_dimm_object(struct mem_ctl_info *mci,
576 struct dimm_info *dimm,
582 dimm->dev.type = &dimm_attr_type;
583 dimm->dev.bus = &mci->bus;
584 device_initialize(&dimm->dev);
586 dimm->dev.parent = &mci->dev;
587 if (mci->mem_is_per_rank)
588 dev_set_name(&dimm->dev, "rank%d", index);
590 dev_set_name(&dimm->dev, "dimm%d", index);
591 dev_set_drvdata(&dimm->dev, dimm);
592 pm_runtime_forbid(&mci->dev);
594 err = device_add(&dimm->dev);
596 debugf0("%s(): creating rank/dimm device %s\n", __func__,
597 dev_name(&dimm->dev));
603 * Memory controller device
606 #define to_mci(k) container_of(k, struct mem_ctl_info, dev)
608 static ssize_t mci_reset_counters_store(struct device *dev,
609 struct device_attribute *mattr,
610 const char *data, size_t count)
612 struct mem_ctl_info *mci = to_mci(dev);
613 int cnt, row, chan, i;
616 mci->ue_noinfo_count = 0;
617 mci->ce_noinfo_count = 0;
619 for (row = 0; row < mci->nr_csrows; row++) {
620 struct csrow_info *ri = &mci->csrows[row];
625 for (chan = 0; chan < ri->nr_channels; chan++)
626 ri->channels[chan].ce_count = 0;
630 for (i = 0; i < mci->n_layers; i++) {
631 cnt *= mci->layers[i].size;
632 memset(mci->ce_per_layer[i], 0, cnt * sizeof(u32));
633 memset(mci->ue_per_layer[i], 0, cnt * sizeof(u32));
636 mci->start_time = jiffies;
640 /* Memory scrubbing interface:
642 * A MC driver can limit the scrubbing bandwidth based on the CPU type.
643 * Therefore, ->set_sdram_scrub_rate should be made to return the actual
644 * bandwidth that is accepted or 0 when scrubbing is to be disabled.
646 * Negative value still means that an error has occurred while setting
649 static ssize_t mci_sdram_scrub_rate_store(struct device *dev,
650 struct device_attribute *mattr,
651 const char *data, size_t count)
653 struct mem_ctl_info *mci = to_mci(dev);
654 unsigned long bandwidth = 0;
657 if (!mci->set_sdram_scrub_rate)
660 if (strict_strtoul(data, 10, &bandwidth) < 0)
663 new_bw = mci->set_sdram_scrub_rate(mci, bandwidth);
665 edac_printk(KERN_WARNING, EDAC_MC,
666 "Error setting scrub rate to: %lu\n", bandwidth);
674 * ->get_sdram_scrub_rate() return value semantics same as above.
676 static ssize_t mci_sdram_scrub_rate_show(struct device *dev,
677 struct device_attribute *mattr,
680 struct mem_ctl_info *mci = to_mci(dev);
683 if (!mci->get_sdram_scrub_rate)
686 bandwidth = mci->get_sdram_scrub_rate(mci);
688 edac_printk(KERN_DEBUG, EDAC_MC, "Error reading scrub rate\n");
692 return sprintf(data, "%d\n", bandwidth);
695 /* default attribute files for the MCI object */
696 static ssize_t mci_ue_count_show(struct device *dev,
697 struct device_attribute *mattr,
700 struct mem_ctl_info *mci = to_mci(dev);
702 return sprintf(data, "%d\n", mci->ue_mc);
705 static ssize_t mci_ce_count_show(struct device *dev,
706 struct device_attribute *mattr,
709 struct mem_ctl_info *mci = to_mci(dev);
711 return sprintf(data, "%d\n", mci->ce_mc);
714 static ssize_t mci_ce_noinfo_show(struct device *dev,
715 struct device_attribute *mattr,
718 struct mem_ctl_info *mci = to_mci(dev);
720 return sprintf(data, "%d\n", mci->ce_noinfo_count);
723 static ssize_t mci_ue_noinfo_show(struct device *dev,
724 struct device_attribute *mattr,
727 struct mem_ctl_info *mci = to_mci(dev);
729 return sprintf(data, "%d\n", mci->ue_noinfo_count);
732 static ssize_t mci_seconds_show(struct device *dev,
733 struct device_attribute *mattr,
736 struct mem_ctl_info *mci = to_mci(dev);
738 return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ);
741 static ssize_t mci_ctl_name_show(struct device *dev,
742 struct device_attribute *mattr,
745 struct mem_ctl_info *mci = to_mci(dev);
747 return sprintf(data, "%s\n", mci->ctl_name);
750 static ssize_t mci_size_mb_show(struct device *dev,
751 struct device_attribute *mattr,
754 struct mem_ctl_info *mci = to_mci(dev);
755 int total_pages = 0, csrow_idx, j;
757 for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) {
758 struct csrow_info *csrow = &mci->csrows[csrow_idx];
760 for (j = 0; j < csrow->nr_channels; j++) {
761 struct dimm_info *dimm = csrow->channels[j].dimm;
763 total_pages += dimm->nr_pages;
767 return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages));
770 static ssize_t mci_max_location_show(struct device *dev,
771 struct device_attribute *mattr,
774 struct mem_ctl_info *mci = to_mci(dev);
778 for (i = 0; i < mci->n_layers; i++) {
779 p += sprintf(p, "%s %d ",
780 edac_layer_name[mci->layers[i].type],
781 mci->layers[i].size - 1);
787 #ifdef CONFIG_EDAC_DEBUG
788 static ssize_t edac_fake_inject_write(struct file *file,
789 const char __user *data,
790 size_t count, loff_t *ppos)
792 struct device *dev = file->private_data;
793 struct mem_ctl_info *mci = to_mci(dev);
794 static enum hw_event_mc_err_type type;
796 type = mci->fake_inject_ue ? HW_EVENT_ERR_UNCORRECTED
797 : HW_EVENT_ERR_CORRECTED;
800 "Generating a %s fake error to %d.%d.%d to test core handling. NOTE: this won't test the driver-specific decoding logic.\n",
801 (type == HW_EVENT_ERR_UNCORRECTED) ? "UE" : "CE",
802 mci->fake_inject_layer[0],
803 mci->fake_inject_layer[1],
804 mci->fake_inject_layer[2]
806 edac_mc_handle_error(type, mci, 0, 0, 0,
807 mci->fake_inject_layer[0],
808 mci->fake_inject_layer[1],
809 mci->fake_inject_layer[2],
810 "FAKE ERROR", "for EDAC testing only", NULL);
815 static int debugfs_open(struct inode *inode, struct file *file)
817 file->private_data = inode->i_private;
821 static const struct file_operations debug_fake_inject_fops = {
822 .open = debugfs_open,
823 .write = edac_fake_inject_write,
824 .llseek = generic_file_llseek,
828 /* default Control file */
829 DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store);
831 /* default Attribute files */
832 DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL);
833 DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL);
834 DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL);
835 DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL);
836 DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL);
837 DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL);
838 DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL);
839 DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL);
841 /* memory scrubber attribute file */
842 DEVICE_ATTR(sdram_scrub_rate, S_IRUGO | S_IWUSR, mci_sdram_scrub_rate_show,
843 mci_sdram_scrub_rate_store);
845 static struct attribute *mci_attrs[] = {
846 &dev_attr_reset_counters.attr,
847 &dev_attr_mc_name.attr,
848 &dev_attr_size_mb.attr,
849 &dev_attr_seconds_since_reset.attr,
850 &dev_attr_ue_noinfo_count.attr,
851 &dev_attr_ce_noinfo_count.attr,
852 &dev_attr_ue_count.attr,
853 &dev_attr_ce_count.attr,
854 &dev_attr_sdram_scrub_rate.attr,
855 &dev_attr_max_location.attr,
859 static struct attribute_group mci_attr_grp = {
863 static const struct attribute_group *mci_attr_groups[] = {
868 static void mci_attr_release(struct device *device)
870 debugf1("Releasing mci device %s\n", dev_name(device));
873 static struct device_type mci_attr_type = {
874 .groups = mci_attr_groups,
875 .release = mci_attr_release,
878 #ifdef CONFIG_EDAC_DEBUG
879 int edac_create_debug_nodes(struct mem_ctl_info *mci)
881 struct dentry *d, *parent;
885 d = debugfs_create_dir(mci->dev.kobj.name, mci->debugfs);
890 for (i = 0; i < mci->n_layers; i++) {
891 sprintf(name, "fake_inject_%s",
892 edac_layer_name[mci->layers[i].type]);
893 d = debugfs_create_u8(name, S_IRUGO | S_IWUSR, parent,
894 &mci->fake_inject_layer[i]);
899 d = debugfs_create_bool("fake_inject_ue", S_IRUGO | S_IWUSR, parent,
900 &mci->fake_inject_ue);
904 d = debugfs_create_file("fake_inject", S_IWUSR, parent,
906 &debug_fake_inject_fops);
912 debugfs_remove(mci->debugfs);
918 * Create a new Memory Controller kobject instance,
919 * mc<id> under the 'mc' directory
925 int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
929 debugf0("%s() idx=%d\n", __func__, mci->mc_idx);
931 /* get the /sys/devices/system/edac subsys reference */
933 mci->dev.type = &mci_attr_type;
934 device_initialize(&mci->dev);
936 mci->dev.parent = &mci_pdev;
937 mci->dev.bus = &mci->bus;
938 dev_set_name(&mci->dev, "mc%d", mci->mc_idx);
939 dev_set_drvdata(&mci->dev, mci);
940 pm_runtime_forbid(&mci->dev);
943 * The memory controller needs its own bus, in order to avoid
944 * namespace conflicts at /sys/bus/edac.
946 debugf0("creating bus %s\n",mci->bus.name);
947 mci->bus.name = kstrdup(dev_name(&mci->dev), GFP_KERNEL);
948 err = bus_register(&mci->bus);
952 debugf0("%s(): creating device %s\n", __func__,
953 dev_name(&mci->dev));
954 err = device_add(&mci->dev);
956 bus_unregister(&mci->bus);
957 kfree(mci->bus.name);
962 * Create the dimm/rank devices
964 for (i = 0; i < mci->tot_dimms; i++) {
965 struct dimm_info *dimm = &mci->dimms[i];
966 /* Only expose populated DIMMs */
967 if (dimm->nr_pages == 0)
969 #ifdef CONFIG_EDAC_DEBUG
970 debugf1("%s creating dimm%d, located at ",
972 if (edac_debug_level >= 1) {
974 for (lay = 0; lay < mci->n_layers; lay++)
975 printk(KERN_CONT "%s %d ",
976 edac_layer_name[mci->layers[lay].type],
977 dimm->location[lay]);
978 printk(KERN_CONT "\n");
981 err = edac_create_dimm_object(mci, dimm, i);
983 debugf1("%s() failure: create dimm %d obj\n",
989 #ifdef CONFIG_EDAC_LEGACY_SYSFS
990 err = edac_create_csrow_objects(mci);
995 #ifdef CONFIG_EDAC_DEBUG
996 edac_create_debug_nodes(mci);
1001 for (i--; i >= 0; i--) {
1002 struct dimm_info *dimm = &mci->dimms[i];
1003 if (dimm->nr_pages == 0)
1005 put_device(&dimm->dev);
1006 device_del(&dimm->dev);
1008 put_device(&mci->dev);
1009 device_del(&mci->dev);
1010 bus_unregister(&mci->bus);
1011 kfree(mci->bus.name);
1016 * remove a Memory Controller instance
1018 void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
1022 debugf0("%s()\n", __func__);
1024 #ifdef CONFIG_EDAC_DEBUG
1025 debugfs_remove(mci->debugfs);
1027 #ifdef CONFIG_EDAC_LEGACY_SYSFS
1028 edac_delete_csrow_objects(mci);
1031 for (i = 0; i < mci->tot_dimms; i++) {
1032 struct dimm_info *dimm = &mci->dimms[i];
1033 if (dimm->nr_pages == 0)
1035 debugf0("%s(): removing device %s\n", __func__,
1036 dev_name(&dimm->dev));
1037 put_device(&dimm->dev);
1038 device_del(&dimm->dev);
1042 void edac_unregister_sysfs(struct mem_ctl_info *mci)
1044 debugf1("Unregistering device %s\n", dev_name(&mci->dev));
1045 put_device(&mci->dev);
1046 device_del(&mci->dev);
1047 bus_unregister(&mci->bus);
1048 kfree(mci->bus.name);
1051 static void mc_attr_release(struct device *device)
1053 debugf1("Releasing device %s\n", dev_name(device));
1056 static struct device_type mc_attr_type = {
1057 .release = mc_attr_release,
1060 * Init/exit code for the module. Basically, creates/removes /sys/class/rc
1062 int __init edac_mc_sysfs_init(void)
1064 struct bus_type *edac_subsys;
1067 /* get the /sys/devices/system/edac subsys reference */
1068 edac_subsys = edac_get_sysfs_subsys();
1069 if (edac_subsys == NULL) {
1070 debugf1("%s() no edac_subsys\n", __func__);
1074 mci_pdev.bus = edac_subsys;
1075 mci_pdev.type = &mc_attr_type;
1076 device_initialize(&mci_pdev);
1077 dev_set_name(&mci_pdev, "mc");
1079 err = device_add(&mci_pdev);
1086 void __exit edac_mc_sysfs_exit(void)
1088 put_device(&mci_pdev);
1089 device_del(&mci_pdev);
1090 edac_put_sysfs_subsys();