2 * Intel 82860 Memory Controller kernel module
3 * (C) 2005 Red Hat (http://www.redhat.com)
4 * This file may be distributed under the terms of the
5 * GNU General Public License.
7 * Written by Ben Woodard <woodard@redhat.com>
8 * shamelessly copied from and based upon the edac_i82875 driver
9 * by Thayne Harbaugh of Linux Networx. (http://lnxi.com)
13 #include <linux/config.h>
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/pci.h>
17 #include <linux/pci_ids.h>
18 #include <linux/slab.h>
22 #define i82860_printk(level, fmt, arg...) \
23 edac_printk(level, "i82860", fmt, ##arg)
26 #define i82860_mc_printk(mci, level, fmt, arg...) \
27 edac_mc_chipset_printk(mci, level, "i82860", fmt, ##arg)
30 #ifndef PCI_DEVICE_ID_INTEL_82860_0
31 #define PCI_DEVICE_ID_INTEL_82860_0 0x2531
32 #endif /* PCI_DEVICE_ID_INTEL_82860_0 */
34 #define I82860_MCHCFG 0x50
35 #define I82860_GBA 0x60
36 #define I82860_GBA_MASK 0x7FF
37 #define I82860_GBA_SHIFT 24
38 #define I82860_ERRSTS 0xC8
39 #define I82860_EAP 0xE4
40 #define I82860_DERRCTL_STS 0xE2
46 struct i82860_dev_info {
50 struct i82860_error_info {
57 static const struct i82860_dev_info i82860_devs[] = {
59 .ctl_name = "i82860"},
62 static struct pci_dev *mci_pdev = NULL; /* init dev: in case that AGP code
63 has already registered driver */
65 static void i82860_get_error_info (struct mem_ctl_info *mci,
66 struct i82860_error_info *info)
69 * This is a mess because there is no atomic way to read all the
70 * registers at once and the registers can transition from CE being
73 pci_read_config_word(mci->pdev, I82860_ERRSTS, &info->errsts);
74 pci_read_config_dword(mci->pdev, I82860_EAP, &info->eap);
75 pci_read_config_word(mci->pdev, I82860_DERRCTL_STS, &info->derrsyn);
76 pci_read_config_word(mci->pdev, I82860_ERRSTS, &info->errsts2);
78 pci_write_bits16(mci->pdev, I82860_ERRSTS, 0x0003, 0x0003);
81 * If the error is the same for both reads then the first set of reads
82 * is valid. If there is a change then there is a CE no info and the
83 * second set of reads is valid and should be UE info.
85 if (!(info->errsts2 & 0x0003))
87 if ((info->errsts ^ info->errsts2) & 0x0003) {
88 pci_read_config_dword(mci->pdev, I82860_EAP, &info->eap);
89 pci_read_config_word(mci->pdev, I82860_DERRCTL_STS,
94 static int i82860_process_error_info (struct mem_ctl_info *mci,
95 struct i82860_error_info *info, int handle_errors)
99 if (!(info->errsts2 & 0x0003))
105 if ((info->errsts ^ info->errsts2) & 0x0003) {
106 edac_mc_handle_ce_no_info(mci, "UE overwrote CE");
107 info->errsts = info->errsts2;
110 info->eap >>= PAGE_SHIFT;
111 row = edac_mc_find_csrow_by_page(mci, info->eap);
113 if (info->errsts & 0x0002)
114 edac_mc_handle_ue(mci, info->eap, 0, row, "i82860 UE");
116 edac_mc_handle_ce(mci, info->eap, 0, info->derrsyn, row,
122 static void i82860_check(struct mem_ctl_info *mci)
124 struct i82860_error_info info;
126 debugf1("MC%d: %s()\n", mci->mc_idx, __func__);
127 i82860_get_error_info(mci, &info);
128 i82860_process_error_info(mci, &info, 1);
131 static int i82860_probe1(struct pci_dev *pdev, int dev_idx)
135 struct mem_ctl_info *mci = NULL;
136 unsigned long last_cumul_size;
137 struct i82860_error_info discard;
139 u16 mchcfg_ddim; /* DRAM Data Integrity Mode 0=none,2=edac */
141 /* RDRAM has channels but these don't map onto the abstractions that
143 The device groups from the GRA registers seem to map reasonably
144 well onto the notion of a chip select row.
145 There are 16 GRA registers and since the name is associated with
146 the channel and the GRA registers map to physical devices so we are
147 going to make 1 channel for group.
149 mci = edac_mc_alloc(0, 16, 1);
153 debugf3("%s(): init mci\n", __func__);
156 mci->mtype_cap = MEM_FLAG_DDR;
159 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
160 /* I"m not sure about this but I think that all RDRAM is SECDED */
161 mci->edac_cap = EDAC_FLAG_SECDED;
164 mci->mod_name = EDAC_MOD_STR;
165 mci->mod_ver = "$Revision: 1.1.2.6 $";
166 mci->ctl_name = i82860_devs[dev_idx].ctl_name;
167 mci->edac_check = i82860_check;
168 mci->ctl_page_to_phys = NULL;
170 pci_read_config_word(mci->pdev, I82860_MCHCFG, &mchcfg_ddim);
171 mchcfg_ddim = mchcfg_ddim & 0x180;
174 * The group row boundary (GRA) reg values are boundary address
175 * for each DRAM row with a granularity of 16MB. GRA regs are
176 * cumulative; therefore GRA15 will contain the total memory contained
179 for (last_cumul_size = index = 0; index < mci->nr_csrows; index++) {
182 struct csrow_info *csrow = &mci->csrows[index];
184 pci_read_config_word(mci->pdev, I82860_GBA + index * 2,
187 cumul_size = (value & I82860_GBA_MASK) <<
188 (I82860_GBA_SHIFT - PAGE_SHIFT);
189 debugf3("%s(): (%d) cumul_size 0x%x\n", __func__, index,
191 if (cumul_size == last_cumul_size)
192 continue; /* not populated */
194 csrow->first_page = last_cumul_size;
195 csrow->last_page = cumul_size - 1;
196 csrow->nr_pages = cumul_size - last_cumul_size;
197 last_cumul_size = cumul_size;
198 csrow->grain = 1 << 12; /* I82860_EAP has 4KiB reolution */
199 csrow->mtype = MEM_RMBS;
200 csrow->dtype = DEV_UNKNOWN;
201 csrow->edac_mode = mchcfg_ddim ? EDAC_SECDED : EDAC_NONE;
204 i82860_get_error_info(mci, &discard); /* clear counters */
206 if (edac_mc_add_mc(mci)) {
207 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
210 /* get this far and it's successful */
211 debugf3("%s(): success\n", __func__);
217 /* returns count (>= 0), or negative on error */
218 static int __devinit i82860_init_one(struct pci_dev *pdev,
219 const struct pci_device_id *ent)
223 debugf0("%s()\n", __func__);
225 i82860_printk(KERN_INFO, "i82860 init one\n");
226 if(pci_enable_device(pdev) < 0)
228 rc = i82860_probe1(pdev, ent->driver_data);
230 mci_pdev = pci_dev_get(pdev);
234 static void __devexit i82860_remove_one(struct pci_dev *pdev)
236 struct mem_ctl_info *mci;
238 debugf0("%s()\n", __func__);
240 mci = edac_mc_find_mci_by_pdev(pdev);
241 if ((mci != NULL) && (edac_mc_del_mc(mci) == 0))
245 static const struct pci_device_id i82860_pci_tbl[] __devinitdata = {
246 {PCI_VEND_DEV(INTEL, 82860_0), PCI_ANY_ID, PCI_ANY_ID, 0, 0,
248 {0,} /* 0 terminated list. */
251 MODULE_DEVICE_TABLE(pci, i82860_pci_tbl);
253 static struct pci_driver i82860_driver = {
254 .name = EDAC_MOD_STR,
255 .probe = i82860_init_one,
256 .remove = __devexit_p(i82860_remove_one),
257 .id_table = i82860_pci_tbl,
260 static int __init i82860_init(void)
264 debugf3("%s()\n", __func__);
265 if ((pci_rc = pci_register_driver(&i82860_driver)) < 0)
269 mci_pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
270 PCI_DEVICE_ID_INTEL_82860_0, NULL);
271 if (mci_pdev == NULL) {
272 debugf0("860 pci_get_device fail\n");
276 pci_rc = i82860_init_one(mci_pdev, i82860_pci_tbl);
278 debugf0("860 init fail\n");
286 pci_unregister_driver(&i82860_driver);
289 if (mci_pdev != NULL)
290 pci_dev_put(mci_pdev);
295 static void __exit i82860_exit(void)
297 debugf3("%s()\n", __func__);
299 pci_unregister_driver(&i82860_driver);
301 if (mci_pdev != NULL)
302 pci_dev_put(mci_pdev);
305 module_init(i82860_init);
306 module_exit(i82860_exit);
308 MODULE_LICENSE("GPL");
310 ("Red Hat Inc. (http://www.redhat.com) Ben Woodard <woodard@redhat.com>");
311 MODULE_DESCRIPTION("ECC support for Intel 82860 memory hub controllers");