2 * Marvell MV64x60 Memory Controller kernel module for PPC platforms
4 * Author: Dave Jiang <djiang@mvista.com>
6 * 2006-2007 (c) MontaVista Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/interrupt.h>
17 #include <linux/edac.h>
18 #include <linux/gfp.h>
20 #include "edac_core.h"
21 #include "edac_module.h"
22 #include "mv64x60_edac.h"
24 static const char *mv64x60_ctl_name = "MV64x60";
25 static int edac_dev_idx;
26 static int edac_pci_idx;
27 static int edac_mc_idx;
29 /*********************** PCI err device **********************************/
31 static void mv64x60_pci_check(struct edac_pci_ctl_info *pci)
33 struct mv64x60_pci_pdata *pdata = pci->pvt_info;
36 cause = in_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE);
40 printk(KERN_ERR "Error in PCI %d Interface\n", pdata->pci_hose);
41 printk(KERN_ERR "Cause register: 0x%08x\n", cause);
42 printk(KERN_ERR "Address Low: 0x%08x\n",
43 in_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_ADDR_LO));
44 printk(KERN_ERR "Address High: 0x%08x\n",
45 in_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_ADDR_HI));
46 printk(KERN_ERR "Attribute: 0x%08x\n",
47 in_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_ATTR));
48 printk(KERN_ERR "Command: 0x%08x\n",
49 in_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_CMD));
50 out_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE, ~cause);
52 if (cause & MV64X60_PCI_PE_MASK)
53 edac_pci_handle_pe(pci, pci->ctl_name);
55 if (!(cause & MV64X60_PCI_PE_MASK))
56 edac_pci_handle_npe(pci, pci->ctl_name);
59 static irqreturn_t mv64x60_pci_isr(int irq, void *dev_id)
61 struct edac_pci_ctl_info *pci = dev_id;
62 struct mv64x60_pci_pdata *pdata = pci->pvt_info;
65 val = in_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE);
69 mv64x60_pci_check(pci);
75 * Bit 0 of MV64x60_PCIx_ERR_MASK does not exist on the 64360 and because of
76 * errata FEr-#11 and FEr-##16 for the 64460, it should be 0 on that chip as
77 * well. IOW, don't set bit 0.
80 /* Erratum FEr PCI-#16: clear bit 0 of PCI SERRn Mask reg. */
81 static int __init mv64x60_pci_fixup(struct platform_device *pdev)
84 void __iomem *pci_serr;
86 r = platform_get_resource(pdev, IORESOURCE_MEM, 1);
88 printk(KERN_ERR "%s: Unable to get resource for "
89 "PCI err regs\n", __func__);
93 pci_serr = ioremap(r->start, resource_size(r));
97 out_le32(pci_serr, in_le32(pci_serr) & ~0x1);
103 static int __devinit mv64x60_pci_err_probe(struct platform_device *pdev)
105 struct edac_pci_ctl_info *pci;
106 struct mv64x60_pci_pdata *pdata;
110 if (!devres_open_group(&pdev->dev, mv64x60_pci_err_probe, GFP_KERNEL))
113 pci = edac_pci_alloc_ctl_info(sizeof(*pdata), "mv64x60_pci_err");
117 pdata = pci->pvt_info;
119 pdata->pci_hose = pdev->id;
120 pdata->name = "mpc85xx_pci_err";
122 platform_set_drvdata(pdev, pci);
123 pci->dev = &pdev->dev;
124 pci->dev_name = dev_name(&pdev->dev);
125 pci->mod_name = EDAC_MOD_STR;
126 pci->ctl_name = pdata->name;
128 if (edac_op_state == EDAC_OPSTATE_POLL)
129 pci->edac_check = mv64x60_pci_check;
131 pdata->edac_idx = edac_pci_idx++;
133 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
135 printk(KERN_ERR "%s: Unable to get resource for "
136 "PCI err regs\n", __func__);
141 if (!devm_request_mem_region(&pdev->dev,
145 printk(KERN_ERR "%s: Error while requesting mem region\n",
151 pdata->pci_vbase = devm_ioremap(&pdev->dev,
154 if (!pdata->pci_vbase) {
155 printk(KERN_ERR "%s: Unable to setup PCI err regs\n", __func__);
160 res = mv64x60_pci_fixup(pdev);
162 printk(KERN_ERR "%s: PCI fixup failed\n", __func__);
166 out_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE, 0);
167 out_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_MASK, 0);
168 out_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_MASK,
169 MV64X60_PCIx_ERR_MASK_VAL);
171 if (edac_pci_add_device(pci, pdata->edac_idx) > 0) {
172 debugf3("%s(): failed edac_pci_add_device()\n", __func__);
176 if (edac_op_state == EDAC_OPSTATE_INT) {
177 pdata->irq = platform_get_irq(pdev, 0);
178 res = devm_request_irq(&pdev->dev,
185 printk(KERN_ERR "%s: Unable to request irq %d for "
186 "MV64x60 PCI ERR\n", __func__, pdata->irq);
190 printk(KERN_INFO EDAC_MOD_STR " acquired irq %d for PCI Err\n",
194 devres_remove_group(&pdev->dev, mv64x60_pci_err_probe);
196 /* get this far and it's successful */
197 debugf3("%s(): success\n", __func__);
202 edac_pci_del_device(&pdev->dev);
204 edac_pci_free_ctl_info(pci);
205 devres_release_group(&pdev->dev, mv64x60_pci_err_probe);
209 static int mv64x60_pci_err_remove(struct platform_device *pdev)
211 struct edac_pci_ctl_info *pci = platform_get_drvdata(pdev);
213 debugf0("%s()\n", __func__);
215 edac_pci_del_device(&pdev->dev);
217 edac_pci_free_ctl_info(pci);
222 static struct platform_driver mv64x60_pci_err_driver = {
223 .probe = mv64x60_pci_err_probe,
224 .remove = __devexit_p(mv64x60_pci_err_remove),
226 .name = "mv64x60_pci_err",
230 #endif /* CONFIG_PCI */
232 /*********************** SRAM err device **********************************/
233 static void mv64x60_sram_check(struct edac_device_ctl_info *edac_dev)
235 struct mv64x60_sram_pdata *pdata = edac_dev->pvt_info;
238 cause = in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE);
242 printk(KERN_ERR "Error in internal SRAM\n");
243 printk(KERN_ERR "Cause register: 0x%08x\n", cause);
244 printk(KERN_ERR "Address Low: 0x%08x\n",
245 in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_ADDR_LO));
246 printk(KERN_ERR "Address High: 0x%08x\n",
247 in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_ADDR_HI));
248 printk(KERN_ERR "Data Low: 0x%08x\n",
249 in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_DATA_LO));
250 printk(KERN_ERR "Data High: 0x%08x\n",
251 in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_DATA_HI));
252 printk(KERN_ERR "Parity: 0x%08x\n",
253 in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_PARITY));
254 out_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE, 0);
256 edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name);
259 static irqreturn_t mv64x60_sram_isr(int irq, void *dev_id)
261 struct edac_device_ctl_info *edac_dev = dev_id;
262 struct mv64x60_sram_pdata *pdata = edac_dev->pvt_info;
265 cause = in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE);
269 mv64x60_sram_check(edac_dev);
274 static int __devinit mv64x60_sram_err_probe(struct platform_device *pdev)
276 struct edac_device_ctl_info *edac_dev;
277 struct mv64x60_sram_pdata *pdata;
281 if (!devres_open_group(&pdev->dev, mv64x60_sram_err_probe, GFP_KERNEL))
284 edac_dev = edac_device_alloc_ctl_info(sizeof(*pdata),
285 "sram", 1, NULL, 0, 0, NULL, 0,
288 devres_release_group(&pdev->dev, mv64x60_sram_err_probe);
292 pdata = edac_dev->pvt_info;
293 pdata->name = "mv64x60_sram_err";
295 edac_dev->dev = &pdev->dev;
296 platform_set_drvdata(pdev, edac_dev);
297 edac_dev->dev_name = dev_name(&pdev->dev);
299 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
301 printk(KERN_ERR "%s: Unable to get resource for "
302 "SRAM err regs\n", __func__);
307 if (!devm_request_mem_region(&pdev->dev,
311 printk(KERN_ERR "%s: Error while request mem region\n",
317 pdata->sram_vbase = devm_ioremap(&pdev->dev,
320 if (!pdata->sram_vbase) {
321 printk(KERN_ERR "%s: Unable to setup SRAM err regs\n",
327 /* setup SRAM err registers */
328 out_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE, 0);
330 edac_dev->mod_name = EDAC_MOD_STR;
331 edac_dev->ctl_name = pdata->name;
333 if (edac_op_state == EDAC_OPSTATE_POLL)
334 edac_dev->edac_check = mv64x60_sram_check;
336 pdata->edac_idx = edac_dev_idx++;
338 if (edac_device_add_device(edac_dev) > 0) {
339 debugf3("%s(): failed edac_device_add_device()\n", __func__);
343 if (edac_op_state == EDAC_OPSTATE_INT) {
344 pdata->irq = platform_get_irq(pdev, 0);
345 res = devm_request_irq(&pdev->dev,
353 "%s: Unable to request irq %d for "
354 "MV64x60 SRAM ERR\n", __func__, pdata->irq);
359 printk(KERN_INFO EDAC_MOD_STR " acquired irq %d for SRAM Err\n",
363 devres_remove_group(&pdev->dev, mv64x60_sram_err_probe);
365 /* get this far and it's successful */
366 debugf3("%s(): success\n", __func__);
371 edac_device_del_device(&pdev->dev);
373 devres_release_group(&pdev->dev, mv64x60_sram_err_probe);
374 edac_device_free_ctl_info(edac_dev);
378 static int mv64x60_sram_err_remove(struct platform_device *pdev)
380 struct edac_device_ctl_info *edac_dev = platform_get_drvdata(pdev);
382 debugf0("%s()\n", __func__);
384 edac_device_del_device(&pdev->dev);
385 edac_device_free_ctl_info(edac_dev);
390 static struct platform_driver mv64x60_sram_err_driver = {
391 .probe = mv64x60_sram_err_probe,
392 .remove = mv64x60_sram_err_remove,
394 .name = "mv64x60_sram_err",
398 /*********************** CPU err device **********************************/
399 static void mv64x60_cpu_check(struct edac_device_ctl_info *edac_dev)
401 struct mv64x60_cpu_pdata *pdata = edac_dev->pvt_info;
404 cause = in_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE) &
405 MV64x60_CPU_CAUSE_MASK;
409 printk(KERN_ERR "Error on CPU interface\n");
410 printk(KERN_ERR "Cause register: 0x%08x\n", cause);
411 printk(KERN_ERR "Address Low: 0x%08x\n",
412 in_le32(pdata->cpu_vbase[0] + MV64x60_CPU_ERR_ADDR_LO));
413 printk(KERN_ERR "Address High: 0x%08x\n",
414 in_le32(pdata->cpu_vbase[0] + MV64x60_CPU_ERR_ADDR_HI));
415 printk(KERN_ERR "Data Low: 0x%08x\n",
416 in_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_DATA_LO));
417 printk(KERN_ERR "Data High: 0x%08x\n",
418 in_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_DATA_HI));
419 printk(KERN_ERR "Parity: 0x%08x\n",
420 in_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_PARITY));
421 out_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE, 0);
423 edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name);
426 static irqreturn_t mv64x60_cpu_isr(int irq, void *dev_id)
428 struct edac_device_ctl_info *edac_dev = dev_id;
429 struct mv64x60_cpu_pdata *pdata = edac_dev->pvt_info;
432 cause = in_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE) &
433 MV64x60_CPU_CAUSE_MASK;
437 mv64x60_cpu_check(edac_dev);
442 static int __devinit mv64x60_cpu_err_probe(struct platform_device *pdev)
444 struct edac_device_ctl_info *edac_dev;
446 struct mv64x60_cpu_pdata *pdata;
449 if (!devres_open_group(&pdev->dev, mv64x60_cpu_err_probe, GFP_KERNEL))
452 edac_dev = edac_device_alloc_ctl_info(sizeof(*pdata),
453 "cpu", 1, NULL, 0, 0, NULL, 0,
456 devres_release_group(&pdev->dev, mv64x60_cpu_err_probe);
460 pdata = edac_dev->pvt_info;
461 pdata->name = "mv64x60_cpu_err";
463 edac_dev->dev = &pdev->dev;
464 platform_set_drvdata(pdev, edac_dev);
465 edac_dev->dev_name = dev_name(&pdev->dev);
467 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
469 printk(KERN_ERR "%s: Unable to get resource for "
470 "CPU err regs\n", __func__);
475 if (!devm_request_mem_region(&pdev->dev,
479 printk(KERN_ERR "%s: Error while requesting mem region\n",
485 pdata->cpu_vbase[0] = devm_ioremap(&pdev->dev,
488 if (!pdata->cpu_vbase[0]) {
489 printk(KERN_ERR "%s: Unable to setup CPU err regs\n", __func__);
494 r = platform_get_resource(pdev, IORESOURCE_MEM, 1);
496 printk(KERN_ERR "%s: Unable to get resource for "
497 "CPU err regs\n", __func__);
502 if (!devm_request_mem_region(&pdev->dev,
506 printk(KERN_ERR "%s: Error while requesting mem region\n",
512 pdata->cpu_vbase[1] = devm_ioremap(&pdev->dev,
515 if (!pdata->cpu_vbase[1]) {
516 printk(KERN_ERR "%s: Unable to setup CPU err regs\n", __func__);
521 /* setup CPU err registers */
522 out_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE, 0);
523 out_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_MASK, 0);
524 out_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_MASK, 0x000000ff);
526 edac_dev->mod_name = EDAC_MOD_STR;
527 edac_dev->ctl_name = pdata->name;
528 if (edac_op_state == EDAC_OPSTATE_POLL)
529 edac_dev->edac_check = mv64x60_cpu_check;
531 pdata->edac_idx = edac_dev_idx++;
533 if (edac_device_add_device(edac_dev) > 0) {
534 debugf3("%s(): failed edac_device_add_device()\n", __func__);
538 if (edac_op_state == EDAC_OPSTATE_INT) {
539 pdata->irq = platform_get_irq(pdev, 0);
540 res = devm_request_irq(&pdev->dev,
548 "%s: Unable to request irq %d for MV64x60 "
549 "CPU ERR\n", __func__, pdata->irq);
554 printk(KERN_INFO EDAC_MOD_STR
555 " acquired irq %d for CPU Err\n", pdata->irq);
558 devres_remove_group(&pdev->dev, mv64x60_cpu_err_probe);
560 /* get this far and it's successful */
561 debugf3("%s(): success\n", __func__);
566 edac_device_del_device(&pdev->dev);
568 devres_release_group(&pdev->dev, mv64x60_cpu_err_probe);
569 edac_device_free_ctl_info(edac_dev);
573 static int mv64x60_cpu_err_remove(struct platform_device *pdev)
575 struct edac_device_ctl_info *edac_dev = platform_get_drvdata(pdev);
577 debugf0("%s()\n", __func__);
579 edac_device_del_device(&pdev->dev);
580 edac_device_free_ctl_info(edac_dev);
584 static struct platform_driver mv64x60_cpu_err_driver = {
585 .probe = mv64x60_cpu_err_probe,
586 .remove = mv64x60_cpu_err_remove,
588 .name = "mv64x60_cpu_err",
592 /*********************** DRAM err device **********************************/
594 static void mv64x60_mc_check(struct mem_ctl_info *mci)
596 struct mv64x60_mc_pdata *pdata = mci->pvt_info;
603 reg = in_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR);
607 err_addr = reg & ~0x3;
608 sdram_ecc = in_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_RCVD);
609 comp_ecc = in_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CALC);
610 syndrome = sdram_ecc ^ comp_ecc;
612 /* first bit clear in ECC Err Reg, 1 bit error, correctable by HW */
614 edac_mc_handle_error(HW_EVENT_ERR_CORRECTED, mci,
615 err_addr >> PAGE_SHIFT,
616 err_addr & PAGE_MASK, syndrome,
618 mci->ctl_name, "", NULL);
619 else /* 2 bit error, UE */
620 edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci,
621 err_addr >> PAGE_SHIFT,
622 err_addr & PAGE_MASK, 0,
624 mci->ctl_name, "", NULL);
626 /* clear the error */
627 out_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR, 0);
630 static irqreturn_t mv64x60_mc_isr(int irq, void *dev_id)
632 struct mem_ctl_info *mci = dev_id;
633 struct mv64x60_mc_pdata *pdata = mci->pvt_info;
636 reg = in_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR);
640 /* writing 0's to the ECC err addr in check function clears irq */
641 mv64x60_mc_check(mci);
646 static void get_total_mem(struct mv64x60_mc_pdata *pdata)
648 struct device_node *np = NULL;
649 const unsigned int *reg;
651 np = of_find_node_by_type(NULL, "memory");
655 reg = of_get_property(np, "reg", NULL);
657 pdata->total_mem = reg[1];
660 static void mv64x60_init_csrows(struct mem_ctl_info *mci,
661 struct mv64x60_mc_pdata *pdata)
663 struct csrow_info *csrow;
664 struct dimm_info *dimm;
669 get_total_mem(pdata);
671 ctl = in_le32(pdata->mc_vbase + MV64X60_SDRAM_CONFIG);
673 csrow = mci->csrows[0];
674 dimm = csrow->channels[0]->dimm;
676 dimm->nr_pages = pdata->total_mem >> PAGE_SHIFT;
679 dimm->mtype = (ctl & MV64X60_SDRAM_REGISTERED) ? MEM_RDDR : MEM_DDR;
681 devtype = (ctl >> 20) & 0x3;
684 dimm->dtype = DEV_X32;
686 case 0x2: /* could be X8 too, but no way to tell */
687 dimm->dtype = DEV_X16;
690 dimm->dtype = DEV_X4;
693 dimm->dtype = DEV_UNKNOWN;
697 dimm->edac_mode = EDAC_SECDED;
700 static int __devinit mv64x60_mc_err_probe(struct platform_device *pdev)
702 struct mem_ctl_info *mci;
703 struct edac_mc_layer layers[2];
704 struct mv64x60_mc_pdata *pdata;
709 if (!devres_open_group(&pdev->dev, mv64x60_mc_err_probe, GFP_KERNEL))
712 layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
714 layers[0].is_virt_csrow = true;
715 layers[1].type = EDAC_MC_LAYER_CHANNEL;
717 layers[1].is_virt_csrow = false;
718 mci = edac_mc_alloc(edac_mc_idx, ARRAY_SIZE(layers), layers,
719 sizeof(struct mv64x60_mc_pdata));
721 printk(KERN_ERR "%s: No memory for CPU err\n", __func__);
722 devres_release_group(&pdev->dev, mv64x60_mc_err_probe);
726 pdata = mci->pvt_info;
727 mci->pdev = &pdev->dev;
728 platform_set_drvdata(pdev, mci);
729 pdata->name = "mv64x60_mc_err";
731 mci->dev_name = dev_name(&pdev->dev);
732 pdata->edac_idx = edac_mc_idx++;
734 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
736 printk(KERN_ERR "%s: Unable to get resource for "
737 "MC err regs\n", __func__);
742 if (!devm_request_mem_region(&pdev->dev,
746 printk(KERN_ERR "%s: Error while requesting mem region\n",
752 pdata->mc_vbase = devm_ioremap(&pdev->dev,
755 if (!pdata->mc_vbase) {
756 printk(KERN_ERR "%s: Unable to setup MC err regs\n", __func__);
761 ctl = in_le32(pdata->mc_vbase + MV64X60_SDRAM_CONFIG);
762 if (!(ctl & MV64X60_SDRAM_ECC)) {
764 printk(KERN_WARNING "%s: No ECC DIMMs discovered\n", __func__);
769 debugf3("%s(): init mci\n", __func__);
770 mci->mtype_cap = MEM_FLAG_RDDR | MEM_FLAG_DDR;
771 mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
772 mci->edac_cap = EDAC_FLAG_SECDED;
773 mci->mod_name = EDAC_MOD_STR;
774 mci->mod_ver = MV64x60_REVISION;
775 mci->ctl_name = mv64x60_ctl_name;
777 if (edac_op_state == EDAC_OPSTATE_POLL)
778 mci->edac_check = mv64x60_mc_check;
780 mci->ctl_page_to_phys = NULL;
782 mci->scrub_mode = SCRUB_SW_SRC;
784 mv64x60_init_csrows(mci, pdata);
786 /* setup MC registers */
787 out_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR, 0);
788 ctl = in_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CNTL);
789 ctl = (ctl & 0xff00ffff) | 0x10000;
790 out_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CNTL, ctl);
792 if (edac_mc_add_mc(mci)) {
793 debugf3("%s(): failed edac_mc_add_mc()\n", __func__);
797 if (edac_op_state == EDAC_OPSTATE_INT) {
798 /* acquire interrupt that reports errors */
799 pdata->irq = platform_get_irq(pdev, 0);
800 res = devm_request_irq(&pdev->dev,
807 printk(KERN_ERR "%s: Unable to request irq %d for "
808 "MV64x60 DRAM ERR\n", __func__, pdata->irq);
813 printk(KERN_INFO EDAC_MOD_STR " acquired irq %d for MC Err\n",
817 /* get this far and it's successful */
818 debugf3("%s(): success\n", __func__);
823 edac_mc_del_mc(&pdev->dev);
825 devres_release_group(&pdev->dev, mv64x60_mc_err_probe);
830 static int mv64x60_mc_err_remove(struct platform_device *pdev)
832 struct mem_ctl_info *mci = platform_get_drvdata(pdev);
834 debugf0("%s()\n", __func__);
836 edac_mc_del_mc(&pdev->dev);
841 static struct platform_driver mv64x60_mc_err_driver = {
842 .probe = mv64x60_mc_err_probe,
843 .remove = mv64x60_mc_err_remove,
845 .name = "mv64x60_mc_err",
849 static int __init mv64x60_edac_init(void)
853 printk(KERN_INFO "Marvell MV64x60 EDAC driver " MV64x60_REVISION "\n");
854 printk(KERN_INFO "\t(C) 2006-2007 MontaVista Software\n");
855 /* make sure error reporting method is sane */
856 switch (edac_op_state) {
857 case EDAC_OPSTATE_POLL:
858 case EDAC_OPSTATE_INT:
861 edac_op_state = EDAC_OPSTATE_INT;
865 ret = platform_driver_register(&mv64x60_mc_err_driver);
867 printk(KERN_WARNING EDAC_MOD_STR "MC err failed to register\n");
869 ret = platform_driver_register(&mv64x60_cpu_err_driver);
871 printk(KERN_WARNING EDAC_MOD_STR
872 "CPU err failed to register\n");
874 ret = platform_driver_register(&mv64x60_sram_err_driver);
876 printk(KERN_WARNING EDAC_MOD_STR
877 "SRAM err failed to register\n");
880 ret = platform_driver_register(&mv64x60_pci_err_driver);
882 printk(KERN_WARNING EDAC_MOD_STR
883 "PCI err failed to register\n");
888 module_init(mv64x60_edac_init);
890 static void __exit mv64x60_edac_exit(void)
893 platform_driver_unregister(&mv64x60_pci_err_driver);
895 platform_driver_unregister(&mv64x60_sram_err_driver);
896 platform_driver_unregister(&mv64x60_cpu_err_driver);
897 platform_driver_unregister(&mv64x60_mc_err_driver);
899 module_exit(mv64x60_edac_exit);
901 MODULE_LICENSE("GPL");
902 MODULE_AUTHOR("Montavista Software, Inc.");
903 module_param(edac_op_state, int, 0444);
904 MODULE_PARM_DESC(edac_op_state,
905 "EDAC Error Reporting state: 0=Poll, 2=Interrupt");