1 /* Copyright (c) 2010,2015, The Linux Foundation. All rights reserved.
2 * Copyright (C) 2015 Linaro Ltd.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 #include <linux/platform_device.h>
15 #include <linux/module.h>
16 #include <linux/cpumask.h>
17 #include <linux/export.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/types.h>
20 #include <linux/qcom_scm.h>
22 #include <linux/clk.h>
29 struct clk *iface_clk;
33 static struct qcom_scm *__scm;
35 static int qcom_scm_clk_enable(void)
39 ret = clk_prepare_enable(__scm->core_clk);
42 ret = clk_prepare_enable(__scm->iface_clk);
45 ret = clk_prepare_enable(__scm->bus_clk);
52 clk_disable_unprepare(__scm->iface_clk);
54 clk_disable_unprepare(__scm->core_clk);
59 static void qcom_scm_clk_disable(void)
61 clk_disable_unprepare(__scm->core_clk);
62 clk_disable_unprepare(__scm->iface_clk);
63 clk_disable_unprepare(__scm->bus_clk);
67 * qcom_scm_set_cold_boot_addr() - Set the cold boot address for cpus
68 * @entry: Entry point function for the cpus
69 * @cpus: The cpumask of cpus that will use the entry point
71 * Set the cold boot address of the cpus. Any cpu outside the supported
72 * range would be removed from the cpu present mask.
74 int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
76 return __qcom_scm_set_cold_boot_addr(entry, cpus);
78 EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr);
81 * qcom_scm_set_warm_boot_addr() - Set the warm boot address for cpus
82 * @entry: Entry point function for the cpus
83 * @cpus: The cpumask of cpus that will use the entry point
85 * Set the Linux entry point for the SCM to transfer control to when coming
86 * out of a power down. CPU power down may be executed on cpuidle or hotplug.
88 int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
90 return __qcom_scm_set_warm_boot_addr(entry, cpus);
92 EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr);
95 * qcom_scm_cpu_power_down() - Power down the cpu
96 * @flags - Flags to flush cache
98 * This is an end point to power down cpu. If there was a pending interrupt,
99 * the control would return from this function, otherwise, the cpu jumps to the
100 * warm boot entry point set for this cpu upon reset.
102 void qcom_scm_cpu_power_down(u32 flags)
104 __qcom_scm_cpu_power_down(flags);
106 EXPORT_SYMBOL(qcom_scm_cpu_power_down);
109 * qcom_scm_hdcp_available() - Check if secure environment supports HDCP.
111 * Return true if HDCP is supported, false if not.
113 bool qcom_scm_hdcp_available(void)
115 int ret = qcom_scm_clk_enable();
120 ret = __qcom_scm_is_call_available(QCOM_SCM_SVC_HDCP,
123 qcom_scm_clk_disable();
126 return (ret > 0) ? true : false;
128 EXPORT_SYMBOL(qcom_scm_hdcp_available);
131 * qcom_scm_hdcp_req() - Send HDCP request.
132 * @req: HDCP request array
133 * @req_cnt: HDCP request array count
134 * @resp: response buffer passed to SCM
136 * Write HDCP register(s) through SCM.
138 int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, u32 *resp)
140 int ret = qcom_scm_clk_enable();
145 ret = __qcom_scm_hdcp_req(req, req_cnt, resp);
146 qcom_scm_clk_disable();
149 EXPORT_SYMBOL(qcom_scm_hdcp_req);
152 * qcom_scm_pas_supported() - Check if the peripheral authentication service is
153 * available for the given peripherial
154 * @peripheral: peripheral id
156 * Returns true if PAS is supported for this peripheral, otherwise false.
158 bool qcom_scm_pas_supported(u32 peripheral)
162 ret = __qcom_scm_is_call_available(QCOM_SCM_SVC_PIL,
163 QCOM_SCM_PAS_IS_SUPPORTED_CMD);
167 return __qcom_scm_pas_supported(peripheral);
169 EXPORT_SYMBOL(qcom_scm_pas_supported);
172 * qcom_scm_pas_init_image() - Initialize peripheral authentication service
173 * state machine for a given peripheral, using the
175 * @peripheral: peripheral id
176 * @metadata: pointer to memory containing ELF header, program header table
177 * and optional blob of data used for authenticating the metadata
178 * and the rest of the firmware
179 * @size: size of the metadata
181 * Returns 0 on success.
183 int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size)
185 dma_addr_t mdata_phys;
190 * During the scm call memory protection will be enabled for the meta
191 * data blob, so make sure it's physically contiguous, 4K aligned and
192 * non-cachable to avoid XPU violations.
194 mdata_buf = dma_alloc_coherent(__scm->dev, size, &mdata_phys, GFP_KERNEL);
196 dev_err(__scm->dev, "Allocation of metadata buffer failed.\n");
199 memcpy(mdata_buf, metadata, size);
201 ret = qcom_scm_clk_enable();
205 ret = __qcom_scm_pas_init_image(peripheral, mdata_phys);
207 qcom_scm_clk_disable();
210 dma_free_coherent(__scm->dev, size, mdata_buf, mdata_phys);
214 EXPORT_SYMBOL(qcom_scm_pas_init_image);
217 * qcom_scm_pas_mem_setup() - Prepare the memory related to a given peripheral
218 * for firmware loading
219 * @peripheral: peripheral id
220 * @addr: start address of memory area to prepare
221 * @size: size of the memory area to prepare
223 * Returns 0 on success.
225 int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t size)
229 ret = qcom_scm_clk_enable();
233 ret = __qcom_scm_pas_mem_setup(peripheral, addr, size);
234 qcom_scm_clk_disable();
238 EXPORT_SYMBOL(qcom_scm_pas_mem_setup);
241 * qcom_scm_pas_auth_and_reset() - Authenticate the given peripheral firmware
242 * and reset the remote processor
243 * @peripheral: peripheral id
245 * Return 0 on success.
247 int qcom_scm_pas_auth_and_reset(u32 peripheral)
251 ret = qcom_scm_clk_enable();
255 ret = __qcom_scm_pas_auth_and_reset(peripheral);
256 qcom_scm_clk_disable();
260 EXPORT_SYMBOL(qcom_scm_pas_auth_and_reset);
263 * qcom_scm_pas_shutdown() - Shut down the remote processor
264 * @peripheral: peripheral id
266 * Returns 0 on success.
268 int qcom_scm_pas_shutdown(u32 peripheral)
272 ret = qcom_scm_clk_enable();
276 ret = __qcom_scm_pas_shutdown(peripheral);
277 qcom_scm_clk_disable();
281 EXPORT_SYMBOL(qcom_scm_pas_shutdown);
284 * qcom_scm_is_available() - Checks if SCM is available
286 bool qcom_scm_is_available(void)
290 EXPORT_SYMBOL(qcom_scm_is_available);
292 static int qcom_scm_probe(struct platform_device *pdev)
294 struct qcom_scm *scm;
298 scm = devm_kzalloc(&pdev->dev, sizeof(*scm), GFP_KERNEL);
302 scm->dev = &pdev->dev;
304 scm->core_clk = devm_clk_get(&pdev->dev, "core");
305 if (IS_ERR(scm->core_clk)) {
306 if (PTR_ERR(scm->core_clk) != -EPROBE_DEFER)
307 dev_err(&pdev->dev, "failed to acquire core clk\n");
308 return PTR_ERR(scm->core_clk);
311 scm->iface_clk = devm_clk_get(&pdev->dev, "iface");
312 if (IS_ERR(scm->iface_clk)) {
313 if (PTR_ERR(scm->iface_clk) != -EPROBE_DEFER)
314 dev_err(&pdev->dev, "failed to acquire iface clk\n");
315 return PTR_ERR(scm->iface_clk);
318 scm->bus_clk = devm_clk_get(&pdev->dev, "bus");
319 if (IS_ERR(scm->bus_clk)) {
320 if (PTR_ERR(scm->bus_clk) != -EPROBE_DEFER)
321 dev_err(&pdev->dev, "failed to acquire bus clk\n");
322 return PTR_ERR(scm->bus_clk);
325 /* vote for max clk rate for highest performance */
326 rate = clk_round_rate(scm->core_clk, INT_MAX);
327 ret = clk_set_rate(scm->core_clk, rate);
336 static const struct of_device_id qcom_scm_dt_match[] = {
337 { .compatible = "qcom,scm",},
341 MODULE_DEVICE_TABLE(of, qcom_scm_dt_match);
343 static struct platform_driver qcom_scm_driver = {
346 .of_match_table = qcom_scm_dt_match,
348 .probe = qcom_scm_probe,
351 builtin_platform_driver(qcom_scm_driver);