2 * Driver for basic memory-mapped GPIO controllers.
4 * Copyright 2008 MontaVista Software, Inc.
5 * Copyright 2008,2010 Anton Vorontsov <cbouatmailru@gmail.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
12 * ....``.```~~~~````.`.`.`.`.```````'',,,.........`````......`.......
14 * ..The simplest form of a GPIO controller that the driver supports is``
15 * `.just a single "data" register, where GPIO state can be read and/or `
16 * `,..written. ,,..``~~~~ .....``.`.`.~~.```.`.........``````.```````
19 _/~~|___/~| . ```~~~~~~ ___/___\___ ,~.`.`.`.`````.~~...,,,,...
20 __________|~$@~~~ %~ /o*o*o*o*o*o\ .. Implementing such a GPIO .
21 o ` ~~~~\___/~~~~ ` controller in FPGA is ,.`
22 `....trivial..'~`.```.```
24 * .```````~~~~`..`.``.``.
25 * . The driver supports `... ,..```.`~~~```````````````....````.``,,
26 * . big-endian notation, just`. .. A bit more sophisticated controllers ,
27 * . register the device with -be`. .with a pair of set/clear-bit registers ,
28 * `.. suffix. ```~~`````....`.` . affecting the data register and the .`
29 * ``.`.``...``` ```.. output pins are also supported.`
30 * ^^ `````.`````````.,``~``~``~~``````
32 * ,..`.`.`...````````````......`.`.`.`.`.`..`.`.`..
33 * .. The expectation is that in at least some cases . ,-~~~-,
34 * .this will be used with roll-your-own ASIC/FPGA .` \ /
35 * .logic in Verilog or VHDL. ~~~`````````..`````~~` \ /
36 * ..````````......``````````` \o_
40 * ...`````~~`.....``.`..........``````.`.``.```........``.
41 * ` 8, 16, 32 and 64 bits registers are supported, and``.
42 * . the number of GPIOs is determined by the width of ~
43 * .. the registers. ,............```.`.`..`.`.~~~.`.`.`~
47 #include <linux/init.h>
48 #include <linux/bug.h>
49 #include <linux/kernel.h>
50 #include <linux/module.h>
51 #include <linux/spinlock.h>
52 #include <linux/compiler.h>
53 #include <linux/types.h>
54 #include <linux/errno.h>
55 #include <linux/log2.h>
56 #include <linux/ioport.h>
58 #include <linux/gpio.h>
59 #include <linux/slab.h>
60 #include <linux/platform_device.h>
61 #include <linux/mod_devicetable.h>
62 #include <linux/basic_mmio_gpio.h>
67 unsigned long (*read_reg)(void __iomem *reg);
68 void (*write_reg)(void __iomem *reg, unsigned long data);
70 void __iomem *reg_dat;
71 void __iomem *reg_set;
72 void __iomem *reg_clr;
74 /* Number of bits (GPIOs): <register width> * 8. */
78 * Some GPIO controllers work with the big-endian bits notation,
79 * e.g. in a 8-bits register, GPIO7 is the least significant bit.
81 unsigned long (*pin2mask)(struct bgpio_chip *bgc, unsigned int pin);
84 * Used to lock bgpio_chip->data. Also, this is needed to keep
85 * shadowed and real data registers writes together.
89 /* Shadowed data register to clear/set bits safely. */
93 static struct bgpio_chip *to_bgpio_chip(struct gpio_chip *gc)
95 return container_of(gc, struct bgpio_chip, gc);
98 static void bgpio_write8(void __iomem *reg, unsigned long data)
100 __raw_writeb(data, reg);
103 static unsigned long bgpio_read8(void __iomem *reg)
105 return __raw_readb(reg);
108 static void bgpio_write16(void __iomem *reg, unsigned long data)
110 __raw_writew(data, reg);
113 static unsigned long bgpio_read16(void __iomem *reg)
115 return __raw_readw(reg);
118 static void bgpio_write32(void __iomem *reg, unsigned long data)
120 __raw_writel(data, reg);
123 static unsigned long bgpio_read32(void __iomem *reg)
125 return __raw_readl(reg);
128 #if BITS_PER_LONG >= 64
129 static void bgpio_write64(void __iomem *reg, unsigned long data)
131 __raw_writeq(data, reg);
134 static unsigned long bgpio_read64(void __iomem *reg)
136 return __raw_readq(reg);
138 #endif /* BITS_PER_LONG >= 64 */
140 static unsigned long bgpio_pin2mask(struct bgpio_chip *bgc, unsigned int pin)
145 static unsigned long bgpio_pin2mask_be(struct bgpio_chip *bgc,
148 return 1 << (bgc->bits - 1 - pin);
151 static int bgpio_get(struct gpio_chip *gc, unsigned int gpio)
153 struct bgpio_chip *bgc = to_bgpio_chip(gc);
155 return bgc->read_reg(bgc->reg_dat) & bgc->pin2mask(bgc, gpio);
158 static void bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
160 struct bgpio_chip *bgc = to_bgpio_chip(gc);
161 unsigned long mask = bgc->pin2mask(bgc, gpio);
166 bgc->write_reg(bgc->reg_set, mask);
168 bgc->write_reg(bgc->reg_clr, mask);
172 spin_lock_irqsave(&bgc->lock, flags);
179 bgc->write_reg(bgc->reg_dat, bgc->data);
181 spin_unlock_irqrestore(&bgc->lock, flags);
184 static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
189 static int bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
191 bgpio_set(gc, gpio, val);
195 static void __iomem *bgpio_request_and_map(struct device *dev,
196 struct resource *res)
198 if (!devm_request_mem_region(dev, res->start, resource_size(res),
199 res->name ?: "mmio_gpio"))
202 return devm_ioremap(dev, res->start, resource_size(res));
205 static int bgpio_setup_accessors(struct platform_device *pdev,
206 struct bgpio_chip *bgc)
208 const struct platform_device_id *platid = platform_get_device_id(pdev);
212 bgc->read_reg = bgpio_read8;
213 bgc->write_reg = bgpio_write8;
216 bgc->read_reg = bgpio_read16;
217 bgc->write_reg = bgpio_write16;
220 bgc->read_reg = bgpio_read32;
221 bgc->write_reg = bgpio_write32;
223 #if BITS_PER_LONG >= 64
225 bgc->read_reg = bgpio_read64;
226 bgc->write_reg = bgpio_write64;
228 #endif /* BITS_PER_LONG >= 64 */
230 dev_err(&pdev->dev, "unsupported data width %u bits\n",
235 bgc->pin2mask = strcmp(platid->name, "basic-mmio-gpio-be") ?
236 bgpio_pin2mask : bgpio_pin2mask_be;
241 static int __devinit bgpio_probe(struct platform_device *pdev)
243 struct device *dev = &pdev->dev;
244 struct bgpio_pdata *pdata = dev_get_platdata(dev);
245 struct bgpio_chip *bgc;
246 struct resource *res_dat;
247 struct resource *res_set;
248 struct resource *res_clr;
249 resource_size_t dat_sz;
254 res_dat = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat");
258 dat_sz = resource_size(res_dat);
259 if (!is_power_of_2(dat_sz))
264 if (bits > BITS_PER_LONG)
267 bgc = devm_kzalloc(dev, sizeof(*bgc), GFP_KERNEL);
271 bgc->reg_dat = bgpio_request_and_map(dev, res_dat);
275 res_set = platform_get_resource_byname(pdev, IORESOURCE_MEM, "set");
276 res_clr = platform_get_resource_byname(pdev, IORESOURCE_MEM, "clr");
277 if (res_set && res_clr) {
278 if (resource_size(res_set) != resource_size(res_clr) ||
279 resource_size(res_set) != dat_sz)
282 bgc->reg_set = bgpio_request_and_map(dev, res_set);
283 bgc->reg_clr = bgpio_request_and_map(dev, res_clr);
284 if (!bgc->reg_set || !bgc->reg_clr)
286 } else if (res_set || res_clr) {
290 spin_lock_init(&bgc->lock);
293 bgc->gc.base = pdata->base;
294 if (pdata->ngpio > 0)
295 ngpio = pdata->ngpio;
301 ret = bgpio_setup_accessors(pdev, bgc);
305 bgc->data = bgc->read_reg(bgc->reg_dat);
307 bgc->gc.ngpio = ngpio;
308 bgc->gc.direction_input = bgpio_dir_in;
309 bgc->gc.direction_output = bgpio_dir_out;
310 bgc->gc.get = bgpio_get;
311 bgc->gc.set = bgpio_set;
313 bgc->gc.label = dev_name(dev);
315 platform_set_drvdata(pdev, bgc);
317 ret = gpiochip_add(&bgc->gc);
319 dev_err(dev, "gpiochip_add() failed: %d\n", ret);
324 static int __devexit bgpio_remove(struct platform_device *pdev)
326 struct bgpio_chip *bgc = platform_get_drvdata(pdev);
328 return gpiochip_remove(&bgc->gc);
331 static const struct platform_device_id bgpio_id_table[] = {
332 { "basic-mmio-gpio", },
333 { "basic-mmio-gpio-be", },
336 MODULE_DEVICE_TABLE(platform, bgpio_id_table);
338 static struct platform_driver bgpio_driver = {
340 .name = "basic-mmio-gpio",
342 .id_table = bgpio_id_table,
343 .probe = bgpio_probe,
344 .remove = __devexit_p(bgpio_remove),
347 static int __init bgpio_init(void)
349 return platform_driver_register(&bgpio_driver);
351 module_init(bgpio_init);
353 static void __exit bgpio_exit(void)
355 platform_driver_unregister(&bgpio_driver);
357 module_exit(bgpio_exit);
359 MODULE_DESCRIPTION("Driver for basic memory-mapped GPIO controllers");
360 MODULE_AUTHOR("Anton Vorontsov <cbouatmailru@gmail.com>");
361 MODULE_LICENSE("GPL");