2 * Atheros AR71XX/AR724X/AR913X GPIO API support
4 * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
5 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
8 * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published
12 * by the Free Software Foundation.
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/types.h>
19 #include <linux/spinlock.h>
21 #include <linux/ioport.h>
22 #include <linux/gpio.h>
23 #include <linux/platform_data/gpio-ath79.h>
24 #include <linux/of_device.h>
26 #include <asm/mach-ath79/ar71xx_regs.h>
28 static void __iomem *ath79_gpio_base;
29 static u32 ath79_gpio_count;
30 static DEFINE_SPINLOCK(ath79_gpio_lock);
32 static void __ath79_gpio_set_value(unsigned gpio, int value)
34 void __iomem *base = ath79_gpio_base;
37 __raw_writel(1 << gpio, base + AR71XX_GPIO_REG_SET);
39 __raw_writel(1 << gpio, base + AR71XX_GPIO_REG_CLEAR);
42 static int __ath79_gpio_get_value(unsigned gpio)
44 return (__raw_readl(ath79_gpio_base + AR71XX_GPIO_REG_IN) >> gpio) & 1;
47 static int ath79_gpio_get_value(struct gpio_chip *chip, unsigned offset)
49 return __ath79_gpio_get_value(offset);
52 static void ath79_gpio_set_value(struct gpio_chip *chip,
53 unsigned offset, int value)
55 __ath79_gpio_set_value(offset, value);
58 static int ath79_gpio_direction_input(struct gpio_chip *chip,
61 void __iomem *base = ath79_gpio_base;
64 spin_lock_irqsave(&ath79_gpio_lock, flags);
66 __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << offset),
67 base + AR71XX_GPIO_REG_OE);
69 spin_unlock_irqrestore(&ath79_gpio_lock, flags);
74 static int ath79_gpio_direction_output(struct gpio_chip *chip,
75 unsigned offset, int value)
77 void __iomem *base = ath79_gpio_base;
80 spin_lock_irqsave(&ath79_gpio_lock, flags);
83 __raw_writel(1 << offset, base + AR71XX_GPIO_REG_SET);
85 __raw_writel(1 << offset, base + AR71XX_GPIO_REG_CLEAR);
87 __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << offset),
88 base + AR71XX_GPIO_REG_OE);
90 spin_unlock_irqrestore(&ath79_gpio_lock, flags);
95 static int ar934x_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
97 void __iomem *base = ath79_gpio_base;
100 spin_lock_irqsave(&ath79_gpio_lock, flags);
102 __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) | (1 << offset),
103 base + AR71XX_GPIO_REG_OE);
105 spin_unlock_irqrestore(&ath79_gpio_lock, flags);
110 static int ar934x_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
113 void __iomem *base = ath79_gpio_base;
116 spin_lock_irqsave(&ath79_gpio_lock, flags);
119 __raw_writel(1 << offset, base + AR71XX_GPIO_REG_SET);
121 __raw_writel(1 << offset, base + AR71XX_GPIO_REG_CLEAR);
123 __raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << offset),
124 base + AR71XX_GPIO_REG_OE);
126 spin_unlock_irqrestore(&ath79_gpio_lock, flags);
131 static struct gpio_chip ath79_gpio_chip = {
133 .get = ath79_gpio_get_value,
134 .set = ath79_gpio_set_value,
135 .direction_input = ath79_gpio_direction_input,
136 .direction_output = ath79_gpio_direction_output,
140 static const struct of_device_id ath79_gpio_of_match[] = {
141 { .compatible = "qca,ar7100-gpio" },
142 { .compatible = "qca,ar9340-gpio" },
146 static int ath79_gpio_probe(struct platform_device *pdev)
148 struct ath79_gpio_platform_data *pdata = pdev->dev.platform_data;
149 struct device_node *np = pdev->dev.of_node;
150 struct resource *res;
155 err = of_property_read_u32(np, "ngpios", &ath79_gpio_count);
157 dev_err(&pdev->dev, "ngpios property is not valid\n");
160 if (ath79_gpio_count >= 32) {
161 dev_err(&pdev->dev, "ngpios must be less than 32\n");
164 oe_inverted = of_device_is_compatible(np, "qca,ar9340-gpio");
166 ath79_gpio_count = pdata->ngpios;
167 oe_inverted = pdata->oe_inverted;
169 dev_err(&pdev->dev, "No DT node or platform data found\n");
173 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
174 ath79_gpio_base = devm_ioremap_nocache(
175 &pdev->dev, res->start, resource_size(res));
176 if (!ath79_gpio_base)
179 ath79_gpio_chip.dev = &pdev->dev;
180 ath79_gpio_chip.ngpio = ath79_gpio_count;
182 ath79_gpio_chip.direction_input = ar934x_gpio_direction_input;
183 ath79_gpio_chip.direction_output = ar934x_gpio_direction_output;
186 err = gpiochip_add(&ath79_gpio_chip);
189 "cannot add AR71xx GPIO chip, error=%d", err);
196 static struct platform_driver ath79_gpio_driver = {
198 .name = "ath79-gpio",
199 .of_match_table = ath79_gpio_of_match,
201 .probe = ath79_gpio_probe,
204 module_platform_driver(ath79_gpio_driver);