2 * PCA953x 4/8/16 bit I/O ports
4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5 * Copyright (C) 2007 Marvell International Ltd.
7 * Derived from drivers/i2c/chips/pca9539.c
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/gpio.h>
17 #include <linux/interrupt.h>
18 #include <linux/irq.h>
19 #include <linux/irqdomain.h>
20 #include <linux/i2c.h>
21 #include <linux/i2c/pca953x.h>
22 #include <linux/slab.h>
24 #include <linux/of_platform.h>
27 #define PCA953X_INPUT 0
28 #define PCA953X_OUTPUT 1
29 #define PCA953X_INVERT 2
30 #define PCA953X_DIRECTION 3
32 #define REG_ADDR_AI 0x80
35 #define PCA957X_INVRT 1
36 #define PCA957X_BKEN 2
37 #define PCA957X_PUPD 3
41 #define PCA957X_INTS 7
43 #define PCA_GPIO_MASK 0x00FF
44 #define PCA_INT 0x0100
45 #define PCA953X_TYPE 0x1000
46 #define PCA957X_TYPE 0x2000
48 static const struct i2c_device_id pca953x_id[] = {
49 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
50 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
51 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
52 { "pca9536", 4 | PCA953X_TYPE, },
53 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
54 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
55 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
56 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
57 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
58 { "pca9556", 8 | PCA953X_TYPE, },
59 { "pca9557", 8 | PCA953X_TYPE, },
60 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
61 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
63 { "max7310", 8 | PCA953X_TYPE, },
64 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
65 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
66 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
67 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
68 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
69 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
70 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
73 MODULE_DEVICE_TABLE(i2c, pca953x_id);
78 #define NBANK(chip) (chip->gpio_chip.ngpio / BANK_SZ)
82 u8 reg_output[MAX_BANK];
83 u8 reg_direction[MAX_BANK];
84 struct mutex i2c_lock;
86 #ifdef CONFIG_GPIO_PCA953X_IRQ
87 struct mutex irq_lock;
88 u8 irq_mask[MAX_BANK];
89 u8 irq_stat[MAX_BANK];
90 u8 irq_trig_raise[MAX_BANK];
91 u8 irq_trig_fall[MAX_BANK];
92 struct irq_domain *domain;
95 struct i2c_client *client;
96 struct gpio_chip gpio_chip;
97 const char *const *names;
101 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
105 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
106 int offset = off / BANK_SZ;
108 ret = i2c_smbus_read_byte_data(chip->client,
109 (reg << bank_shift) + offset);
113 dev_err(&chip->client->dev, "failed reading register\n");
120 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
124 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
125 int offset = off / BANK_SZ;
127 ret = i2c_smbus_write_byte_data(chip->client,
128 (reg << bank_shift) + offset, val);
131 dev_err(&chip->client->dev, "failed writing register\n");
138 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
142 if (chip->gpio_chip.ngpio <= 8)
143 ret = i2c_smbus_write_byte_data(chip->client, reg, *val);
144 else if (chip->gpio_chip.ngpio >= 24) {
145 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
146 ret = i2c_smbus_write_i2c_block_data(chip->client,
147 (reg << bank_shift) | REG_ADDR_AI,
151 switch (chip->chip_type) {
153 ret = i2c_smbus_write_word_data(chip->client,
154 reg << 1, (u16) *val);
157 ret = i2c_smbus_write_byte_data(chip->client, reg << 1,
161 ret = i2c_smbus_write_byte_data(chip->client,
169 dev_err(&chip->client->dev, "failed writing register\n");
176 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
180 if (chip->gpio_chip.ngpio <= 8) {
181 ret = i2c_smbus_read_byte_data(chip->client, reg);
183 } else if (chip->gpio_chip.ngpio >= 24) {
184 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
186 ret = i2c_smbus_read_i2c_block_data(chip->client,
187 (reg << bank_shift) | REG_ADDR_AI,
190 ret = i2c_smbus_read_word_data(chip->client, reg << 1);
191 val[0] = (u16)ret & 0xFF;
192 val[1] = (u16)ret >> 8;
195 dev_err(&chip->client->dev, "failed reading register\n");
202 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
204 struct pca953x_chip *chip;
208 chip = container_of(gc, struct pca953x_chip, gpio_chip);
210 mutex_lock(&chip->i2c_lock);
211 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
213 switch (chip->chip_type) {
215 offset = PCA953X_DIRECTION;
218 offset = PCA957X_CFG;
221 ret = pca953x_write_single(chip, offset, reg_val, off);
225 chip->reg_direction[off / BANK_SZ] = reg_val;
228 mutex_unlock(&chip->i2c_lock);
232 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
233 unsigned off, int val)
235 struct pca953x_chip *chip;
239 chip = container_of(gc, struct pca953x_chip, gpio_chip);
241 mutex_lock(&chip->i2c_lock);
242 /* set output level */
244 reg_val = chip->reg_output[off / BANK_SZ]
245 | (1u << (off % BANK_SZ));
247 reg_val = chip->reg_output[off / BANK_SZ]
248 & ~(1u << (off % BANK_SZ));
250 switch (chip->chip_type) {
252 offset = PCA953X_OUTPUT;
255 offset = PCA957X_OUT;
258 ret = pca953x_write_single(chip, offset, reg_val, off);
262 chip->reg_output[off / BANK_SZ] = reg_val;
265 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
266 switch (chip->chip_type) {
268 offset = PCA953X_DIRECTION;
271 offset = PCA957X_CFG;
274 ret = pca953x_write_single(chip, offset, reg_val, off);
278 chip->reg_direction[off / BANK_SZ] = reg_val;
281 mutex_unlock(&chip->i2c_lock);
285 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
287 struct pca953x_chip *chip;
291 chip = container_of(gc, struct pca953x_chip, gpio_chip);
293 mutex_lock(&chip->i2c_lock);
294 switch (chip->chip_type) {
296 offset = PCA953X_INPUT;
302 ret = pca953x_read_single(chip, offset, ®_val, off);
303 mutex_unlock(&chip->i2c_lock);
305 /* NOTE: diagnostic already emitted; that's all we should
306 * do unless gpio_*_value_cansleep() calls become different
307 * from their nonsleeping siblings (and report faults).
312 return (reg_val & (1u << off)) ? 1 : 0;
315 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
317 struct pca953x_chip *chip;
321 chip = container_of(gc, struct pca953x_chip, gpio_chip);
323 mutex_lock(&chip->i2c_lock);
325 reg_val = chip->reg_output[off / BANK_SZ]
326 | (1u << (off % BANK_SZ));
328 reg_val = chip->reg_output[off / BANK_SZ]
329 & ~(1u << (off % BANK_SZ));
331 switch (chip->chip_type) {
333 offset = PCA953X_OUTPUT;
336 offset = PCA957X_OUT;
339 ret = pca953x_write_single(chip, offset, reg_val, off);
343 chip->reg_output[off / BANK_SZ] = reg_val;
345 mutex_unlock(&chip->i2c_lock);
348 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
350 struct gpio_chip *gc;
352 gc = &chip->gpio_chip;
354 gc->direction_input = pca953x_gpio_direction_input;
355 gc->direction_output = pca953x_gpio_direction_output;
356 gc->get = pca953x_gpio_get_value;
357 gc->set = pca953x_gpio_set_value;
360 gc->base = chip->gpio_start;
362 gc->label = chip->client->name;
363 gc->dev = &chip->client->dev;
364 gc->owner = THIS_MODULE;
365 gc->names = chip->names;
368 #ifdef CONFIG_GPIO_PCA953X_IRQ
369 static int pca953x_gpio_to_irq(struct gpio_chip *gc, unsigned off)
371 struct pca953x_chip *chip;
373 chip = container_of(gc, struct pca953x_chip, gpio_chip);
374 return irq_create_mapping(chip->domain, off);
377 static void pca953x_irq_mask(struct irq_data *d)
379 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
381 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
384 static void pca953x_irq_unmask(struct irq_data *d)
386 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
388 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
391 static void pca953x_irq_bus_lock(struct irq_data *d)
393 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
395 mutex_lock(&chip->irq_lock);
398 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
400 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
404 /* Look for any newly setup interrupt */
405 for (i = 0; i < NBANK(chip); i++) {
406 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
407 new_irqs &= ~chip->reg_direction[i];
410 level = __ffs(new_irqs);
411 pca953x_gpio_direction_input(&chip->gpio_chip,
412 level + (BANK_SZ * i));
413 new_irqs &= ~(1 << level);
417 mutex_unlock(&chip->irq_lock);
420 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
422 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
423 int bank_nb = d->hwirq / BANK_SZ;
424 u8 mask = 1 << (d->hwirq % BANK_SZ);
426 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
427 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
432 if (type & IRQ_TYPE_EDGE_FALLING)
433 chip->irq_trig_fall[bank_nb] |= mask;
435 chip->irq_trig_fall[bank_nb] &= ~mask;
437 if (type & IRQ_TYPE_EDGE_RISING)
438 chip->irq_trig_raise[bank_nb] |= mask;
440 chip->irq_trig_raise[bank_nb] &= ~mask;
445 static struct irq_chip pca953x_irq_chip = {
447 .irq_mask = pca953x_irq_mask,
448 .irq_unmask = pca953x_irq_unmask,
449 .irq_bus_lock = pca953x_irq_bus_lock,
450 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock,
451 .irq_set_type = pca953x_irq_set_type,
454 static u8 pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
456 u8 cur_stat[MAX_BANK];
457 u8 old_stat[MAX_BANK];
459 u8 trigger[MAX_BANK], triggers = 0;
460 int ret, i, offset = 0;
462 switch (chip->chip_type) {
464 offset = PCA953X_INPUT;
470 ret = pca953x_read_regs(chip, offset, cur_stat);
474 /* Remove output pins from the equation */
475 for (i = 0; i < NBANK(chip); i++)
476 cur_stat[i] &= chip->reg_direction[i];
478 memcpy(old_stat, chip->irq_stat, NBANK(chip));
480 for (i = 0; i < NBANK(chip); i++) {
481 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
482 triggers += trigger[i];
488 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
490 for (i = 0; i < NBANK(chip); i++) {
491 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
492 (cur_stat[i] & chip->irq_trig_raise[i]);
493 pending[i] &= trigger[i];
494 pendings += pending[i];
500 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
502 struct pca953x_chip *chip = devid;
503 u8 pending[MAX_BANK];
507 if (!pca953x_irq_pending(chip, pending))
510 for (i = 0; i < NBANK(chip); i++) {
512 level = __ffs(pending[i]);
513 handle_nested_irq(irq_find_mapping(chip->domain,
514 level + (BANK_SZ * i)));
515 pending[i] &= ~(1 << level);
522 static int pca953x_gpio_irq_map(struct irq_domain *d, unsigned int irq,
523 irq_hw_number_t hwirq)
525 irq_clear_status_flags(irq, IRQ_NOREQUEST);
526 irq_set_chip_data(irq, d->host_data);
527 irq_set_chip(irq, &pca953x_irq_chip);
528 irq_set_nested_thread(irq, true);
530 set_irq_flags(irq, IRQF_VALID);
532 irq_set_noprobe(irq);
538 static const struct irq_domain_ops pca953x_irq_simple_ops = {
539 .map = pca953x_gpio_irq_map,
540 .xlate = irq_domain_xlate_twocell,
543 static int pca953x_irq_setup(struct pca953x_chip *chip,
544 const struct i2c_device_id *id,
547 struct i2c_client *client = chip->client;
548 int ret, i, offset = 0;
551 && (id->driver_data & PCA_INT)) {
553 switch (chip->chip_type) {
555 offset = PCA953X_INPUT;
561 ret = pca953x_read_regs(chip, offset, chip->irq_stat);
566 * There is no way to know which GPIO line generated the
567 * interrupt. We have to rely on the previous read for
570 for (i = 0; i < NBANK(chip); i++)
571 chip->irq_stat[i] &= chip->reg_direction[i];
572 mutex_init(&chip->irq_lock);
574 chip->domain = irq_domain_add_simple(client->dev.of_node,
575 chip->gpio_chip.ngpio,
577 &pca953x_irq_simple_ops,
582 ret = request_threaded_irq(client->irq,
585 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
586 dev_name(&client->dev), chip);
588 dev_err(&client->dev, "failed to request irq %d\n",
593 chip->gpio_chip.to_irq = pca953x_gpio_to_irq;
599 static void pca953x_irq_teardown(struct pca953x_chip *chip)
601 if (chip->irq_base != -1) {
602 free_irq(chip->client->irq, chip);
605 #else /* CONFIG_GPIO_PCA953X_IRQ */
606 static int pca953x_irq_setup(struct pca953x_chip *chip,
607 const struct i2c_device_id *id,
610 struct i2c_client *client = chip->client;
612 if (irq_base != -1 && (id->driver_data & PCA_INT))
613 dev_warn(&client->dev, "interrupt support not compiled in\n");
618 static void pca953x_irq_teardown(struct pca953x_chip *chip)
624 * Handlers for alternative sources of platform_data
626 #ifdef CONFIG_OF_GPIO
628 * Translate OpenFirmware node properties into platform_data
629 * WARNING: This is DEPRECATED and will be removed eventually!
632 pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, u32 *invert)
634 struct device_node *node;
638 node = client->dev.of_node;
643 val = of_get_property(node, "linux,gpio-base", &size);
644 WARN(val, "%s: device-tree property 'linux,gpio-base' is deprecated!", __func__);
646 if (size != sizeof(*val))
647 dev_warn(&client->dev, "%s: wrong linux,gpio-base\n",
650 *gpio_base = be32_to_cpup(val);
653 val = of_get_property(node, "polarity", NULL);
654 WARN(val, "%s: device-tree property 'polarity' is deprecated!", __func__);
660 pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, u32 *invert)
666 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
671 ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output);
675 ret = pca953x_read_regs(chip, PCA953X_DIRECTION,
676 chip->reg_direction);
680 /* set platform specific polarity inversion */
682 memset(val, 0xFF, NBANK(chip));
684 memset(val, 0, NBANK(chip));
686 ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
691 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
696 /* Let every port in proper state, that could save power */
697 memset(val, 0, NBANK(chip));
698 pca953x_write_regs(chip, PCA957X_PUPD, val);
699 memset(val, 0xFF, NBANK(chip));
700 pca953x_write_regs(chip, PCA957X_CFG, val);
701 memset(val, 0, NBANK(chip));
702 pca953x_write_regs(chip, PCA957X_OUT, val);
704 ret = pca953x_read_regs(chip, PCA957X_IN, val);
707 ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output);
710 ret = pca953x_read_regs(chip, PCA957X_CFG, chip->reg_direction);
714 /* set platform specific polarity inversion */
716 memset(val, 0xFF, NBANK(chip));
718 memset(val, 0, NBANK(chip));
719 pca953x_write_regs(chip, PCA957X_INVRT, val);
721 /* To enable register 6, 7 to controll pull up and pull down */
722 memset(val, 0x02, NBANK(chip));
723 pca953x_write_regs(chip, PCA957X_BKEN, val);
730 static int pca953x_probe(struct i2c_client *client,
731 const struct i2c_device_id *id)
733 struct pca953x_platform_data *pdata;
734 struct pca953x_chip *chip;
739 chip = kzalloc(sizeof(struct pca953x_chip), GFP_KERNEL);
743 pdata = client->dev.platform_data;
745 irq_base = pdata->irq_base;
746 chip->gpio_start = pdata->gpio_base;
747 invert = pdata->invert;
748 chip->names = pdata->names;
750 pca953x_get_alt_pdata(client, &chip->gpio_start, &invert);
751 #ifdef CONFIG_OF_GPIO
752 /* If I2C node has no interrupts property, disable GPIO interrupts */
753 if (of_find_property(client->dev.of_node, "interrupts", NULL) == NULL)
758 chip->client = client;
760 chip->chip_type = id->driver_data & (PCA953X_TYPE | PCA957X_TYPE);
762 mutex_init(&chip->i2c_lock);
764 /* initialize cached registers from their original values.
765 * we can't share this chip with another i2c master.
767 pca953x_setup_gpio(chip, id->driver_data & PCA_GPIO_MASK);
769 if (chip->chip_type == PCA953X_TYPE)
770 ret = device_pca953x_init(chip, invert);
772 ret = device_pca957x_init(chip, invert);
776 ret = pca953x_irq_setup(chip, id, irq_base);
780 ret = gpiochip_add(&chip->gpio_chip);
784 if (pdata && pdata->setup) {
785 ret = pdata->setup(client, chip->gpio_chip.base,
786 chip->gpio_chip.ngpio, pdata->context);
788 dev_warn(&client->dev, "setup failed, %d\n", ret);
791 i2c_set_clientdata(client, chip);
795 pca953x_irq_teardown(chip);
801 static int pca953x_remove(struct i2c_client *client)
803 struct pca953x_platform_data *pdata = client->dev.platform_data;
804 struct pca953x_chip *chip = i2c_get_clientdata(client);
807 if (pdata && pdata->teardown) {
808 ret = pdata->teardown(client, chip->gpio_chip.base,
809 chip->gpio_chip.ngpio, pdata->context);
811 dev_err(&client->dev, "%s failed, %d\n",
817 ret = gpiochip_remove(&chip->gpio_chip);
819 dev_err(&client->dev, "%s failed, %d\n",
820 "gpiochip_remove()", ret);
824 pca953x_irq_teardown(chip);
829 static const struct of_device_id pca953x_dt_ids[] = {
830 { .compatible = "nxp,pca9505", },
831 { .compatible = "nxp,pca9534", },
832 { .compatible = "nxp,pca9535", },
833 { .compatible = "nxp,pca9536", },
834 { .compatible = "nxp,pca9537", },
835 { .compatible = "nxp,pca9538", },
836 { .compatible = "nxp,pca9539", },
837 { .compatible = "nxp,pca9554", },
838 { .compatible = "nxp,pca9555", },
839 { .compatible = "nxp,pca9556", },
840 { .compatible = "nxp,pca9557", },
841 { .compatible = "nxp,pca9574", },
842 { .compatible = "nxp,pca9575", },
844 { .compatible = "maxim,max7310", },
845 { .compatible = "maxim,max7312", },
846 { .compatible = "maxim,max7313", },
847 { .compatible = "maxim,max7315", },
849 { .compatible = "ti,pca6107", },
850 { .compatible = "ti,tca6408", },
851 { .compatible = "ti,tca6416", },
852 { .compatible = "ti,tca6424", },
856 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
858 static struct i2c_driver pca953x_driver = {
861 .of_match_table = pca953x_dt_ids,
863 .probe = pca953x_probe,
864 .remove = pca953x_remove,
865 .id_table = pca953x_id,
868 static int __init pca953x_init(void)
870 return i2c_add_driver(&pca953x_driver);
872 /* register after i2c postcore initcall and before
873 * subsys initcalls that may rely on these GPIOs
875 subsys_initcall(pca953x_init);
877 static void __exit pca953x_exit(void)
879 i2c_del_driver(&pca953x_driver);
881 module_exit(pca953x_exit);
883 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
884 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
885 MODULE_LICENSE("GPL");