2 * Renesas R-Car GPIO Support
4 * Copyright (C) 2013 Magnus Damm
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/err.h>
17 #include <linux/gpio.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
21 #include <linux/ioport.h>
22 #include <linux/irq.h>
23 #include <linux/irqdomain.h>
24 #include <linux/module.h>
25 #include <linux/pinctrl/consumer.h>
26 #include <linux/platform_data/gpio-rcar.h>
27 #include <linux/platform_device.h>
28 #include <linux/spinlock.h>
29 #include <linux/slab.h>
31 struct gpio_rcar_priv {
34 struct gpio_rcar_config config;
35 struct platform_device *pdev;
36 struct gpio_chip gpio_chip;
37 struct irq_chip irq_chip;
38 struct irq_domain *irq_domain;
54 #define RCAR_MAX_GPIO_PER_BANK 32
56 static inline u32 gpio_rcar_read(struct gpio_rcar_priv *p, int offs)
58 return ioread32(p->base + offs);
61 static inline void gpio_rcar_write(struct gpio_rcar_priv *p, int offs,
64 iowrite32(value, p->base + offs);
67 static void gpio_rcar_modify_bit(struct gpio_rcar_priv *p, int offs,
70 u32 tmp = gpio_rcar_read(p, offs);
77 gpio_rcar_write(p, offs, tmp);
80 static void gpio_rcar_irq_disable(struct irq_data *d)
82 struct gpio_rcar_priv *p = irq_data_get_irq_chip_data(d);
84 gpio_rcar_write(p, INTMSK, ~BIT(irqd_to_hwirq(d)));
87 static void gpio_rcar_irq_enable(struct irq_data *d)
89 struct gpio_rcar_priv *p = irq_data_get_irq_chip_data(d);
91 gpio_rcar_write(p, MSKCLR, BIT(irqd_to_hwirq(d)));
94 static void gpio_rcar_config_interrupt_input_mode(struct gpio_rcar_priv *p,
96 bool active_high_rising_edge,
102 /* follow steps in the GPIO documentation for
103 * "Setting Edge-Sensitive Interrupt Input Mode" and
104 * "Setting Level-Sensitive Interrupt Input Mode"
107 spin_lock_irqsave(&p->lock, flags);
109 /* Configure postive or negative logic in POSNEG */
110 gpio_rcar_modify_bit(p, POSNEG, hwirq, !active_high_rising_edge);
112 /* Configure edge or level trigger in EDGLEVEL */
113 gpio_rcar_modify_bit(p, EDGLEVEL, hwirq, !level_trigger);
115 /* Select one edge or both edges in BOTHEDGE */
116 if (p->config.has_both_edge_trigger)
117 gpio_rcar_modify_bit(p, BOTHEDGE, hwirq, both);
119 /* Select "Interrupt Input Mode" in IOINTSEL */
120 gpio_rcar_modify_bit(p, IOINTSEL, hwirq, true);
122 /* Write INTCLR in case of edge trigger */
124 gpio_rcar_write(p, INTCLR, BIT(hwirq));
126 spin_unlock_irqrestore(&p->lock, flags);
129 static int gpio_rcar_irq_set_type(struct irq_data *d, unsigned int type)
131 struct gpio_rcar_priv *p = irq_data_get_irq_chip_data(d);
132 unsigned int hwirq = irqd_to_hwirq(d);
134 dev_dbg(&p->pdev->dev, "sense irq = %d, type = %d\n", hwirq, type);
136 switch (type & IRQ_TYPE_SENSE_MASK) {
137 case IRQ_TYPE_LEVEL_HIGH:
138 gpio_rcar_config_interrupt_input_mode(p, hwirq, true, true,
141 case IRQ_TYPE_LEVEL_LOW:
142 gpio_rcar_config_interrupt_input_mode(p, hwirq, false, true,
145 case IRQ_TYPE_EDGE_RISING:
146 gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false,
149 case IRQ_TYPE_EDGE_FALLING:
150 gpio_rcar_config_interrupt_input_mode(p, hwirq, false, false,
153 case IRQ_TYPE_EDGE_BOTH:
154 if (!p->config.has_both_edge_trigger)
156 gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false,
165 static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id)
167 struct gpio_rcar_priv *p = dev_id;
169 unsigned int offset, irqs_handled = 0;
171 while ((pending = gpio_rcar_read(p, INTDT))) {
172 offset = __ffs(pending);
173 gpio_rcar_write(p, INTCLR, BIT(offset));
174 generic_handle_irq(irq_find_mapping(p->irq_domain, offset));
178 return irqs_handled ? IRQ_HANDLED : IRQ_NONE;
181 static inline struct gpio_rcar_priv *gpio_to_priv(struct gpio_chip *chip)
183 return container_of(chip, struct gpio_rcar_priv, gpio_chip);
186 static void gpio_rcar_config_general_input_output_mode(struct gpio_chip *chip,
190 struct gpio_rcar_priv *p = gpio_to_priv(chip);
193 /* follow steps in the GPIO documentation for
194 * "Setting General Output Mode" and
195 * "Setting General Input Mode"
198 spin_lock_irqsave(&p->lock, flags);
200 /* Configure postive logic in POSNEG */
201 gpio_rcar_modify_bit(p, POSNEG, gpio, false);
203 /* Select "General Input/Output Mode" in IOINTSEL */
204 gpio_rcar_modify_bit(p, IOINTSEL, gpio, false);
206 /* Select Input Mode or Output Mode in INOUTSEL */
207 gpio_rcar_modify_bit(p, INOUTSEL, gpio, output);
209 spin_unlock_irqrestore(&p->lock, flags);
212 static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset)
214 return pinctrl_request_gpio(chip->base + offset);
217 static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset)
219 pinctrl_free_gpio(chip->base + offset);
221 /* Set the GPIO as an input to ensure that the next GPIO request won't
222 * drive the GPIO pin as an output.
224 gpio_rcar_config_general_input_output_mode(chip, offset, false);
227 static int gpio_rcar_direction_input(struct gpio_chip *chip, unsigned offset)
229 gpio_rcar_config_general_input_output_mode(chip, offset, false);
233 static int gpio_rcar_get(struct gpio_chip *chip, unsigned offset)
235 return (int)(gpio_rcar_read(gpio_to_priv(chip), INDT) & BIT(offset));
238 static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value)
240 struct gpio_rcar_priv *p = gpio_to_priv(chip);
243 spin_lock_irqsave(&p->lock, flags);
244 gpio_rcar_modify_bit(p, OUTDT, offset, value);
245 spin_unlock_irqrestore(&p->lock, flags);
248 static int gpio_rcar_direction_output(struct gpio_chip *chip, unsigned offset,
251 /* write GPIO value to output before selecting output mode of pin */
252 gpio_rcar_set(chip, offset, value);
253 gpio_rcar_config_general_input_output_mode(chip, offset, true);
257 static int gpio_rcar_to_irq(struct gpio_chip *chip, unsigned offset)
259 return irq_create_mapping(gpio_to_priv(chip)->irq_domain, offset);
262 static int gpio_rcar_irq_domain_map(struct irq_domain *h, unsigned int virq,
265 struct gpio_rcar_priv *p = h->host_data;
267 dev_dbg(&p->pdev->dev, "map hw irq = %d, virq = %d\n", (int)hw, virq);
269 irq_set_chip_data(virq, h->host_data);
270 irq_set_chip_and_handler(virq, &p->irq_chip, handle_level_irq);
271 set_irq_flags(virq, IRQF_VALID); /* kill me now */
275 static struct irq_domain_ops gpio_rcar_irq_domain_ops = {
276 .map = gpio_rcar_irq_domain_map,
279 static void gpio_rcar_parse_pdata(struct gpio_rcar_priv *p)
281 struct gpio_rcar_config *pdata = p->pdev->dev.platform_data;
282 struct device_node *np = p->pdev->dev.of_node;
283 struct of_phandle_args args;
288 } else if (IS_ENABLED(CONFIG_OF) && np) {
289 ret = of_parse_phandle_with_args(np, "gpio-ranges",
290 "#gpio-range-cells", 0, &args);
291 p->config.number_of_pins = ret == 0 && args.args_count == 3
293 : RCAR_MAX_GPIO_PER_BANK;
294 p->config.gpio_base = -1;
297 if (p->config.number_of_pins == 0 ||
298 p->config.number_of_pins > RCAR_MAX_GPIO_PER_BANK) {
299 dev_warn(&p->pdev->dev,
300 "Invalid number of gpio lines %u, using %u\n",
301 p->config.number_of_pins, RCAR_MAX_GPIO_PER_BANK);
302 p->config.number_of_pins = RCAR_MAX_GPIO_PER_BANK;
306 static int gpio_rcar_probe(struct platform_device *pdev)
308 struct gpio_rcar_priv *p;
309 struct resource *io, *irq;
310 struct gpio_chip *gpio_chip;
311 struct irq_chip *irq_chip;
312 const char *name = dev_name(&pdev->dev);
315 p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
317 dev_err(&pdev->dev, "failed to allocate driver data\n");
323 spin_lock_init(&p->lock);
325 /* Get device configuration from DT node or platform data. */
326 gpio_rcar_parse_pdata(p);
328 platform_set_drvdata(pdev, p);
330 io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
331 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
334 dev_err(&pdev->dev, "missing IRQ or IOMEM\n");
339 p->base = devm_ioremap_nocache(&pdev->dev, io->start,
342 dev_err(&pdev->dev, "failed to remap I/O memory\n");
347 gpio_chip = &p->gpio_chip;
348 gpio_chip->request = gpio_rcar_request;
349 gpio_chip->free = gpio_rcar_free;
350 gpio_chip->direction_input = gpio_rcar_direction_input;
351 gpio_chip->get = gpio_rcar_get;
352 gpio_chip->direction_output = gpio_rcar_direction_output;
353 gpio_chip->set = gpio_rcar_set;
354 gpio_chip->to_irq = gpio_rcar_to_irq;
355 gpio_chip->label = name;
356 gpio_chip->dev = &pdev->dev;
357 gpio_chip->owner = THIS_MODULE;
358 gpio_chip->base = p->config.gpio_base;
359 gpio_chip->ngpio = p->config.number_of_pins;
361 irq_chip = &p->irq_chip;
362 irq_chip->name = name;
363 irq_chip->irq_mask = gpio_rcar_irq_disable;
364 irq_chip->irq_unmask = gpio_rcar_irq_enable;
365 irq_chip->irq_enable = gpio_rcar_irq_enable;
366 irq_chip->irq_disable = gpio_rcar_irq_disable;
367 irq_chip->irq_set_type = gpio_rcar_irq_set_type;
368 irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_SET_TYPE_MASKED;
370 p->irq_domain = irq_domain_add_simple(pdev->dev.of_node,
371 p->config.number_of_pins,
373 &gpio_rcar_irq_domain_ops, p);
374 if (!p->irq_domain) {
376 dev_err(&pdev->dev, "cannot initialize irq domain\n");
380 if (devm_request_irq(&pdev->dev, irq->start,
381 gpio_rcar_irq_handler, IRQF_SHARED, name, p)) {
382 dev_err(&pdev->dev, "failed to request IRQ\n");
387 ret = gpiochip_add(gpio_chip);
389 dev_err(&pdev->dev, "failed to add GPIO controller\n");
393 dev_info(&pdev->dev, "driving %d GPIOs\n", p->config.number_of_pins);
395 /* warn in case of mismatch if irq base is specified */
396 if (p->config.irq_base) {
397 ret = irq_find_mapping(p->irq_domain, 0);
398 if (p->config.irq_base != ret)
399 dev_warn(&pdev->dev, "irq base mismatch (%u/%u)\n",
400 p->config.irq_base, ret);
403 if (p->config.pctl_name) {
404 ret = gpiochip_add_pin_range(gpio_chip, p->config.pctl_name, 0,
405 gpio_chip->base, gpio_chip->ngpio);
407 dev_warn(&pdev->dev, "failed to add pin range\n");
413 irq_domain_remove(p->irq_domain);
418 static int gpio_rcar_remove(struct platform_device *pdev)
420 struct gpio_rcar_priv *p = platform_get_drvdata(pdev);
423 ret = gpiochip_remove(&p->gpio_chip);
427 irq_domain_remove(p->irq_domain);
432 static const struct of_device_id gpio_rcar_of_table[] = {
434 .compatible = "renesas,gpio-rcar",
438 MODULE_DEVICE_TABLE(of, gpio_rcar_of_table);
441 static struct platform_driver gpio_rcar_device_driver = {
442 .probe = gpio_rcar_probe,
443 .remove = gpio_rcar_remove,
446 .of_match_table = of_match_ptr(gpio_rcar_of_table),
450 module_platform_driver(gpio_rcar_device_driver);
452 MODULE_AUTHOR("Magnus Damm");
453 MODULE_DESCRIPTION("Renesas R-Car GPIO Driver");
454 MODULE_LICENSE("GPL v2");