1 /* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
17 #include <linux/gpio.h>
18 #include <linux/i2c.h>
19 #include <linux/init.h>
20 #include <linux/interrupt.h>
21 #include <linux/irq.h>
22 #include <linux/module.h>
23 #include <linux/mutex.h>
24 #include <linux/slab.h>
25 #include <linux/i2c/sx150x.h>
27 #include <linux/of_address.h>
28 #include <linux/of_irq.h>
29 #include <linux/of_gpio.h>
30 #include <linux/of_device.h>
32 #define NO_UPDATE_PENDING -1
34 /* The chip models of sx150x */
39 struct sx150x_123_pri {
49 struct sx150x_456_pri {
59 struct sx150x_789_pri {
68 struct sx150x_device_data {
79 struct sx150x_123_pri x123;
80 struct sx150x_456_pri x456;
81 struct sx150x_789_pri x789;
86 struct gpio_chip gpio_chip;
87 struct i2c_client *client;
88 const struct sx150x_device_data *dev_cfg;
96 struct irq_chip irq_chip;
100 static const struct sx150x_device_data sx150x_devices[] = {
101 [0] = { /* sx1508q */
107 .reg_irq_mask = 0x09,
112 .reg_polarity = 0x06,
119 [1] = { /* sx1509q */
125 .reg_irq_mask = 0x13,
130 .reg_polarity = 0x0d,
137 [2] = { /* sx1506q */
143 .reg_irq_mask = 0x09,
147 .reg_pld_mode = 0x21,
148 .reg_pld_table0 = 0x23,
149 .reg_pld_table1 = 0x25,
150 .reg_pld_table2 = 0x27,
151 .reg_pld_table3 = 0x29,
152 .reg_pld_table4 = 0x2b,
157 [3] = { /* sx1502q */
163 .reg_irq_mask = 0x05,
167 .reg_pld_mode = 0x10,
168 .reg_pld_table0 = 0x11,
169 .reg_pld_table1 = 0x12,
170 .reg_pld_table2 = 0x13,
171 .reg_pld_table3 = 0x14,
172 .reg_pld_table4 = 0x15,
179 static const struct i2c_device_id sx150x_id[] = {
186 MODULE_DEVICE_TABLE(i2c, sx150x_id);
188 static const struct of_device_id sx150x_of_match[] = {
189 { .compatible = "semtech,sx1508q" },
190 { .compatible = "semtech,sx1509q" },
191 { .compatible = "semtech,sx1506q" },
192 { .compatible = "semtech,sx1502q" },
195 MODULE_DEVICE_TABLE(of, sx150x_of_match);
197 struct sx150x_chip *to_sx150x(struct gpio_chip *gc)
199 return container_of(gc, struct sx150x_chip, gpio_chip);
202 static s32 sx150x_i2c_write(struct i2c_client *client, u8 reg, u8 val)
204 s32 err = i2c_smbus_write_byte_data(client, reg, val);
207 dev_warn(&client->dev,
208 "i2c write fail: can't write %02x to %02x: %d\n",
213 static s32 sx150x_i2c_read(struct i2c_client *client, u8 reg, u8 *val)
215 s32 err = i2c_smbus_read_byte_data(client, reg);
220 dev_warn(&client->dev,
221 "i2c read fail: can't read from %02x: %d\n",
226 static inline bool offset_is_oscio(struct sx150x_chip *chip, unsigned offset)
228 return (chip->dev_cfg->ngpios == offset);
232 * These utility functions solve the common problem of locating and setting
233 * configuration bits. Configuration bits are grouped into registers
234 * whose indexes increase downwards. For example, with eight-bit registers,
235 * sixteen gpios would have their config bits grouped in the following order:
236 * REGISTER N-1 [ f e d c b a 9 8 ]
237 * N [ 7 6 5 4 3 2 1 0 ]
239 * For multi-bit configurations, the pattern gets wider:
240 * REGISTER N-3 [ f f e e d d c c ]
241 * N-2 [ b b a a 9 9 8 8 ]
242 * N-1 [ 7 7 6 6 5 5 4 4 ]
243 * N [ 3 3 2 2 1 1 0 0 ]
245 * Given the address of the starting register 'N', the index of the gpio
246 * whose configuration we seek to change, and the width in bits of that
247 * configuration, these functions allow us to locate the correct
248 * register and mask the correct bits.
250 static inline void sx150x_find_cfg(u8 offset, u8 width,
251 u8 *reg, u8 *mask, u8 *shift)
253 *reg -= offset * width / 8;
254 *mask = (1 << width) - 1;
255 *shift = (offset * width) % 8;
259 static s32 sx150x_write_cfg(struct sx150x_chip *chip,
260 u8 offset, u8 width, u8 reg, u8 val)
267 sx150x_find_cfg(offset, width, ®, &mask, &shift);
268 err = sx150x_i2c_read(chip->client, reg, &data);
273 data |= (val << shift) & mask;
274 return sx150x_i2c_write(chip->client, reg, data);
277 static int sx150x_get_io(struct sx150x_chip *chip, unsigned offset)
279 u8 reg = chip->dev_cfg->reg_data;
285 sx150x_find_cfg(offset, 1, ®, &mask, &shift);
286 err = sx150x_i2c_read(chip->client, reg, &data);
288 err = (data & mask) != 0 ? 1 : 0;
293 static void sx150x_set_oscio(struct sx150x_chip *chip, int val)
295 sx150x_i2c_write(chip->client,
296 chip->dev_cfg->pri.x789.reg_clock,
297 (val ? 0x1f : 0x10));
300 static void sx150x_set_io(struct sx150x_chip *chip, unsigned offset, int val)
302 sx150x_write_cfg(chip,
305 chip->dev_cfg->reg_data,
309 static int sx150x_io_input(struct sx150x_chip *chip, unsigned offset)
311 return sx150x_write_cfg(chip,
314 chip->dev_cfg->reg_dir,
318 static int sx150x_io_output(struct sx150x_chip *chip, unsigned offset, int val)
322 err = sx150x_write_cfg(chip,
325 chip->dev_cfg->reg_data,
328 err = sx150x_write_cfg(chip,
331 chip->dev_cfg->reg_dir,
336 static int sx150x_gpio_get(struct gpio_chip *gc, unsigned offset)
338 struct sx150x_chip *chip = to_sx150x(gc);
339 int status = -EINVAL;
341 if (!offset_is_oscio(chip, offset)) {
342 mutex_lock(&chip->lock);
343 status = sx150x_get_io(chip, offset);
344 mutex_unlock(&chip->lock);
350 static void sx150x_gpio_set(struct gpio_chip *gc, unsigned offset, int val)
352 struct sx150x_chip *chip = to_sx150x(gc);
354 mutex_lock(&chip->lock);
355 if (offset_is_oscio(chip, offset))
356 sx150x_set_oscio(chip, val);
358 sx150x_set_io(chip, offset, val);
359 mutex_unlock(&chip->lock);
362 static int sx150x_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
364 struct sx150x_chip *chip = to_sx150x(gc);
365 int status = -EINVAL;
367 if (!offset_is_oscio(chip, offset)) {
368 mutex_lock(&chip->lock);
369 status = sx150x_io_input(chip, offset);
370 mutex_unlock(&chip->lock);
375 static int sx150x_gpio_direction_output(struct gpio_chip *gc,
379 struct sx150x_chip *chip = to_sx150x(gc);
382 if (!offset_is_oscio(chip, offset)) {
383 mutex_lock(&chip->lock);
384 status = sx150x_io_output(chip, offset, val);
385 mutex_unlock(&chip->lock);
390 static void sx150x_irq_mask(struct irq_data *d)
392 struct sx150x_chip *chip = to_sx150x(irq_data_get_irq_chip_data(d));
393 unsigned n = d->hwirq;
395 chip->irq_masked |= (1 << n);
396 chip->irq_update = n;
399 static void sx150x_irq_unmask(struct irq_data *d)
401 struct sx150x_chip *chip = to_sx150x(irq_data_get_irq_chip_data(d));
402 unsigned n = d->hwirq;
404 chip->irq_masked &= ~(1 << n);
405 chip->irq_update = n;
408 static int sx150x_irq_set_type(struct irq_data *d, unsigned int flow_type)
410 struct sx150x_chip *chip = to_sx150x(irq_data_get_irq_chip_data(d));
413 if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
418 if (flow_type & IRQ_TYPE_EDGE_RISING)
420 if (flow_type & IRQ_TYPE_EDGE_FALLING)
423 chip->irq_sense &= ~(3UL << (n * 2));
424 chip->irq_sense |= val << (n * 2);
425 chip->irq_update = n;
429 static irqreturn_t sx150x_irq_thread_fn(int irq, void *dev_id)
431 struct sx150x_chip *chip = (struct sx150x_chip *)dev_id;
432 unsigned nhandled = 0;
439 for (i = (chip->dev_cfg->ngpios / 8) - 1; i >= 0; --i) {
440 err = sx150x_i2c_read(chip->client,
441 chip->dev_cfg->reg_irq_src - i,
446 sx150x_i2c_write(chip->client,
447 chip->dev_cfg->reg_irq_src - i,
449 for (n = 0; n < 8; ++n) {
450 if (val & (1 << n)) {
451 sub_irq = irq_find_mapping(
452 chip->gpio_chip.irqdomain,
454 handle_nested_irq(sub_irq);
460 return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE);
463 static void sx150x_irq_bus_lock(struct irq_data *d)
465 struct sx150x_chip *chip = to_sx150x(irq_data_get_irq_chip_data(d));
467 mutex_lock(&chip->lock);
470 static void sx150x_irq_bus_sync_unlock(struct irq_data *d)
472 struct sx150x_chip *chip = to_sx150x(irq_data_get_irq_chip_data(d));
475 if (chip->irq_update == NO_UPDATE_PENDING)
478 n = chip->irq_update;
479 chip->irq_update = NO_UPDATE_PENDING;
481 /* Avoid updates if nothing changed */
482 if (chip->dev_sense == chip->irq_sense &&
483 chip->dev_masked == chip->irq_masked)
486 chip->dev_sense = chip->irq_sense;
487 chip->dev_masked = chip->irq_masked;
489 if (chip->irq_masked & (1 << n)) {
490 sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 1);
491 sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, 0);
493 sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 0);
494 sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense,
495 chip->irq_sense >> (n * 2));
498 mutex_unlock(&chip->lock);
501 static void sx150x_init_chip(struct sx150x_chip *chip,
502 struct i2c_client *client,
503 kernel_ulong_t driver_data,
504 struct sx150x_platform_data *pdata)
506 mutex_init(&chip->lock);
508 chip->client = client;
509 chip->dev_cfg = &sx150x_devices[driver_data];
510 chip->gpio_chip.parent = &client->dev;
511 chip->gpio_chip.label = client->name;
512 chip->gpio_chip.direction_input = sx150x_gpio_direction_input;
513 chip->gpio_chip.direction_output = sx150x_gpio_direction_output;
514 chip->gpio_chip.get = sx150x_gpio_get;
515 chip->gpio_chip.set = sx150x_gpio_set;
516 chip->gpio_chip.base = pdata->gpio_base;
517 chip->gpio_chip.can_sleep = true;
518 chip->gpio_chip.ngpio = chip->dev_cfg->ngpios;
519 #ifdef CONFIG_OF_GPIO
520 chip->gpio_chip.of_node = client->dev.of_node;
521 chip->gpio_chip.of_gpio_n_cells = 2;
523 if (pdata->oscio_is_gpo)
524 ++chip->gpio_chip.ngpio;
526 chip->irq_chip.name = client->name;
527 chip->irq_chip.irq_mask = sx150x_irq_mask;
528 chip->irq_chip.irq_unmask = sx150x_irq_unmask;
529 chip->irq_chip.irq_set_type = sx150x_irq_set_type;
530 chip->irq_chip.irq_bus_lock = sx150x_irq_bus_lock;
531 chip->irq_chip.irq_bus_sync_unlock = sx150x_irq_bus_sync_unlock;
532 chip->irq_summary = -1;
534 chip->irq_masked = ~0;
536 chip->dev_masked = ~0;
538 chip->irq_update = NO_UPDATE_PENDING;
541 static int sx150x_init_io(struct sx150x_chip *chip, u8 base, u16 cfg)
546 for (n = 0; err >= 0 && n < (chip->dev_cfg->ngpios / 8); ++n)
547 err = sx150x_i2c_write(chip->client, base - n, cfg >> (n * 8));
551 static int sx150x_reset(struct sx150x_chip *chip)
555 err = i2c_smbus_write_byte_data(chip->client,
556 chip->dev_cfg->pri.x789.reg_reset,
561 err = i2c_smbus_write_byte_data(chip->client,
562 chip->dev_cfg->pri.x789.reg_reset,
567 static int sx150x_init_hw(struct sx150x_chip *chip,
568 struct sx150x_platform_data *pdata)
572 if (pdata->reset_during_probe) {
573 err = sx150x_reset(chip);
578 if (chip->dev_cfg->model == SX150X_789)
579 err = sx150x_i2c_write(chip->client,
580 chip->dev_cfg->pri.x789.reg_misc,
582 else if (chip->dev_cfg->model == SX150X_456)
583 err = sx150x_i2c_write(chip->client,
584 chip->dev_cfg->pri.x456.reg_advance,
587 err = sx150x_i2c_write(chip->client,
588 chip->dev_cfg->pri.x123.reg_advance,
593 err = sx150x_init_io(chip, chip->dev_cfg->reg_pullup,
594 pdata->io_pullup_ena);
598 err = sx150x_init_io(chip, chip->dev_cfg->reg_pulldn,
599 pdata->io_pulldn_ena);
603 if (chip->dev_cfg->model == SX150X_789) {
604 err = sx150x_init_io(chip,
605 chip->dev_cfg->pri.x789.reg_drain,
606 pdata->io_open_drain_ena);
610 err = sx150x_init_io(chip,
611 chip->dev_cfg->pri.x789.reg_polarity,
615 } else if (chip->dev_cfg->model == SX150X_456) {
616 /* Set all pins to work in normal mode */
617 err = sx150x_init_io(chip,
618 chip->dev_cfg->pri.x456.reg_pld_mode,
623 /* Set all pins to work in normal mode */
624 err = sx150x_init_io(chip,
625 chip->dev_cfg->pri.x123.reg_pld_mode,
632 if (pdata->oscio_is_gpo)
633 sx150x_set_oscio(chip, 0);
638 static int sx150x_install_irq_chip(struct sx150x_chip *chip,
644 chip->irq_summary = irq_summary;
645 chip->irq_base = irq_base;
647 /* Add gpio chip to irq subsystem */
648 err = gpiochip_irqchip_add(&chip->gpio_chip,
649 &chip->irq_chip, chip->irq_base,
650 handle_edge_irq, IRQ_TYPE_EDGE_BOTH);
652 dev_err(&chip->client->dev,
653 "could not connect irqchip to gpiochip\n");
657 err = devm_request_threaded_irq(&chip->client->dev,
658 irq_summary, NULL, sx150x_irq_thread_fn,
659 IRQF_ONESHOT | IRQF_SHARED | IRQF_TRIGGER_FALLING,
660 chip->irq_chip.name, chip);
662 chip->irq_summary = -1;
669 static int sx150x_probe(struct i2c_client *client,
670 const struct i2c_device_id *id)
672 static const u32 i2c_funcs = I2C_FUNC_SMBUS_BYTE_DATA |
673 I2C_FUNC_SMBUS_WRITE_WORD_DATA;
674 struct sx150x_platform_data *pdata;
675 struct sx150x_chip *chip;
678 pdata = dev_get_platdata(&client->dev);
682 if (!i2c_check_functionality(client->adapter, i2c_funcs))
685 chip = devm_kzalloc(&client->dev,
686 sizeof(struct sx150x_chip), GFP_KERNEL);
690 sx150x_init_chip(chip, client, id->driver_data, pdata);
691 rc = sx150x_init_hw(chip, pdata);
695 rc = gpiochip_add(&chip->gpio_chip);
699 if (pdata->irq_summary >= 0) {
700 rc = sx150x_install_irq_chip(chip,
704 goto probe_fail_post_gpiochip_add;
707 i2c_set_clientdata(client, chip);
710 probe_fail_post_gpiochip_add:
711 gpiochip_remove(&chip->gpio_chip);
715 static int sx150x_remove(struct i2c_client *client)
717 struct sx150x_chip *chip;
719 chip = i2c_get_clientdata(client);
720 gpiochip_remove(&chip->gpio_chip);
725 static struct i2c_driver sx150x_driver = {
728 .of_match_table = of_match_ptr(sx150x_of_match),
730 .probe = sx150x_probe,
731 .remove = sx150x_remove,
732 .id_table = sx150x_id,
735 static int __init sx150x_init(void)
737 return i2c_add_driver(&sx150x_driver);
739 subsys_initcall(sx150x_init);
741 static void __exit sx150x_exit(void)
743 return i2c_del_driver(&sx150x_driver);
745 module_exit(sx150x_exit);
747 MODULE_AUTHOR("Gregory Bean <gbean@codeaurora.org>");
748 MODULE_DESCRIPTION("Driver for Semtech SX150X I2C GPIO Expanders");
749 MODULE_LICENSE("GPL v2");