3 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
6 * Stefano Babic, DENX Software Engineering, <sbabic@denx.de>
8 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm/arch/imx-regs.h>
18 enum mxc_gpio_direction {
19 MXC_GPIO_DIRECTION_IN,
20 MXC_GPIO_DIRECTION_OUT,
23 #define GPIO_PER_BANK 32
25 struct mxc_gpio_plat {
27 struct gpio_regs *regs;
30 struct mxc_bank_info {
31 struct gpio_regs *regs;
34 #ifndef CONFIG_DM_GPIO
35 #define GPIO_TO_PORT(n) ((n) / 32)
37 /* GPIO port description */
38 static unsigned long gpio_ports[] = {
39 [0] = GPIO1_BASE_ADDR,
40 [1] = GPIO2_BASE_ADDR,
41 [2] = GPIO3_BASE_ADDR,
42 #if defined(CONFIG_SOC_MX25) || defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX51) || \
43 defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
44 [3] = GPIO4_BASE_ADDR,
46 #if defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
47 [4] = GPIO5_BASE_ADDR,
48 #ifndef CONFIG_SOX_MX6UL
49 [5] = GPIO6_BASE_ADDR,
52 #if defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
53 #ifndef CONFIG_SOC_MX6UL
54 [6] = GPIO7_BASE_ADDR,
59 static int mxc_gpio_direction(unsigned int gpio,
60 enum mxc_gpio_direction direction)
62 unsigned int port = GPIO_TO_PORT(gpio);
63 struct gpio_regs *regs;
66 if (port >= ARRAY_SIZE(gpio_ports)) {
67 printf("%s: Invalid GPIO %d\n", __func__, gpio);
73 regs = (struct gpio_regs *)gpio_ports[port];
75 l = readl(®s->gpio_dir);
78 case MXC_GPIO_DIRECTION_OUT:
81 case MXC_GPIO_DIRECTION_IN:
84 writel(l, ®s->gpio_dir);
89 int gpio_set_value(unsigned gpio, int value)
91 unsigned int port = GPIO_TO_PORT(gpio);
92 struct gpio_regs *regs;
95 if (port >= ARRAY_SIZE(gpio_ports)) {
96 printf("%s: Invalid GPIO %d\n", __func__, gpio);
102 regs = (struct gpio_regs *)gpio_ports[port];
104 l = readl(®s->gpio_dr);
109 writel(l, ®s->gpio_dr);
114 int gpio_get_value(unsigned gpio)
116 unsigned int port = GPIO_TO_PORT(gpio);
117 struct gpio_regs *regs;
120 if (port >= ARRAY_SIZE(gpio_ports)) {
121 printf("%s: Invalid GPIO %d\n", __func__, gpio);
127 regs = (struct gpio_regs *)gpio_ports[port];
129 if (readl(®s->gpio_dir) & (1 << gpio)) {
130 printf("WARNING: Reading status of output GPIO_%d_%d\n",
131 port - GPIO_TO_PORT(0), gpio);
132 val = (readl(®s->gpio_dr) >> gpio) & 0x01;
134 val = (readl(®s->gpio_psr) >> gpio) & 0x01;
139 int gpio_request(unsigned gpio, const char *label)
141 unsigned int port = GPIO_TO_PORT(gpio);
142 if (port >= ARRAY_SIZE(gpio_ports)) {
143 printf("%s: Invalid GPIO %d\n", __func__, gpio);
149 int gpio_free(unsigned gpio)
151 unsigned int port = GPIO_TO_PORT(gpio);
152 if (port >= ARRAY_SIZE(gpio_ports)) {
153 printf("%s: Invalid GPIO %d\n", __func__, gpio);
159 int gpio_direction_input(unsigned gpio)
161 return mxc_gpio_direction(gpio, MXC_GPIO_DIRECTION_IN);
164 int gpio_direction_output(unsigned gpio, int value)
166 int ret = gpio_set_value(gpio, value);
171 return mxc_gpio_direction(gpio, MXC_GPIO_DIRECTION_OUT);
175 #ifdef CONFIG_DM_GPIO
177 DECLARE_GLOBAL_DATA_PTR;
179 static int mxc_gpio_is_output(struct gpio_regs *regs, int offset)
183 val = readl(®s->gpio_dir);
185 return val & (1 << offset) ? 1 : 0;
188 static void mxc_gpio_bank_direction(struct gpio_regs *regs, int offset,
189 enum mxc_gpio_direction direction)
193 l = readl(®s->gpio_dir);
196 case MXC_GPIO_DIRECTION_OUT:
199 case MXC_GPIO_DIRECTION_IN:
202 writel(l, ®s->gpio_dir);
205 static void mxc_gpio_bank_set_value(struct gpio_regs *regs, int offset,
210 l = readl(®s->gpio_dr);
215 writel(l, ®s->gpio_dr);
218 static int mxc_gpio_bank_get_value(struct gpio_regs *regs, int offset)
220 return (readl(®s->gpio_psr) >> offset) & 0x01;
223 /* set GPIO pin 'gpio' as an input */
224 static int mxc_gpio_direction_input(struct udevice *dev, unsigned offset)
226 struct mxc_bank_info *bank = dev_get_priv(dev);
228 /* Configure GPIO direction as input. */
229 mxc_gpio_bank_direction(bank->regs, offset, MXC_GPIO_DIRECTION_IN);
234 /* set GPIO pin 'gpio' as an output, with polarity 'value' */
235 static int mxc_gpio_direction_output(struct udevice *dev, unsigned offset,
238 struct mxc_bank_info *bank = dev_get_priv(dev);
240 /* Configure GPIO output value. */
241 mxc_gpio_bank_set_value(bank->regs, offset, value);
243 /* Configure GPIO direction as output. */
244 mxc_gpio_bank_direction(bank->regs, offset, MXC_GPIO_DIRECTION_OUT);
249 /* read GPIO IN value of pin 'gpio' */
250 static int mxc_gpio_get_value(struct udevice *dev, unsigned offset)
252 struct mxc_bank_info *bank = dev_get_priv(dev);
254 return mxc_gpio_bank_get_value(bank->regs, offset);
257 /* write GPIO OUT value to pin 'gpio' */
258 static int mxc_gpio_set_value(struct udevice *dev, unsigned offset,
261 struct mxc_bank_info *bank = dev_get_priv(dev);
263 mxc_gpio_bank_set_value(bank->regs, offset, value);
268 static int mxc_gpio_get_function(struct udevice *dev, unsigned offset)
270 struct mxc_bank_info *bank = dev_get_priv(dev);
272 /* GPIOF_FUNC is not implemented yet */
273 if (mxc_gpio_is_output(bank->regs, offset))
279 static const struct dm_gpio_ops gpio_mxc_ops = {
280 .direction_input = mxc_gpio_direction_input,
281 .direction_output = mxc_gpio_direction_output,
282 .get_value = mxc_gpio_get_value,
283 .set_value = mxc_gpio_set_value,
284 .get_function = mxc_gpio_get_function,
287 static int mxc_gpio_probe(struct udevice *dev)
289 struct mxc_bank_info *bank = dev_get_priv(dev);
290 struct mxc_gpio_plat *plat = dev_get_platdata(dev);
291 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
295 banknum = plat->bank_index;
296 sprintf(name, "GPIO%d_", banknum + 1);
300 uc_priv->bank_name = str;
301 uc_priv->gpio_count = GPIO_PER_BANK;
302 bank->regs = plat->regs;
307 static int mxc_gpio_bind(struct udevice *dev)
309 struct mxc_gpio_plat *plat = dev->platdata;
313 * If platdata already exsits, directly return.
314 * Actually only when DT is not supported, platdata
315 * is statically initialized in U_BOOT_DEVICES.Here
321 addr = dev_get_addr(dev);
322 if (addr == FDT_ADDR_T_NONE)
327 * When every board is converted to driver model and DT is supported,
328 * this can be done by auto-alloc feature, but not using calloc
329 * to alloc memory for platdata.
331 plat = calloc(1, sizeof(*plat));
335 plat->regs = (struct gpio_regs *)addr;
336 plat->bank_index = dev->req_seq;
337 dev->platdata = plat;
342 static const struct udevice_id mxc_gpio_ids[] = {
343 { .compatible = "fsl,imx35-gpio" },
347 U_BOOT_DRIVER(gpio_mxc) = {
350 .ops = &gpio_mxc_ops,
351 .probe = mxc_gpio_probe,
352 .priv_auto_alloc_size = sizeof(struct mxc_bank_info),
353 .of_match = mxc_gpio_ids,
354 .bind = mxc_gpio_bind,
357 #if !CONFIG_IS_ENABLED(OF_CONTROL)
358 static const struct mxc_gpio_plat mxc_plat[] = {
359 { 0, (struct gpio_regs *)GPIO1_BASE_ADDR },
360 { 1, (struct gpio_regs *)GPIO2_BASE_ADDR },
361 { 2, (struct gpio_regs *)GPIO3_BASE_ADDR },
362 #if defined(CONFIG_SOC_MX25) || defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX51) || \
363 defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
364 { 3, (struct gpio_regs *)GPIO4_BASE_ADDR },
366 #if defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
367 { 4, (struct gpio_regs *)GPIO5_BASE_ADDR },
368 { 5, (struct gpio_regs *)GPIO6_BASE_ADDR },
370 #if defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
371 { 6, (struct gpio_regs *)GPIO7_BASE_ADDR },
375 U_BOOT_DEVICES(mxc_gpios) = {
376 { "gpio_mxc", &mxc_plat[0] },
377 { "gpio_mxc", &mxc_plat[1] },
378 { "gpio_mxc", &mxc_plat[2] },
379 #if defined(CONFIG_SOC_MX25) || defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX51) || \
380 defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
381 { "gpio_mxc", &mxc_plat[3] },
383 #if defined(CONFIG_SOC_MX27) || defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
384 { "gpio_mxc", &mxc_plat[4] },
385 { "gpio_mxc", &mxc_plat[5] },
387 #if defined(CONFIG_SOC_MX53) || defined(CONFIG_ARCH_MX6)
388 { "gpio_mxc", &mxc_plat[6] },