2 * (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net>
4 * Based on earlier arch/arm/cpu/armv7/sunxi/gpio.c:
6 * (C) Copyright 2007-2011
7 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
8 * Tom Cubie <tangliang@allwinnertech.com>
10 * SPDX-License-Identifier: GPL-2.0+
20 #include <dm/device-internal.h>
21 #ifdef CONFIG_AXP209_POWER
24 #ifdef CONFIG_AXP221_POWER
28 DECLARE_GLOBAL_DATA_PTR;
30 #define SUNXI_GPIOS_PER_BANK SUNXI_GPIO_A_NR
32 struct sunxi_gpio_platdata {
33 struct sunxi_gpio *regs;
34 const char *bank_name; /* Name of bank, e.g. "B" */
38 #ifndef CONFIG_DM_GPIO
39 static int sunxi_gpio_output(u32 pin, u32 val)
42 u32 bank = GPIO_BANK(pin);
43 u32 num = GPIO_NUM(pin);
44 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
46 dat = readl(&pio->dat);
52 writel(dat, &pio->dat);
57 static int sunxi_gpio_input(u32 pin)
60 u32 bank = GPIO_BANK(pin);
61 u32 num = GPIO_NUM(pin);
62 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
64 dat = readl(&pio->dat);
70 int gpio_request(unsigned gpio, const char *label)
75 int gpio_free(unsigned gpio)
80 int gpio_direction_input(unsigned gpio)
83 if (gpio >= SUNXI_GPIO_AXP0_START)
84 return axp_gpio_direction_input(gpio - SUNXI_GPIO_AXP0_START);
86 sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_INPUT);
91 int gpio_direction_output(unsigned gpio, int value)
94 if (gpio >= SUNXI_GPIO_AXP0_START)
95 return axp_gpio_direction_output(gpio - SUNXI_GPIO_AXP0_START,
98 sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_OUTPUT);
100 return sunxi_gpio_output(gpio, value);
103 int gpio_get_value(unsigned gpio)
106 if (gpio >= SUNXI_GPIO_AXP0_START)
107 return axp_gpio_get_value(gpio - SUNXI_GPIO_AXP0_START);
109 return sunxi_gpio_input(gpio);
112 int gpio_set_value(unsigned gpio, int value)
115 if (gpio >= SUNXI_GPIO_AXP0_START)
116 return axp_gpio_set_value(gpio - SUNXI_GPIO_AXP0_START, value);
118 return sunxi_gpio_output(gpio, value);
121 int sunxi_name_to_gpio(const char *name)
124 int groupsize = 9 * 32;
129 if (strncasecmp(name, "AXP0-", 5) == 0) {
131 if (strcmp(name, "VBUS-DETECT") == 0)
132 return SUNXI_GPIO_AXP0_START +
133 SUNXI_GPIO_AXP0_VBUS_DETECT;
134 if (strcmp(name, "VBUS-ENABLE") == 0)
135 return SUNXI_GPIO_AXP0_START +
136 SUNXI_GPIO_AXP0_VBUS_ENABLE;
137 pin = simple_strtol(name, &eptr, 10);
140 return SUNXI_GPIO_AXP0_START + pin;
143 if (*name == 'P' || *name == 'p')
146 group = *name - (*name > 'a' ? 'a' : 'A');
151 pin = simple_strtol(name, &eptr, 10);
154 if (pin < 0 || pin > groupsize || group >= 9)
156 return group * 32 + pin;
160 #ifdef CONFIG_DM_GPIO
161 static int sunxi_gpio_direction_input(struct udevice *dev, unsigned offset)
163 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
165 sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_INPUT);
170 static int sunxi_gpio_direction_output(struct udevice *dev, unsigned offset,
173 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
174 u32 num = GPIO_NUM(offset);
176 sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_OUTPUT);
177 clrsetbits_le32(&plat->regs->dat, 1 << num, value ? (1 << num) : 0);
182 static int sunxi_gpio_get_value(struct udevice *dev, unsigned offset)
184 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
185 u32 num = GPIO_NUM(offset);
188 dat = readl(&plat->regs->dat);
194 static int sunxi_gpio_set_value(struct udevice *dev, unsigned offset,
197 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
198 u32 num = GPIO_NUM(offset);
200 clrsetbits_le32(&plat->regs->dat, 1 << num, value ? (1 << num) : 0);
204 static int sunxi_gpio_get_function(struct udevice *dev, unsigned offset)
206 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
209 func = sunxi_gpio_get_cfgbank(plat->regs, offset);
210 if (func == SUNXI_GPIO_OUTPUT)
212 else if (func == SUNXI_GPIO_INPUT)
218 static const struct dm_gpio_ops gpio_sunxi_ops = {
219 .direction_input = sunxi_gpio_direction_input,
220 .direction_output = sunxi_gpio_direction_output,
221 .get_value = sunxi_gpio_get_value,
222 .set_value = sunxi_gpio_set_value,
223 .get_function = sunxi_gpio_get_function,
227 * Returns the name of a GPIO bank
229 * GPIO banks are named A, B, C, ...
231 * @bank: Bank number (0, 1..n-1)
232 * @return allocated string containing the name
234 static char *gpio_bank_name(int bank)
240 name[0] = 'A' + bank;
247 static int gpio_sunxi_probe(struct udevice *dev)
249 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
250 struct gpio_dev_priv *uc_priv = dev->uclass_priv;
252 /* Tell the uclass how many GPIOs we have */
254 uc_priv->gpio_count = plat->gpio_count;
255 uc_priv->bank_name = plat->bank_name;
261 * We have a top-level GPIO device with no actual GPIOs. It has a child
262 * device for each Sunxi bank.
264 static int gpio_sunxi_bind(struct udevice *parent)
266 struct sunxi_gpio_platdata *plat = parent->platdata;
267 struct sunxi_gpio_reg *ctlr;
271 /* If this is a child device, there is nothing to do here */
275 ctlr = (struct sunxi_gpio_reg *)fdtdec_get_addr(gd->fdt_blob,
276 parent->of_offset, "reg");
277 for (bank = 0; bank < SUNXI_GPIO_BANKS; bank++) {
278 struct sunxi_gpio_platdata *plat;
281 plat = calloc(1, sizeof(*plat));
284 plat->regs = &ctlr->gpio_bank[bank];
285 plat->bank_name = gpio_bank_name(bank);
286 plat->gpio_count = SUNXI_GPIOS_PER_BANK;
288 ret = device_bind(parent, parent->driver,
289 plat->bank_name, plat, -1, &dev);
292 dev->of_offset = parent->of_offset;
298 static const struct udevice_id sunxi_gpio_ids[] = {
299 { .compatible = "allwinner,sun7i-a20-pinctrl" },
303 U_BOOT_DRIVER(gpio_sunxi) = {
304 .name = "gpio_sunxi",
306 .ops = &gpio_sunxi_ops,
307 .of_match = sunxi_gpio_ids,
308 .bind = gpio_sunxi_bind,
309 .probe = gpio_sunxi_probe,