2 * (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net>
4 * Based on earlier arch/arm/cpu/armv7/sunxi/gpio.c:
6 * (C) Copyright 2007-2011
7 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
8 * Tom Cubie <tangliang@allwinnertech.com>
10 * SPDX-License-Identifier: GPL-2.0+
18 #include <asm/arch/gpio.h>
21 #include <dm/device-internal.h>
23 DECLARE_GLOBAL_DATA_PTR;
25 #define SUNXI_GPIOS_PER_BANK SUNXI_GPIO_A_NR
27 struct sunxi_gpio_platdata {
28 struct sunxi_gpio *regs;
29 const char *bank_name; /* Name of bank, e.g. "B" */
33 #ifndef CONFIG_DM_GPIO
34 static int sunxi_gpio_output(u32 pin, u32 val)
37 u32 bank = GPIO_BANK(pin);
38 u32 num = GPIO_NUM(pin);
39 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
41 dat = readl(&pio->dat);
47 writel(dat, &pio->dat);
52 static int sunxi_gpio_input(u32 pin)
55 u32 bank = GPIO_BANK(pin);
56 u32 num = GPIO_NUM(pin);
57 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
59 dat = readl(&pio->dat);
65 int gpio_request(unsigned gpio, const char *label)
70 int gpio_free(unsigned gpio)
75 int gpio_direction_input(unsigned gpio)
77 #if !defined CONFIG_SPL_BUILD && defined CONFIG_AXP_GPIO
78 if (gpio >= SUNXI_GPIO_AXP0_START)
79 return axp_gpio_direction_input(NULL, gpio - SUNXI_GPIO_AXP0_START);
81 sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_INPUT);
86 int gpio_direction_output(unsigned gpio, int value)
88 #if !defined CONFIG_SPL_BUILD && defined CONFIG_AXP_GPIO
89 if (gpio >= SUNXI_GPIO_AXP0_START)
90 return axp_gpio_direction_output(NULL, gpio - SUNXI_GPIO_AXP0_START,
93 sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_OUTPUT);
95 return sunxi_gpio_output(gpio, value);
98 int gpio_get_value(unsigned gpio)
100 #if !defined CONFIG_SPL_BUILD && defined CONFIG_AXP_GPIO
101 if (gpio >= SUNXI_GPIO_AXP0_START)
102 return axp_gpio_get_value(NULL, gpio - SUNXI_GPIO_AXP0_START);
104 return sunxi_gpio_input(gpio);
107 int gpio_set_value(unsigned gpio, int value)
109 #if !defined CONFIG_SPL_BUILD && defined CONFIG_AXP_GPIO
110 if (gpio >= SUNXI_GPIO_AXP0_START)
111 return axp_gpio_set_value(NULL, gpio - SUNXI_GPIO_AXP0_START, value);
113 return sunxi_gpio_output(gpio, value);
116 int sunxi_name_to_gpio(const char *name)
119 int groupsize = 9 * 32;
123 #if !defined CONFIG_SPL_BUILD && defined CONFIG_AXP_GPIO
124 if (strncasecmp(name, "AXP0-", 5) == 0) {
126 if (strcmp(name, "VBUS-DETECT") == 0)
127 return SUNXI_GPIO_AXP0_START +
128 SUNXI_GPIO_AXP0_VBUS_DETECT;
129 if (strcmp(name, "VBUS-ENABLE") == 0)
130 return SUNXI_GPIO_AXP0_START +
131 SUNXI_GPIO_AXP0_VBUS_ENABLE;
132 pin = simple_strtol(name, &eptr, 10);
135 return SUNXI_GPIO_AXP0_START + pin;
138 if (*name == 'P' || *name == 'p')
141 group = *name - (*name > 'a' ? 'a' : 'A');
146 pin = simple_strtol(name, &eptr, 10);
149 if (pin < 0 || pin > groupsize || group >= 9)
151 return group * 32 + pin;
155 int sunxi_name_to_gpio_bank(const char *name)
159 if (*name == 'P' || *name == 'p')
162 group = *name - (*name > 'a' ? 'a' : 'A');
169 #ifdef CONFIG_DM_GPIO
170 /* TODO(sjg@chromium.org): Remove this function and use device tree */
171 int sunxi_name_to_gpio(const char *name)
175 #if !defined CONFIG_SPL_BUILD && defined CONFIG_AXP_GPIO
178 if (strcasecmp(name, "AXP0-VBUS-DETECT") == 0) {
179 sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d",
180 SUNXI_GPIO_AXP0_VBUS_DETECT);
182 } else if (strcasecmp(name, "AXP0-VBUS-ENABLE") == 0) {
183 sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d",
184 SUNXI_GPIO_AXP0_VBUS_ENABLE);
188 ret = gpio_lookup_name(name, NULL, NULL, &gpio);
190 return ret ? ret : gpio;
193 static int sunxi_gpio_direction_input(struct udevice *dev, unsigned offset)
195 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
197 sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_INPUT);
202 static int sunxi_gpio_direction_output(struct udevice *dev, unsigned offset,
205 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
206 u32 num = GPIO_NUM(offset);
208 sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_OUTPUT);
209 clrsetbits_le32(&plat->regs->dat, 1 << num, value ? (1 << num) : 0);
214 static int sunxi_gpio_get_value(struct udevice *dev, unsigned offset)
216 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
217 u32 num = GPIO_NUM(offset);
220 dat = readl(&plat->regs->dat);
226 static int sunxi_gpio_set_value(struct udevice *dev, unsigned offset,
229 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
230 u32 num = GPIO_NUM(offset);
232 clrsetbits_le32(&plat->regs->dat, 1 << num, value ? (1 << num) : 0);
236 static int sunxi_gpio_get_function(struct udevice *dev, unsigned offset)
238 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
241 func = sunxi_gpio_get_cfgbank(plat->regs, offset);
242 if (func == SUNXI_GPIO_OUTPUT)
244 else if (func == SUNXI_GPIO_INPUT)
250 static const struct dm_gpio_ops gpio_sunxi_ops = {
251 .direction_input = sunxi_gpio_direction_input,
252 .direction_output = sunxi_gpio_direction_output,
253 .get_value = sunxi_gpio_get_value,
254 .set_value = sunxi_gpio_set_value,
255 .get_function = sunxi_gpio_get_function,
259 * Returns the name of a GPIO bank
261 * GPIO banks are named A, B, C, ...
263 * @bank: Bank number (0, 1..n-1)
264 * @return allocated string containing the name
266 static char *gpio_bank_name(int bank)
273 name[1] = 'A' + bank;
280 static int gpio_sunxi_probe(struct udevice *dev)
282 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
283 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
285 /* Tell the uclass how many GPIOs we have */
287 uc_priv->gpio_count = plat->gpio_count;
288 uc_priv->bank_name = plat->bank_name;
294 * We have a top-level GPIO device with no actual GPIOs. It has a child
295 * device for each Sunxi bank.
297 static int gpio_sunxi_bind(struct udevice *parent)
299 struct sunxi_gpio_platdata *plat = parent->platdata;
300 struct sunxi_gpio_reg *ctlr;
304 /* If this is a child device, there is nothing to do here */
308 ctlr = (struct sunxi_gpio_reg *)fdtdec_get_addr(gd->fdt_blob,
309 parent->of_offset, "reg");
310 for (bank = 0; bank < SUNXI_GPIO_BANKS; bank++) {
311 struct sunxi_gpio_platdata *plat;
314 plat = calloc(1, sizeof(*plat));
317 plat->regs = &ctlr->gpio_bank[bank];
318 plat->bank_name = gpio_bank_name(bank);
319 plat->gpio_count = SUNXI_GPIOS_PER_BANK;
321 ret = device_bind(parent, parent->driver,
322 plat->bank_name, plat, -1, &dev);
325 dev->of_offset = parent->of_offset;
331 static const struct udevice_id sunxi_gpio_ids[] = {
332 { .compatible = "allwinner,sun4i-a10-pinctrl" },
333 { .compatible = "allwinner,sun5i-a10s-pinctrl" },
334 { .compatible = "allwinner,sun5i-a13-pinctrl" },
335 { .compatible = "allwinner,sun6i-a31-pinctrl" },
336 { .compatible = "allwinner,sun6i-a31s-pinctrl" },
337 { .compatible = "allwinner,sun7i-a20-pinctrl" },
338 { .compatible = "allwinner,sun8i-a23-pinctrl" },
339 { .compatible = "allwinner,sun9i-a80-pinctrl" },
343 U_BOOT_DRIVER(gpio_sunxi) = {
344 .name = "gpio_sunxi",
346 .ops = &gpio_sunxi_ops,
347 .of_match = sunxi_gpio_ids,
348 .bind = gpio_sunxi_bind,
349 .probe = gpio_sunxi_probe,