2 * Copyright 2016 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
24 #ifndef PP_ATOMFWCTRL_H
25 #define PP_ATOMFWCTRL_H
29 #define GetIndexIntoMasterCmdTable(FieldName) \
30 (((char*)(&((struct atom_master_list_of_command_functions_v2_1*)0)->FieldName)-(char*)0)/sizeof(uint16_t))
31 #define GetIndexIntoMasterDataTable(FieldName) \
32 (((char*)(&((struct atom_master_list_of_data_tables_v2_1*)0)->FieldName)-(char*)0)/sizeof(uint16_t))
34 #define PP_ATOMFWCTRL_MAX_VOLTAGE_ENTRIES 32
36 struct pp_atomfwctrl_voltage_table_entry {
41 struct pp_atomfwctrl_voltage_table {
48 uint8_t telemetry_offset;
49 uint8_t telemetry_slope;
50 struct pp_atomfwctrl_voltage_table_entry entries[PP_ATOMFWCTRL_MAX_VOLTAGE_ENTRIES];
53 struct pp_atomfwctrl_gpio_pin_assignment {
54 uint16_t us_gpio_pin_aindex;
55 uint8_t uc_gpio_pin_bit_shift;
58 struct pp_atomfwctrl_clock_dividers_soc15 {
59 uint32_t ulClock; /* the actual clock */
60 uint32_t ulDid; /* DFS divider */
61 uint32_t ulPll_fb_mult; /* Feedback Multiplier: bit 8:0 int, bit 15:12 post_div, bit 31:16 frac */
62 uint32_t ulPll_ss_fbsmult; /* Spread FB Multiplier: bit 8:0 int, bit 31:16 frac */
63 uint16_t usPll_ss_slew_frac;
64 uint8_t ucPll_ss_enable;
66 uint32_t ulReserve[2];
69 struct pp_atomfwctrl_avfs_parameters {
73 uint32_t ulMeanNsigmaAcontant0;
74 uint32_t ulMeanNsigmaAcontant1;
75 uint32_t ulMeanNsigmaAcontant2;
76 uint16_t usMeanNsigmaDcTolSigma;
77 uint16_t usMeanNsigmaPlatformMean;
78 uint16_t usMeanNsigmaPlatformSigma;
79 uint32_t ulGbVdroopTableCksoffA0;
80 uint32_t ulGbVdroopTableCksoffA1;
81 uint32_t ulGbVdroopTableCksoffA2;
82 uint32_t ulGbVdroopTableCksonA0;
83 uint32_t ulGbVdroopTableCksonA1;
84 uint32_t ulGbVdroopTableCksonA2;
85 uint32_t ulGbFuseTableCksoffM1;
86 uint16_t usGbFuseTableCksoffM2;
87 uint32_t ulGbFuseTableCksoffB;\
88 uint32_t ulGbFuseTableCksonM1;
89 uint16_t usGbFuseTableCksonM2;
90 uint32_t ulGbFuseTableCksonB;
91 uint16_t usMaxVoltage025mv;
92 uint8_t ucEnableGbVdroopTableCksoff;
93 uint8_t ucEnableGbVdroopTableCkson;
94 uint8_t ucEnableGbFuseTableCksoff;
95 uint8_t ucEnableGbFuseTableCkson;
96 uint16_t usPsmAgeComfactor;
97 uint8_t ucEnableApplyAvfsCksoffVoltage;
98 uint32_t ulDispclk2GfxclkM1;
99 uint16_t usDispclk2GfxclkM2;
100 uint32_t ulDispclk2GfxclkB;
101 uint32_t ulDcefclk2GfxclkM1;
102 uint16_t usDcefclk2GfxclkM2;
103 uint32_t ulDcefclk2GfxclkB;
104 uint32_t ulPixelclk2GfxclkM1;
105 uint16_t usPixelclk2GfxclkM2;
106 uint32_t ulPixelclk2GfxclkB;
107 uint32_t ulPhyclk2GfxclkM1;
108 uint16_t usPhyclk2GfxclkM2;
109 uint32_t ulPhyclk2GfxclkB;
112 struct pp_atomfwctrl_gpio_parameters {
114 uint8_t ucAcDcPolarity;
115 uint8_t ucVR0HotGpio;
116 uint8_t ucVR0HotPolarity;
117 uint8_t ucVR1HotGpio;
118 uint8_t ucVR1HotPolarity;
120 uint8_t ucFwCtfPolarity;
122 int pp_atomfwctrl_get_gpu_pll_dividers_vega10(struct pp_hwmgr *hwmgr,
123 uint32_t clock_type, uint32_t clock_value,
124 struct pp_atomfwctrl_clock_dividers_soc15 *dividers);
125 int pp_atomfwctrl_enter_self_refresh(struct pp_hwmgr *hwmgr);
126 bool pp_atomfwctrl_get_pp_assign_pin(struct pp_hwmgr *hwmgr, const uint32_t pin_id,
127 struct pp_atomfwctrl_gpio_pin_assignment *gpio_pin_assignment);
129 int pp_atomfwctrl_get_voltage_table_v4(struct pp_hwmgr *hwmgr, uint8_t voltage_type,
130 uint8_t voltage_mode, struct pp_atomfwctrl_voltage_table *voltage_table);
131 bool pp_atomfwctrl_is_voltage_controlled_by_gpio_v4(struct pp_hwmgr *hwmgr,
132 uint8_t voltage_type, uint8_t voltage_mode);
134 int pp_atomfwctrl_get_avfs_information(struct pp_hwmgr *hwmgr,
135 struct pp_atomfwctrl_avfs_parameters *param);
136 int pp_atomfwctrl_get_gpio_information(struct pp_hwmgr *hwmgr,
137 struct pp_atomfwctrl_gpio_parameters *param);