drivers/gpu/drm/amd/powerplay/hwmgr/vega10_pptable.h

   1 /*
   2  * Copyright 2016 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23 #ifndef _VEGA10_PPTABLE_H_
  24 #define _VEGA10_PPTABLE_H_
  25
  26 #pragma pack(push, 1)
  27
  28 #define ATOM_VEGA10_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK 0x0f
  29 #define ATOM_VEGA10_PP_FANPARAMETERS_NOFAN                                 0x80
  30
  31 #define ATOM_VEGA10_PP_THERMALCONTROLLER_NONE      0
  32 #define ATOM_VEGA10_PP_THERMALCONTROLLER_LM96163   17
  33 #define ATOM_VEGA10_PP_THERMALCONTROLLER_VEGA10    24
  34
  35 #define ATOM_VEGA10_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL   0x89
  36 #define ATOM_VEGA10_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL   0x8D
  37
  38 #define ATOM_VEGA10_PP_PLATFORM_CAP_POWERPLAY                   0x1
  39 #define ATOM_VEGA10_PP_PLATFORM_CAP_SBIOSPOWERSOURCE            0x2
  40 #define ATOM_VEGA10_PP_PLATFORM_CAP_HARDWAREDC                  0x4
  41 #define ATOM_VEGA10_PP_PLATFORM_CAP_BACO                        0x8
  42 #define ATOM_VEGA10_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL 0x10
  43
  44
  45 /* ATOM_PPLIB_NONCLOCK_INFO::usClassification */
  46 #define ATOM_PPLIB_CLASSIFICATION_UI_MASK               0x0007
  47 #define ATOM_PPLIB_CLASSIFICATION_UI_SHIFT              0
  48 #define ATOM_PPLIB_CLASSIFICATION_UI_NONE               0
  49 #define ATOM_PPLIB_CLASSIFICATION_UI_BATTERY            1
  50 #define ATOM_PPLIB_CLASSIFICATION_UI_BALANCED           3
  51 #define ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE        5
  52 /* 2, 4, 6, 7 are reserved */
  53
  54 #define ATOM_PPLIB_CLASSIFICATION_BOOT                  0x0008
  55 #define ATOM_PPLIB_CLASSIFICATION_THERMAL               0x0010
  56 #define ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE    0x0020
  57 #define ATOM_PPLIB_CLASSIFICATION_REST                  0x0040
  58 #define ATOM_PPLIB_CLASSIFICATION_FORCED                0x0080
  59 #define ATOM_PPLIB_CLASSIFICATION_ACPI                  0x1000
  60
  61 /* ATOM_PPLIB_NONCLOCK_INFO::usClassification2 */
  62 #define ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2 0x0001
  63
  64 #define ATOM_Vega10_DISALLOW_ON_DC                   0x00004000
  65 #define ATOM_Vega10_ENABLE_VARIBRIGHT                0x00008000
  66
  67 #define ATOM_Vega10_TABLE_REVISION_VEGA10         8
  68
  69 #define ATOM_Vega10_VoltageMode_AVFS_Interpolate     0
  70 #define ATOM_Vega10_VoltageMode_AVFS_WorstCase       1
  71 #define ATOM_Vega10_VoltageMode_Static               2
  72
  73 typedef struct _ATOM_Vega10_POWERPLAYTABLE {
  74         struct atom_common_table_header sHeader;
  75         UCHAR  ucTableRevision;
  76         USHORT usTableSize;                        /* the size of header structure */
  77         ULONG  ulGoldenPPID;                       /* PPGen use only */
  78         ULONG  ulGoldenRevision;                   /* PPGen use only */
  79         USHORT usFormatID;                         /* PPGen use only */
  80         ULONG  ulPlatformCaps;                     /* See ATOM_Vega10_CAPS_* */
  81         ULONG  ulMaxODEngineClock;                 /* For Overdrive. */
  82         ULONG  ulMaxODMemoryClock;                 /* For Overdrive. */
  83         USHORT usPowerControlLimit;
  84         USHORT usUlvVoltageOffset;                 /* in mv units */
  85         USHORT usUlvSmnclkDid;
  86         USHORT usUlvMp1clkDid;
  87         USHORT usUlvGfxclkBypass;
  88         USHORT usGfxclkSlewRate;
  89         UCHAR  ucGfxVoltageMode;
  90         UCHAR  ucSocVoltageMode;
  91         UCHAR  ucUclkVoltageMode;
  92         UCHAR  ucUvdVoltageMode;
  93         UCHAR  ucVceVoltageMode;
  94         UCHAR  ucMp0VoltageMode;
  95         UCHAR  ucDcefVoltageMode;
  96         USHORT usStateArrayOffset;                 /* points to ATOM_Vega10_State_Array */
  97         USHORT usFanTableOffset;                   /* points to ATOM_Vega10_Fan_Table */
  98         USHORT usThermalControllerOffset;          /* points to ATOM_Vega10_Thermal_Controller */
  99         USHORT usSocclkDependencyTableOffset;      /* points to ATOM_Vega10_SOCCLK_Dependency_Table */
 100         USHORT usMclkDependencyTableOffset;        /* points to ATOM_Vega10_MCLK_Dependency_Table */
 101         USHORT usGfxclkDependencyTableOffset;      /* points to ATOM_Vega10_GFXCLK_Dependency_Table */
 102         USHORT usDcefclkDependencyTableOffset;     /* points to ATOM_Vega10_DCEFCLK_Dependency_Table */
 103         USHORT usVddcLookupTableOffset;            /* points to ATOM_Vega10_Voltage_Lookup_Table */
 104         USHORT usVddmemLookupTableOffset;          /* points to ATOM_Vega10_Voltage_Lookup_Table */
 105         USHORT usMMDependencyTableOffset;          /* points to ATOM_Vega10_MM_Dependency_Table */
 106         USHORT usVCEStateTableOffset;              /* points to ATOM_Vega10_VCE_State_Table */
 107         USHORT usReserve;                          /* No PPM Support for Vega10 */
 108         USHORT usPowerTuneTableOffset;             /* points to ATOM_Vega10_PowerTune_Table */
 109         USHORT usHardLimitTableOffset;             /* points to ATOM_Vega10_Hard_Limit_Table */
 110         USHORT usVddciLookupTableOffset;           /* points to ATOM_Vega10_Voltage_Lookup_Table */
 111         USHORT usPCIETableOffset;                  /* points to ATOM_Vega10_PCIE_Table */
 112         USHORT usPixclkDependencyTableOffset;      /* points to ATOM_Vega10_PIXCLK_Dependency_Table */
 113         USHORT usDispClkDependencyTableOffset;     /* points to ATOM_Vega10_DISPCLK_Dependency_Table */
 114         USHORT usPhyClkDependencyTableOffset;      /* points to ATOM_Vega10_PHYCLK_Dependency_Table */
 115 } ATOM_Vega10_POWERPLAYTABLE;
 116
 117 typedef struct _ATOM_Vega10_State {
 118         UCHAR  ucSocClockIndexHigh;
 119         UCHAR  ucSocClockIndexLow;
 120         UCHAR  ucGfxClockIndexHigh;
 121         UCHAR  ucGfxClockIndexLow;
 122         UCHAR  ucMemClockIndexHigh;
 123         UCHAR  ucMemClockIndexLow;
 124         USHORT usClassification;
 125         ULONG  ulCapsAndSettings;
 126         USHORT usClassification2;
 127 } ATOM_Vega10_State;
 128
 129 typedef struct _ATOM_Vega10_State_Array {
 130         UCHAR ucRevId;
 131         UCHAR ucNumEntries;                                         /* Number of entries. */
 132         ATOM_Vega10_State states[1];                             /* Dynamically allocate entries. */
 133 } ATOM_Vega10_State_Array;
 134
 135 typedef struct _ATOM_Vega10_CLK_Dependency_Record {
 136         ULONG  ulClk;                                               /* Frequency of Clock */
 137         UCHAR  ucVddInd;                                            /* Base voltage */
 138 } ATOM_Vega10_CLK_Dependency_Record;
 139
 140 typedef struct _ATOM_Vega10_GFXCLK_Dependency_Record {
 141         ULONG  ulClk;                                               /* Clock Frequency */
 142         UCHAR  ucVddInd;                                            /* SOC_VDD index */
 143         USHORT usCKSVOffsetandDisable;                              /* Bits 0~30: Voltage offset for CKS, Bit 31: Disable/enable for the GFXCLK level. */
 144         USHORT usAVFSOffset;                                        /* AVFS Voltage offset */
 145 } ATOM_Vega10_GFXCLK_Dependency_Record;
 146
 147 typedef struct _ATOM_Vega10_MCLK_Dependency_Record {
 148         ULONG  ulMemClk;                                            /* Clock Frequency */
 149         UCHAR  ucVddInd;                                            /* SOC_VDD index */
 150         UCHAR  ucVddMemInd;                                         /* MEM_VDD - only non zero for MCLK record */
 151         UCHAR  ucVddciInd;                                          /* VDDCI   = only non zero for MCLK record */
 152 } ATOM_Vega10_MCLK_Dependency_Record;
 153
 154 typedef struct _ATOM_Vega10_GFXCLK_Dependency_Table {
 155     UCHAR ucRevId;
 156     UCHAR ucNumEntries;                                         /* Number of entries. */
 157     ATOM_Vega10_GFXCLK_Dependency_Record entries[1];            /* Dynamically allocate entries. */
 158 } ATOM_Vega10_GFXCLK_Dependency_Table;
 159
 160 typedef struct _ATOM_Vega10_MCLK_Dependency_Table {
 161     UCHAR ucRevId;
 162     UCHAR ucNumEntries;                                         /* Number of entries. */
 163     ATOM_Vega10_MCLK_Dependency_Record entries[1];            /* Dynamically allocate entries. */
 164 } ATOM_Vega10_MCLK_Dependency_Table;
 165
 166 typedef struct _ATOM_Vega10_SOCCLK_Dependency_Table {
 167     UCHAR ucRevId;
 168     UCHAR ucNumEntries;                                         /* Number of entries. */
 169     ATOM_Vega10_CLK_Dependency_Record entries[1];            /* Dynamically allocate entries. */
 170 } ATOM_Vega10_SOCCLK_Dependency_Table;
 171
 172 typedef struct _ATOM_Vega10_DCEFCLK_Dependency_Table {
 173     UCHAR ucRevId;
 174     UCHAR ucNumEntries;                                         /* Number of entries. */
 175     ATOM_Vega10_CLK_Dependency_Record entries[1];            /* Dynamically allocate entries. */
 176 } ATOM_Vega10_DCEFCLK_Dependency_Table;
 177
 178 typedef struct _ATOM_Vega10_PIXCLK_Dependency_Table {
 179         UCHAR ucRevId;
 180         UCHAR ucNumEntries;                                         /* Number of entries. */
 181         ATOM_Vega10_CLK_Dependency_Record entries[1];            /* Dynamically allocate entries. */
 182 } ATOM_Vega10_PIXCLK_Dependency_Table;
 183
 184 typedef struct _ATOM_Vega10_DISPCLK_Dependency_Table {
 185         UCHAR ucRevId;
 186         UCHAR ucNumEntries;                                         /* Number of entries.*/
 187         ATOM_Vega10_CLK_Dependency_Record entries[1];            /* Dynamically allocate entries. */
 188 } ATOM_Vega10_DISPCLK_Dependency_Table;
 189
 190 typedef struct _ATOM_Vega10_PHYCLK_Dependency_Table {
 191         UCHAR ucRevId;
 192         UCHAR ucNumEntries;                                         /* Number of entries. */
 193         ATOM_Vega10_CLK_Dependency_Record entries[1];            /* Dynamically allocate entries. */
 194 } ATOM_Vega10_PHYCLK_Dependency_Table;
 195
 196 typedef struct _ATOM_Vega10_MM_Dependency_Record {
 197     UCHAR  ucVddcInd;                                           /* SOC_VDD voltage */
 198     ULONG  ulDClk;                                              /* UVD D-clock */
 199     ULONG  ulVClk;                                              /* UVD V-clock */
 200     ULONG  ulEClk;                                              /* VCE clock */
 201     ULONG  ulPSPClk;                                            /* PSP clock */
 202 } ATOM_Vega10_MM_Dependency_Record;
 203
 204 typedef struct _ATOM_Vega10_MM_Dependency_Table {
 205         UCHAR ucRevId;
 206         UCHAR ucNumEntries;                                         /* Number of entries */
 207         ATOM_Vega10_MM_Dependency_Record entries[1];             /* Dynamically allocate entries */
 208 } ATOM_Vega10_MM_Dependency_Table;
 209
 210 typedef struct _ATOM_Vega10_PCIE_Record {
 211         ULONG ulLCLK;                                               /* LClock */
 212         UCHAR ucPCIEGenSpeed;                                       /* PCIE Speed */
 213         UCHAR ucPCIELaneWidth;                                      /* PCIE Lane Width */
 214 } ATOM_Vega10_PCIE_Record;
 215
 216 typedef struct _ATOM_Vega10_PCIE_Table {
 217         UCHAR  ucRevId;
 218         UCHAR  ucNumEntries;                                        /* Number of entries */
 219         ATOM_Vega10_PCIE_Record entries[1];                      /* Dynamically allocate entries. */
 220 } ATOM_Vega10_PCIE_Table;
 221
 222 typedef struct _ATOM_Vega10_Voltage_Lookup_Record {
 223         USHORT usVdd;                                               /* Base voltage */
 224 } ATOM_Vega10_Voltage_Lookup_Record;
 225
 226 typedef struct _ATOM_Vega10_Voltage_Lookup_Table {
 227         UCHAR ucRevId;
 228         UCHAR ucNumEntries;                                          /* Number of entries */
 229         ATOM_Vega10_Voltage_Lookup_Record entries[1];             /* Dynamically allocate entries */
 230 } ATOM_Vega10_Voltage_Lookup_Table;
 231
 232 typedef struct _ATOM_Vega10_Fan_Table {
 233         UCHAR   ucRevId;                         /* Change this if the table format changes or version changes so that the other fields are not the same. */
 234         USHORT  usFanOutputSensitivity;          /* Sensitivity of fan reaction to temepature changes. */
 235         USHORT  usFanRPMMax;                     /* The default value in RPM. */
 236         USHORT  usThrottlingRPM;
 237         USHORT  usFanAcousticLimit;              /* Minimum Fan Controller Frequency Acoustic Limit. */
 238         USHORT  usTargetTemperature;             /* The default ideal temperature in Celcius. */
 239         USHORT  usMinimumPWMLimit;               /* The minimum PWM that the advanced fan controller can set. */
 240         USHORT  usTargetGfxClk;                   /* The ideal Fan Controller GFXCLK Frequency Acoustic Limit. */
 241         USHORT  usFanGainEdge;
 242         USHORT  usFanGainHotspot;
 243         USHORT  usFanGainLiquid;
 244         USHORT  usFanGainVrVddc;
 245         USHORT  usFanGainVrMvdd;
 246         USHORT  usFanGainPlx;
 247         USHORT  usFanGainHbm;
 248         UCHAR   ucEnableZeroRPM;
 249         USHORT  usFanStopTemperature;
 250         USHORT  usFanStartTemperature;
 251 } ATOM_Vega10_Fan_Table;
 252
 253 typedef struct _ATOM_Vega10_Fan_Table_V2 {
 254         UCHAR   ucRevId;
 255         USHORT  usFanOutputSensitivity;
 256         USHORT  usFanAcousticLimitRpm;
 257         USHORT  usThrottlingRPM;
 258         USHORT  usTargetTemperature;
 259         USHORT  usMinimumPWMLimit;
 260         USHORT  usTargetGfxClk;
 261         USHORT  usFanGainEdge;
 262         USHORT  usFanGainHotspot;
 263         USHORT  usFanGainLiquid;
 264         USHORT  usFanGainVrVddc;
 265         USHORT  usFanGainVrMvdd;
 266         USHORT  usFanGainPlx;
 267         USHORT  usFanGainHbm;
 268         UCHAR   ucEnableZeroRPM;
 269         USHORT  usFanStopTemperature;
 270         USHORT  usFanStartTemperature;
 271         UCHAR   ucFanParameters;
 272         UCHAR   ucFanMinRPM;
 273         UCHAR   ucFanMaxRPM;
 274 } ATOM_Vega10_Fan_Table_V2;
 275
 276 typedef struct _ATOM_Vega10_Thermal_Controller {
 277         UCHAR ucRevId;
 278         UCHAR ucType;           /* one of ATOM_VEGA10_PP_THERMALCONTROLLER_*/
 279         UCHAR ucI2cLine;        /* as interpreted by DAL I2C */
 280         UCHAR ucI2cAddress;
 281         UCHAR ucFanParameters;  /* Fan Control Parameters. */
 282         UCHAR ucFanMinRPM;      /* Fan Minimum RPM (hundreds) -- for display purposes only.*/
 283         UCHAR ucFanMaxRPM;      /* Fan Maximum RPM (hundreds) -- for display purposes only.*/
 284     UCHAR ucFlags;          /* to be defined */
 285 } ATOM_Vega10_Thermal_Controller;
 286
 287 typedef struct _ATOM_Vega10_VCE_State_Record
 288 {
 289     UCHAR  ucVCEClockIndex;         /*index into usVCEDependencyTableOffset of 'ATOM_Vega10_MM_Dependency_Table' type */
 290     UCHAR  ucFlag;                  /* 2 bits indicates memory p-states */
 291     UCHAR  ucSCLKIndex;             /* index into ATOM_Vega10_SCLK_Dependency_Table */
 292     UCHAR  ucMCLKIndex;             /* index into ATOM_Vega10_MCLK_Dependency_Table */
 293 } ATOM_Vega10_VCE_State_Record;
 294
 295 typedef struct _ATOM_Vega10_VCE_State_Table
 296 {
 297     UCHAR ucRevId;
 298     UCHAR ucNumEntries;
 299     ATOM_Vega10_VCE_State_Record entries[1];
 300 } ATOM_Vega10_VCE_State_Table;
 301
 302 typedef struct _ATOM_Vega10_PowerTune_Table {
 303         UCHAR  ucRevId;
 304         USHORT usSocketPowerLimit;
 305         USHORT usBatteryPowerLimit;
 306         USHORT usSmallPowerLimit;
 307         USHORT usTdcLimit;
 308         USHORT usEdcLimit;
 309         USHORT usSoftwareShutdownTemp;
 310         USHORT usTemperatureLimitHotSpot;
 311         USHORT usTemperatureLimitLiquid1;
 312         USHORT usTemperatureLimitLiquid2;
 313         USHORT usTemperatureLimitHBM;
 314         USHORT usTemperatureLimitVrSoc;
 315         USHORT usTemperatureLimitVrMem;
 316         USHORT usTemperatureLimitPlx;
 317         USHORT usLoadLineResistance;
 318         UCHAR  ucLiquid1_I2C_address;
 319         UCHAR  ucLiquid2_I2C_address;
 320         UCHAR  ucVr_I2C_address;
 321         UCHAR  ucPlx_I2C_address;
 322         UCHAR  ucLiquid_I2C_LineSCL;
 323         UCHAR  ucLiquid_I2C_LineSDA;
 324         UCHAR  ucVr_I2C_LineSCL;
 325         UCHAR  ucVr_I2C_LineSDA;
 326         UCHAR  ucPlx_I2C_LineSCL;
 327         UCHAR  ucPlx_I2C_LineSDA;
 328         USHORT usTemperatureLimitTedge;
 329 } ATOM_Vega10_PowerTune_Table;
 330
 331 typedef struct _ATOM_Vega10_PowerTune_Table_V2
 332 {
 333         UCHAR  ucRevId;
 334         USHORT usSocketPowerLimit;
 335         USHORT usBatteryPowerLimit;
 336         USHORT usSmallPowerLimit;
 337         USHORT usTdcLimit;
 338         USHORT usEdcLimit;
 339         USHORT usSoftwareShutdownTemp;
 340         USHORT usTemperatureLimitHotSpot;
 341         USHORT usTemperatureLimitLiquid1;
 342         USHORT usTemperatureLimitLiquid2;
 343         USHORT usTemperatureLimitHBM;
 344         USHORT usTemperatureLimitVrSoc;
 345         USHORT usTemperatureLimitVrMem;
 346         USHORT usTemperatureLimitPlx;
 347         USHORT usLoadLineResistance;
 348         UCHAR ucLiquid1_I2C_address;
 349         UCHAR ucLiquid2_I2C_address;
 350         UCHAR ucLiquid_I2C_Line;
 351         UCHAR ucVr_I2C_address;
 352         UCHAR ucVr_I2C_Line;
 353         UCHAR ucPlx_I2C_address;
 354         UCHAR ucPlx_I2C_Line;
 355         USHORT usTemperatureLimitTedge;
 356 } ATOM_Vega10_PowerTune_Table_V2;
 357
 358 typedef struct _ATOM_Vega10_Hard_Limit_Record {
 359     ULONG  ulSOCCLKLimit;
 360     ULONG  ulGFXCLKLimit;
 361     ULONG  ulMCLKLimit;
 362     USHORT usVddcLimit;
 363     USHORT usVddciLimit;
 364     USHORT usVddMemLimit;
 365 } ATOM_Vega10_Hard_Limit_Record;
 366
 367 typedef struct _ATOM_Vega10_Hard_Limit_Table
 368 {
 369     UCHAR ucRevId;
 370     UCHAR ucNumEntries;
 371     ATOM_Vega10_Hard_Limit_Record entries[1];
 372 } ATOM_Vega10_Hard_Limit_Table;
 373
 374 typedef struct _Vega10_PPTable_Generic_SubTable_Header
 375 {
 376     UCHAR  ucRevId;
 377 } Vega10_PPTable_Generic_SubTable_Header;
 378
 379 #pragma pack(pop)
 380
 381 #endif