2 * (C) COPYRIGHT 2016 ARM Limited. All rights reserved.
3 * Author: Liviu Dudau <Liviu.Dudau@arm.com>
5 * This program is free software and is provided to you under the terms of the
6 * GNU General Public License version 2 as published by the Free Software
7 * Foundation, and any use by you of this program is subject to the terms
10 * ARM Mali DP500/DP550/DP650 KMS/DRM driver
13 #include <linux/module.h>
14 #include <linux/clk.h>
15 #include <linux/component.h>
16 #include <linux/of_device.h>
17 #include <linux/of_graph.h>
18 #include <linux/of_reserved_mem.h>
21 #include <drm/drm_atomic.h>
22 #include <drm/drm_atomic_helper.h>
23 #include <drm/drm_crtc.h>
24 #include <drm/drm_crtc_helper.h>
25 #include <drm/drm_fb_cma_helper.h>
26 #include <drm/drm_gem_cma_helper.h>
27 #include <drm/drm_of.h>
29 #include "malidp_drv.h"
30 #include "malidp_regs.h"
31 #include "malidp_hw.h"
33 #define MALIDP_CONF_VALID_TIMEOUT 250
36 * set the "config valid" bit and wait until the hardware acts on it
38 static int malidp_set_and_wait_config_valid(struct drm_device *drm)
40 struct malidp_drm *malidp = drm->dev_private;
41 struct malidp_hw_device *hwdev = malidp->dev;
44 atomic_set(&malidp->config_valid, 0);
45 hwdev->set_config_valid(hwdev);
46 /* don't wait for config_valid flag if we are in config mode */
47 if (hwdev->in_config_mode(hwdev))
50 ret = wait_event_interruptible_timeout(malidp->wq,
51 atomic_read(&malidp->config_valid) == 1,
52 msecs_to_jiffies(MALIDP_CONF_VALID_TIMEOUT));
54 return (ret > 0) ? 0 : -ETIMEDOUT;
57 static void malidp_output_poll_changed(struct drm_device *drm)
59 struct malidp_drm *malidp = drm->dev_private;
61 drm_fbdev_cma_hotplug_event(malidp->fbdev);
64 static void malidp_atomic_commit_hw_done(struct drm_atomic_state *state)
66 struct drm_pending_vblank_event *event;
67 struct drm_device *drm = state->dev;
68 struct malidp_drm *malidp = drm->dev_private;
69 int ret = malidp_set_and_wait_config_valid(drm);
72 DRM_DEBUG_DRIVER("timed out waiting for updated configuration\n");
74 event = malidp->crtc.state->event;
76 malidp->crtc.state->event = NULL;
78 spin_lock_irq(&drm->event_lock);
79 if (drm_crtc_vblank_get(&malidp->crtc) == 0)
80 drm_crtc_arm_vblank_event(&malidp->crtc, event);
82 drm_crtc_send_vblank_event(&malidp->crtc, event);
83 spin_unlock_irq(&drm->event_lock);
85 drm_atomic_helper_commit_hw_done(state);
88 static void malidp_atomic_commit_tail(struct drm_atomic_state *state)
90 struct drm_device *drm = state->dev;
92 drm_atomic_helper_commit_modeset_disables(drm, state);
93 drm_atomic_helper_commit_modeset_enables(drm, state);
94 drm_atomic_helper_commit_planes(drm, state, 0);
96 malidp_atomic_commit_hw_done(state);
98 drm_atomic_helper_wait_for_vblanks(drm, state);
100 drm_atomic_helper_cleanup_planes(drm, state);
103 static const struct drm_mode_config_helper_funcs malidp_mode_config_helpers = {
104 .atomic_commit_tail = malidp_atomic_commit_tail,
107 static const struct drm_mode_config_funcs malidp_mode_config_funcs = {
108 .fb_create = drm_fb_cma_create,
109 .output_poll_changed = malidp_output_poll_changed,
110 .atomic_check = drm_atomic_helper_check,
111 .atomic_commit = drm_atomic_helper_commit,
114 static int malidp_init(struct drm_device *drm)
117 struct malidp_drm *malidp = drm->dev_private;
118 struct malidp_hw_device *hwdev = malidp->dev;
120 drm_mode_config_init(drm);
122 drm->mode_config.min_width = hwdev->min_line_size;
123 drm->mode_config.min_height = hwdev->min_line_size;
124 drm->mode_config.max_width = hwdev->max_line_size;
125 drm->mode_config.max_height = hwdev->max_line_size;
126 drm->mode_config.funcs = &malidp_mode_config_funcs;
127 drm->mode_config.helper_private = &malidp_mode_config_helpers;
129 ret = malidp_crtc_init(drm);
131 drm_mode_config_cleanup(drm);
138 static void malidp_fini(struct drm_device *drm)
140 malidp_de_planes_destroy(drm);
141 drm_mode_config_cleanup(drm);
144 static int malidp_irq_init(struct platform_device *pdev)
146 int irq_de, irq_se, ret = 0;
147 struct drm_device *drm = dev_get_drvdata(&pdev->dev);
149 /* fetch the interrupts from DT */
150 irq_de = platform_get_irq_byname(pdev, "DE");
152 DRM_ERROR("no 'DE' IRQ specified!\n");
155 irq_se = platform_get_irq_byname(pdev, "SE");
157 DRM_ERROR("no 'SE' IRQ specified!\n");
161 ret = malidp_de_irq_init(drm, irq_de);
165 ret = malidp_se_irq_init(drm, irq_se);
167 malidp_de_irq_fini(drm);
174 static void malidp_lastclose(struct drm_device *drm)
176 struct malidp_drm *malidp = drm->dev_private;
178 drm_fbdev_cma_restore_mode(malidp->fbdev);
181 DEFINE_DRM_GEM_CMA_FOPS(fops);
183 static struct drm_driver malidp_driver = {
184 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC |
186 .lastclose = malidp_lastclose,
187 .gem_free_object_unlocked = drm_gem_cma_free_object,
188 .gem_vm_ops = &drm_gem_cma_vm_ops,
189 .dumb_create = drm_gem_cma_dumb_create,
190 .dumb_map_offset = drm_gem_cma_dumb_map_offset,
191 .dumb_destroy = drm_gem_dumb_destroy,
192 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
193 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
194 .gem_prime_export = drm_gem_prime_export,
195 .gem_prime_import = drm_gem_prime_import,
196 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
197 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
198 .gem_prime_vmap = drm_gem_cma_prime_vmap,
199 .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
200 .gem_prime_mmap = drm_gem_cma_prime_mmap,
203 .desc = "ARM Mali Display Processor driver",
209 static const struct of_device_id malidp_drm_of_match[] = {
211 .compatible = "arm,mali-dp500",
212 .data = &malidp_device[MALIDP_500]
215 .compatible = "arm,mali-dp550",
216 .data = &malidp_device[MALIDP_550]
219 .compatible = "arm,mali-dp650",
220 .data = &malidp_device[MALIDP_650]
224 MODULE_DEVICE_TABLE(of, malidp_drm_of_match);
226 static bool malidp_is_compatible_hw_id(struct malidp_hw_device *hwdev,
227 const struct of_device_id *dev_id)
230 const char *compatstr_dp500 = "arm,mali-dp500";
235 * The DP500 CORE_ID register is in a different location, so check it
236 * first. If the product id field matches, then this is DP500, otherwise
237 * check the DP550/650 CORE_ID register.
239 core_id = malidp_hw_read(hwdev, MALIDP500_DC_BASE + MALIDP_DE_CORE_ID);
240 /* Offset 0x18 will never read 0x500 on products other than DP500. */
241 is_dp500 = (MALIDP_PRODUCT_ID(core_id) == 0x500);
242 dt_is_dp500 = strnstr(dev_id->compatible, compatstr_dp500,
243 sizeof(dev_id->compatible)) != NULL;
244 if (is_dp500 != dt_is_dp500) {
245 DRM_ERROR("Device-tree expects %s, but hardware %s DP500.\n",
246 dev_id->compatible, is_dp500 ? "is" : "is not");
248 } else if (!dt_is_dp500) {
252 core_id = malidp_hw_read(hwdev,
253 MALIDP550_DC_BASE + MALIDP_DE_CORE_ID);
254 product_id = MALIDP_PRODUCT_ID(core_id);
255 snprintf(buf, sizeof(buf), "arm,mali-dp%X", product_id);
256 if (!strnstr(dev_id->compatible, buf,
257 sizeof(dev_id->compatible))) {
258 DRM_ERROR("Device-tree expects %s, but hardware is DP%03X.\n",
259 dev_id->compatible, product_id);
266 static bool malidp_has_sufficient_address_space(const struct resource *res,
267 const struct of_device_id *dev_id)
269 resource_size_t res_size = resource_size(res);
270 const char *compatstr_dp500 = "arm,mali-dp500";
272 if (!strnstr(dev_id->compatible, compatstr_dp500,
273 sizeof(dev_id->compatible)))
274 return res_size >= MALIDP550_ADDR_SPACE_SIZE;
275 else if (res_size < MALIDP500_ADDR_SPACE_SIZE)
280 #define MAX_OUTPUT_CHANNELS 3
282 static int malidp_bind(struct device *dev)
284 struct resource *res;
285 struct drm_device *drm;
286 struct device_node *ep;
287 struct malidp_drm *malidp;
288 struct malidp_hw_device *hwdev;
289 struct platform_device *pdev = to_platform_device(dev);
290 struct of_device_id const *dev_id;
291 /* number of lines for the R, G and B output */
292 u8 output_width[MAX_OUTPUT_CHANNELS];
294 u32 version, out_depth = 0;
296 malidp = devm_kzalloc(dev, sizeof(*malidp), GFP_KERNEL);
300 hwdev = devm_kzalloc(dev, sizeof(*hwdev), GFP_KERNEL);
305 * copy the associated data from malidp_drm_of_match to avoid
306 * having to keep a reference to the OF node after binding
308 memcpy(hwdev, of_device_get_match_data(dev), sizeof(*hwdev));
312 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
313 hwdev->regs = devm_ioremap_resource(dev, res);
314 if (IS_ERR(hwdev->regs))
315 return PTR_ERR(hwdev->regs);
317 hwdev->pclk = devm_clk_get(dev, "pclk");
318 if (IS_ERR(hwdev->pclk))
319 return PTR_ERR(hwdev->pclk);
321 hwdev->aclk = devm_clk_get(dev, "aclk");
322 if (IS_ERR(hwdev->aclk))
323 return PTR_ERR(hwdev->aclk);
325 hwdev->mclk = devm_clk_get(dev, "mclk");
326 if (IS_ERR(hwdev->mclk))
327 return PTR_ERR(hwdev->mclk);
329 hwdev->pxlclk = devm_clk_get(dev, "pxlclk");
330 if (IS_ERR(hwdev->pxlclk))
331 return PTR_ERR(hwdev->pxlclk);
333 /* Get the optional framebuffer memory resource */
334 ret = of_reserved_mem_device_init(dev);
335 if (ret && ret != -ENODEV)
338 drm = drm_dev_alloc(&malidp_driver, dev);
344 /* Enable APB clock in order to get access to the registers */
345 clk_prepare_enable(hwdev->pclk);
347 * Enable AXI clock and main clock so that prefetch can start once
348 * the registers are set
350 clk_prepare_enable(hwdev->aclk);
351 clk_prepare_enable(hwdev->mclk);
353 dev_id = of_match_device(malidp_drm_of_match, dev);
359 if (!malidp_has_sufficient_address_space(res, dev_id)) {
360 DRM_ERROR("Insufficient address space in device-tree.\n");
365 if (!malidp_is_compatible_hw_id(hwdev, dev_id)) {
370 ret = hwdev->query_hw(hwdev);
372 DRM_ERROR("Invalid HW configuration\n");
376 version = malidp_hw_read(hwdev, hwdev->map.dc_base + MALIDP_DE_CORE_ID);
377 DRM_INFO("found ARM Mali-DP%3x version r%dp%d\n", version >> 16,
378 (version >> 12) & 0xf, (version >> 8) & 0xf);
380 /* set the number of lines used for output of RGB data */
381 ret = of_property_read_u8_array(dev->of_node,
382 "arm,malidp-output-port-lines",
383 output_width, MAX_OUTPUT_CHANNELS);
387 for (i = 0; i < MAX_OUTPUT_CHANNELS; i++)
388 out_depth = (out_depth << 8) | (output_width[i] & 0xf);
389 malidp_hw_write(hwdev, out_depth, hwdev->map.out_depth_base);
391 drm->dev_private = malidp;
392 dev_set_drvdata(dev, drm);
393 atomic_set(&malidp->config_valid, 0);
394 init_waitqueue_head(&malidp->wq);
396 ret = malidp_init(drm);
400 /* Set the CRTC's port so that the encoder component can find it */
401 ep = of_graph_get_next_endpoint(dev->of_node, NULL);
406 malidp->crtc.port = of_get_next_parent(ep);
408 ret = component_bind_all(dev, drm);
410 DRM_ERROR("Failed to bind all components\n");
414 ret = malidp_irq_init(pdev);
418 drm->irq_enabled = true;
420 ret = drm_vblank_init(drm, drm->mode_config.num_crtc);
422 DRM_ERROR("failed to initialise vblank\n");
426 drm_mode_config_reset(drm);
428 malidp->fbdev = drm_fbdev_cma_init(drm, 32,
429 drm->mode_config.num_connector);
431 if (IS_ERR(malidp->fbdev)) {
432 ret = PTR_ERR(malidp->fbdev);
433 malidp->fbdev = NULL;
437 drm_kms_helper_poll_init(drm);
439 ret = drm_dev_register(drm, 0);
447 drm_fbdev_cma_fini(malidp->fbdev);
448 malidp->fbdev = NULL;
451 drm_vblank_cleanup(drm);
453 malidp_se_irq_fini(drm);
454 malidp_de_irq_fini(drm);
455 drm->irq_enabled = false;
457 component_unbind_all(dev, drm);
459 of_node_put(malidp->crtc.port);
460 malidp->crtc.port = NULL;
464 drm->dev_private = NULL;
465 dev_set_drvdata(dev, NULL);
467 clk_disable_unprepare(hwdev->mclk);
468 clk_disable_unprepare(hwdev->aclk);
469 clk_disable_unprepare(hwdev->pclk);
472 of_reserved_mem_device_release(dev);
477 static void malidp_unbind(struct device *dev)
479 struct drm_device *drm = dev_get_drvdata(dev);
480 struct malidp_drm *malidp = drm->dev_private;
481 struct malidp_hw_device *hwdev = malidp->dev;
483 drm_dev_unregister(drm);
485 drm_fbdev_cma_fini(malidp->fbdev);
486 malidp->fbdev = NULL;
488 drm_kms_helper_poll_fini(drm);
489 malidp_se_irq_fini(drm);
490 malidp_de_irq_fini(drm);
491 drm_vblank_cleanup(drm);
492 component_unbind_all(dev, drm);
493 of_node_put(malidp->crtc.port);
494 malidp->crtc.port = NULL;
496 drm->dev_private = NULL;
497 dev_set_drvdata(dev, NULL);
498 clk_disable_unprepare(hwdev->mclk);
499 clk_disable_unprepare(hwdev->aclk);
500 clk_disable_unprepare(hwdev->pclk);
502 of_reserved_mem_device_release(dev);
505 static const struct component_master_ops malidp_master_ops = {
507 .unbind = malidp_unbind,
510 static int malidp_compare_dev(struct device *dev, void *data)
512 struct device_node *np = data;
514 return dev->of_node == np;
517 static int malidp_platform_probe(struct platform_device *pdev)
519 struct device_node *port, *ep;
520 struct component_match *match = NULL;
522 if (!pdev->dev.of_node)
525 /* there is only one output port inside each device, find it */
526 ep = of_graph_get_next_endpoint(pdev->dev.of_node, NULL);
530 if (!of_device_is_available(ep)) {
535 /* add the remote encoder port as component */
536 port = of_graph_get_remote_port_parent(ep);
538 if (!port || !of_device_is_available(port)) {
543 drm_of_component_match_add(&pdev->dev, &match, malidp_compare_dev,
546 return component_master_add_with_match(&pdev->dev, &malidp_master_ops,
550 static int malidp_platform_remove(struct platform_device *pdev)
552 component_master_del(&pdev->dev, &malidp_master_ops);
556 static struct platform_driver malidp_platform_driver = {
557 .probe = malidp_platform_probe,
558 .remove = malidp_platform_remove,
561 .of_match_table = malidp_drm_of_match,
565 module_platform_driver(malidp_platform_driver);
567 MODULE_AUTHOR("Liviu Dudau <Liviu.Dudau@arm.com>");
568 MODULE_DESCRIPTION("ARM Mali DP DRM driver");
569 MODULE_LICENSE("GPL v2");