drivers/gpu/drm/ast/ast_main.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  13  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  14  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  15  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  16  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  17  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  18  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  19  *
  20  * The above copyright notice and this permission notice (including the
  21  * next paragraph) shall be included in all copies or substantial portions
  22  * of the Software.
  23  *
  24  */
  25 /*
  26  * Authors: Dave Airlie <airlied@redhat.com>
  27  */
  28 #include <drm/drmP.h>
  29 #include "ast_drv.h"
  30
  31
  32 #include <drm/drm_fb_helper.h>
  33 #include <drm/drm_crtc_helper.h>
  34
  35 #include "ast_dram_tables.h"
  36
  37 void ast_set_index_reg_mask(struct ast_private *ast,
  38                             uint32_t base, uint8_t index,
  39                             uint8_t mask, uint8_t val)
  40 {
  41         u8 tmp;
  42         ast_io_write8(ast, base, index);
  43         tmp = (ast_io_read8(ast, base + 1) & mask) | val;
  44         ast_set_index_reg(ast, base, index, tmp);
  45 }
  46
  47 uint8_t ast_get_index_reg(struct ast_private *ast,
  48                           uint32_t base, uint8_t index)
  49 {
  50         uint8_t ret;
  51         ast_io_write8(ast, base, index);
  52         ret = ast_io_read8(ast, base + 1);
  53         return ret;
  54 }
  55
  56 uint8_t ast_get_index_reg_mask(struct ast_private *ast,
  57                                uint32_t base, uint8_t index, uint8_t mask)
  58 {
  59         uint8_t ret;
  60         ast_io_write8(ast, base, index);
  61         ret = ast_io_read8(ast, base + 1) & mask;
  62         return ret;
  63 }
  64
  65
  66 static int ast_detect_chip(struct drm_device *dev, bool *need_post)
  67 {
  68         struct ast_private *ast = dev->dev_private;
  69         uint32_t data, jreg;
  70         ast_open_key(ast);
  71
  72         if (dev->pdev->device == PCI_CHIP_AST1180) {
  73                 ast->chip = AST1100;
  74                 DRM_INFO("AST 1180 detected\n");
  75         } else {
  76                 if (dev->pdev->revision >= 0x30) {
  77                         ast->chip = AST2400;
  78                         DRM_INFO("AST 2400 detected\n");
  79                 } else if (dev->pdev->revision >= 0x20) {
  80                         ast->chip = AST2300;
  81                         DRM_INFO("AST 2300 detected\n");
  82                 } else if (dev->pdev->revision >= 0x10) {
  83                         uint32_t data;
  84                         ast_write32(ast, 0xf004, 0x1e6e0000);
  85                         ast_write32(ast, 0xf000, 0x1);
  86
  87                         data = ast_read32(ast, 0x1207c);
  88                         switch (data & 0x0300) {
  89                         case 0x0200:
  90                                 ast->chip = AST1100;
  91                                 DRM_INFO("AST 1100 detected\n");
  92                                 break;
  93                         case 0x0100:
  94                                 ast->chip = AST2200;
  95                                 DRM_INFO("AST 2200 detected\n");
  96                                 break;
  97                         case 0x0000:
  98                                 ast->chip = AST2150;
  99                                 DRM_INFO("AST 2150 detected\n");
 100                                 break;
 101                         default:
 102                                 ast->chip = AST2100;
 103                                 DRM_INFO("AST 2100 detected\n");
 104                                 break;
 105                         }
 106                         ast->vga2_clone = false;
 107                 } else {
 108                         ast->chip = AST2000;
 109                         DRM_INFO("AST 2000 detected\n");
 110                 }
 111         }
 112
 113         /*
 114          * If VGA isn't enabled, we need to enable now or subsequent
 115          * access to the scratch registers will fail. We also inform
 116          * our caller that it needs to POST the chip
 117          * (Assumption: VGA not enabled -> need to POST)
 118          */
 119         if (!ast_is_vga_enabled(dev)) {
 120                 ast_enable_vga(dev);
 121                 ast_enable_mmio(dev);
 122                 DRM_INFO("VGA not enabled on entry, requesting chip POST\n");
 123                 *need_post = true;
 124         } else
 125                 *need_post = false;
 126
 127         /* Check P2A Access */
 128         ast->DisableP2A = true;
 129         data = ast_read32(ast, 0xf004);
 130         if (data != 0xFFFFFFFF)
 131                 ast->DisableP2A = false;
 132
 133         /* Check if we support wide screen */
 134         switch (ast->chip) {
 135         case AST1180:
 136                 ast->support_wide_screen = true;
 137                 break;
 138         case AST2000:
 139                 ast->support_wide_screen = false;
 140                 break;
 141         default:
 142                 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff);
 143                 if (!(jreg & 0x80))
 144                         ast->support_wide_screen = true;
 145                 else if (jreg & 0x01)
 146                         ast->support_wide_screen = true;
 147                 else {
 148                         ast->support_wide_screen = false;
 149                         if (ast->DisableP2A == false) {
 150                                 /* Read SCU7c (silicon revision register) */
 151                                 ast_write32(ast, 0xf004, 0x1e6e0000);
 152                                 ast_write32(ast, 0xf000, 0x1);
 153                                 data = ast_read32(ast, 0x1207c);
 154                                 data &= 0x300;
 155                                 if (ast->chip == AST2300 && data == 0x0) /* ast1300 */
 156                                         ast->support_wide_screen = true;
 157                                 if (ast->chip == AST2400 && data == 0x100) /* ast1400 */
 158                                         ast->support_wide_screen = true;
 159                         }
 160                 }
 161                 break;
 162         }
 163
 164         /* Check 3rd Tx option (digital output afaik) */
 165         ast->tx_chip_type = AST_TX_NONE;
 166
 167         /*
 168          * VGACRA3 Enhanced Color Mode Register, check if DVO is already
 169          * enabled, in that case, assume we have a SIL164 TMDS transmitter
 170          *
 171          * Don't make that assumption if we the chip wasn't enabled and
 172          * is at power-on reset, otherwise we'll incorrectly "detect" a
 173          * SIL164 when there is none.
 174          */
 175         if (!*need_post) {
 176                 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xff);
 177                 if (jreg & 0x80)
 178                         ast->tx_chip_type = AST_TX_SIL164;
 179         }
 180
 181         if ((ast->chip == AST2300) || (ast->chip == AST2400)) {
 182                 /*
 183                  * On AST2300 and 2400, look the configuration set by the SoC in
 184                  * the SOC scratch register #1 bits 11:8 (interestingly marked
 185                  * as "reserved" in the spec)
 186                  */
 187                 jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd1, 0xff);
 188                 switch (jreg) {
 189                 case 0x04:
 190                         ast->tx_chip_type = AST_TX_SIL164;
 191                         break;
 192                 case 0x08:
 193                         ast->dp501_fw_addr = kzalloc(32*1024, GFP_KERNEL);
 194                         if (ast->dp501_fw_addr) {
 195                                 /* backup firmware */
 196                                 if (ast_backup_fw(dev, ast->dp501_fw_addr, 32*1024)) {
 197                                         kfree(ast->dp501_fw_addr);
 198                                         ast->dp501_fw_addr = NULL;
 199                                 }
 200                         }
 201                         /* fallthrough */
 202                 case 0x0c:
 203                         ast->tx_chip_type = AST_TX_DP501;
 204                 }
 205         }
 206
 207         /* Print stuff for diagnostic purposes */
 208         switch(ast->tx_chip_type) {
 209         case AST_TX_SIL164:
 210                 DRM_INFO("Using Sil164 TMDS transmitter\n");
 211                 break;
 212         case AST_TX_DP501:
 213                 DRM_INFO("Using DP501 DisplayPort transmitter\n");
 214                 break;
 215         default:
 216                 DRM_INFO("Analog VGA only\n");
 217         }
 218         return 0;
 219 }
 220
 221 static int ast_get_dram_info(struct drm_device *dev)
 222 {
 223         struct ast_private *ast = dev->dev_private;
 224         uint32_t data, data2;
 225         uint32_t denum, num, div, ref_pll;
 226
 227         if (ast->DisableP2A)
 228         {
 229                 ast->dram_bus_width = 16;
 230                 ast->dram_type = AST_DRAM_1Gx16;
 231                 ast->mclk = 396;
 232         }
 233         else
 234         {
 235                 ast_write32(ast, 0xf004, 0x1e6e0000);
 236                 ast_write32(ast, 0xf000, 0x1);
 237                 data = ast_read32(ast, 0x10004);
 238
 239                 if (data & 0x40)
 240                         ast->dram_bus_width = 16;
 241                 else
 242                         ast->dram_bus_width = 32;
 243
 244                 if (ast->chip == AST2300 || ast->chip == AST2400) {
 245                         switch (data & 0x03) {
 246                         case 0:
 247                                 ast->dram_type = AST_DRAM_512Mx16;
 248                                 break;
 249                         default:
 250                         case 1:
 251                                 ast->dram_type = AST_DRAM_1Gx16;
 252                                 break;
 253                         case 2:
 254                                 ast->dram_type = AST_DRAM_2Gx16;
 255                                 break;
 256                         case 3:
 257                                 ast->dram_type = AST_DRAM_4Gx16;
 258                                 break;
 259                         }
 260                 } else {
 261                         switch (data & 0x0c) {
 262                         case 0:
 263                         case 4:
 264                                 ast->dram_type = AST_DRAM_512Mx16;
 265                                 break;
 266                         case 8:
 267                                 if (data & 0x40)
 268                                         ast->dram_type = AST_DRAM_1Gx16;
 269                                 else
 270                                         ast->dram_type = AST_DRAM_512Mx32;
 271                                 break;
 272                         case 0xc:
 273                                 ast->dram_type = AST_DRAM_1Gx32;
 274                                 break;
 275                         }
 276                 }
 277
 278                 data = ast_read32(ast, 0x10120);
 279                 data2 = ast_read32(ast, 0x10170);
 280                 if (data2 & 0x2000)
 281                         ref_pll = 14318;
 282                 else
 283                         ref_pll = 12000;
 284
 285                 denum = data & 0x1f;
 286                 num = (data & 0x3fe0) >> 5;
 287                 data = (data & 0xc000) >> 14;
 288                 switch (data) {
 289                 case 3:
 290                         div = 0x4;
 291                         break;
 292                 case 2:
 293                 case 1:
 294                         div = 0x2;
 295                         break;
 296                 default:
 297                         div = 0x1;
 298                         break;
 299                 }
 300                 ast->mclk = ref_pll * (num + 2) / (denum + 2) * (div * 1000);
 301         }
 302         return 0;
 303 }
 304
 305 static void ast_user_framebuffer_destroy(struct drm_framebuffer *fb)
 306 {
 307         struct ast_framebuffer *ast_fb = to_ast_framebuffer(fb);
 308
 309         drm_gem_object_unreference_unlocked(ast_fb->obj);
 310         drm_framebuffer_cleanup(fb);
 311         kfree(fb);
 312 }
 313
 314 static const struct drm_framebuffer_funcs ast_fb_funcs = {
 315         .destroy = ast_user_framebuffer_destroy,
 316 };
 317
 318
 319 int ast_framebuffer_init(struct drm_device *dev,
 320                          struct ast_framebuffer *ast_fb,
 321                          const struct drm_mode_fb_cmd2 *mode_cmd,
 322                          struct drm_gem_object *obj)
 323 {
 324         int ret;
 325
 326         drm_helper_mode_fill_fb_struct(&ast_fb->base, mode_cmd);
 327         ast_fb->obj = obj;
 328         ret = drm_framebuffer_init(dev, &ast_fb->base, &ast_fb_funcs);
 329         if (ret) {
 330                 DRM_ERROR("framebuffer init failed %d\n", ret);
 331                 return ret;
 332         }
 333         return 0;
 334 }
 335
 336 static struct drm_framebuffer *
 337 ast_user_framebuffer_create(struct drm_device *dev,
 338                struct drm_file *filp,
 339                const struct drm_mode_fb_cmd2 *mode_cmd)
 340 {
 341         struct drm_gem_object *obj;
 342         struct ast_framebuffer *ast_fb;
 343         int ret;
 344
 345         obj = drm_gem_object_lookup(filp, mode_cmd->handles[0]);
 346         if (obj == NULL)
 347                 return ERR_PTR(-ENOENT);
 348
 349         ast_fb = kzalloc(sizeof(*ast_fb), GFP_KERNEL);
 350         if (!ast_fb) {
 351                 drm_gem_object_unreference_unlocked(obj);
 352                 return ERR_PTR(-ENOMEM);
 353         }
 354
 355         ret = ast_framebuffer_init(dev, ast_fb, mode_cmd, obj);
 356         if (ret) {
 357                 drm_gem_object_unreference_unlocked(obj);
 358                 kfree(ast_fb);
 359                 return ERR_PTR(ret);
 360         }
 361         return &ast_fb->base;
 362 }
 363
 364 static const struct drm_mode_config_funcs ast_mode_funcs = {
 365         .fb_create = ast_user_framebuffer_create,
 366 };
 367
 368 static u32 ast_get_vram_info(struct drm_device *dev)
 369 {
 370         struct ast_private *ast = dev->dev_private;
 371         u8 jreg;
 372         u32 vram_size;
 373         ast_open_key(ast);
 374
 375         vram_size = AST_VIDMEM_DEFAULT_SIZE;
 376         jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xaa, 0xff);
 377         switch (jreg & 3) {
 378         case 0: vram_size = AST_VIDMEM_SIZE_8M; break;
 379         case 1: vram_size = AST_VIDMEM_SIZE_16M; break;
 380         case 2: vram_size = AST_VIDMEM_SIZE_32M; break;
 381         case 3: vram_size = AST_VIDMEM_SIZE_64M; break;
 382         }
 383
 384         jreg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x99, 0xff);
 385         switch (jreg & 0x03) {
 386         case 1:
 387                 vram_size -= 0x100000;
 388                 break;
 389         case 2:
 390                 vram_size -= 0x200000;
 391                 break;
 392         case 3:
 393                 vram_size -= 0x400000;
 394                 break;
 395         }
 396
 397         return vram_size;
 398 }
 399
 400 int ast_driver_load(struct drm_device *dev, unsigned long flags)
 401 {
 402         struct ast_private *ast;
 403         bool need_post;
 404         int ret = 0;
 405
 406         ast = kzalloc(sizeof(struct ast_private), GFP_KERNEL);
 407         if (!ast)
 408                 return -ENOMEM;
 409
 410         dev->dev_private = ast;
 411         ast->dev = dev;
 412
 413         ast->regs = pci_iomap(dev->pdev, 1, 0);
 414         if (!ast->regs) {
 415                 ret = -EIO;
 416                 goto out_free;
 417         }
 418
 419         /*
 420          * If we don't have IO space at all, use MMIO now and
 421          * assume the chip has MMIO enabled by default (rev 0x20
 422          * and higher).
 423          */
 424         if (!(pci_resource_flags(dev->pdev, 2) & IORESOURCE_IO)) {
 425                 DRM_INFO("platform has no IO space, trying MMIO\n");
 426                 ast->ioregs = ast->regs + AST_IO_MM_OFFSET;
 427         }
 428
 429         /* "map" IO regs if the above hasn't done so already */
 430         if (!ast->ioregs) {
 431                 ast->ioregs = pci_iomap(dev->pdev, 2, 0);
 432                 if (!ast->ioregs) {
 433                         ret = -EIO;
 434                         goto out_free;
 435                 }
 436         }
 437
 438         ast_detect_chip(dev, &need_post);
 439
 440         if (ast->chip != AST1180) {
 441                 ret = ast_get_dram_info(dev);
 442                 if (ret)
 443                         goto out_free;
 444                 ast->vram_size = ast_get_vram_info(dev);
 445                 DRM_INFO("dram %d %d %d %08x\n", ast->mclk, ast->dram_type, ast->dram_bus_width, ast->vram_size);
 446         }
 447
 448         if (need_post)
 449                 ast_post_gpu(dev);
 450
 451         ret = ast_mm_init(ast);
 452         if (ret)
 453                 goto out_free;
 454
 455         drm_mode_config_init(dev);
 456
 457         dev->mode_config.funcs = (void *)&ast_mode_funcs;
 458         dev->mode_config.min_width = 0;
 459         dev->mode_config.min_height = 0;
 460         dev->mode_config.preferred_depth = 24;
 461         dev->mode_config.prefer_shadow = 1;
 462         dev->mode_config.fb_base = pci_resource_start(ast->dev->pdev, 0);
 463
 464         if (ast->chip == AST2100 ||
 465             ast->chip == AST2200 ||
 466             ast->chip == AST2300 ||
 467             ast->chip == AST2400 ||
 468             ast->chip == AST1180) {
 469                 dev->mode_config.max_width = 1920;
 470                 dev->mode_config.max_height = 2048;
 471         } else {
 472                 dev->mode_config.max_width = 1600;
 473                 dev->mode_config.max_height = 1200;
 474         }
 475
 476         ret = ast_mode_init(dev);
 477         if (ret)
 478                 goto out_free;
 479
 480         ret = ast_fbdev_init(dev);
 481         if (ret)
 482                 goto out_free;
 483
 484         return 0;
 485 out_free:
 486         kfree(ast);
 487         dev->dev_private = NULL;
 488         return ret;
 489 }
 490
 491 int ast_driver_unload(struct drm_device *dev)
 492 {
 493         struct ast_private *ast = dev->dev_private;
 494
 495         kfree(ast->dp501_fw_addr);
 496         ast_mode_fini(dev);
 497         ast_fbdev_fini(dev);
 498         drm_mode_config_cleanup(dev);
 499
 500         ast_mm_fini(ast);
 501         pci_iounmap(dev->pdev, ast->ioregs);
 502         pci_iounmap(dev->pdev, ast->regs);
 503         kfree(ast);
 504         return 0;
 505 }
 506
 507 int ast_gem_create(struct drm_device *dev,
 508                    u32 size, bool iskernel,
 509                    struct drm_gem_object **obj)
 510 {
 511         struct ast_bo *astbo;
 512         int ret;
 513
 514         *obj = NULL;
 515
 516         size = roundup(size, PAGE_SIZE);
 517         if (size == 0)
 518                 return -EINVAL;
 519
 520         ret = ast_bo_create(dev, size, 0, 0, &astbo);
 521         if (ret) {
 522                 if (ret != -ERESTARTSYS)
 523                         DRM_ERROR("failed to allocate GEM object\n");
 524                 return ret;
 525         }
 526         *obj = &astbo->gem;
 527         return 0;
 528 }
 529
 530 int ast_dumb_create(struct drm_file *file,
 531                     struct drm_device *dev,
 532                     struct drm_mode_create_dumb *args)
 533 {
 534         int ret;
 535         struct drm_gem_object *gobj;
 536         u32 handle;
 537
 538         args->pitch = args->width * ((args->bpp + 7) / 8);
 539         args->size = args->pitch * args->height;
 540
 541         ret = ast_gem_create(dev, args->size, false,
 542                              &gobj);
 543         if (ret)
 544                 return ret;
 545
 546         ret = drm_gem_handle_create(file, gobj, &handle);
 547         drm_gem_object_unreference_unlocked(gobj);
 548         if (ret)
 549                 return ret;
 550
 551         args->handle = handle;
 552         return 0;
 553 }
 554
 555 static void ast_bo_unref(struct ast_bo **bo)
 556 {
 557         struct ttm_buffer_object *tbo;
 558
 559         if ((*bo) == NULL)
 560                 return;
 561
 562         tbo = &((*bo)->bo);
 563         ttm_bo_unref(&tbo);
 564         *bo = NULL;
 565 }
 566
 567 void ast_gem_free_object(struct drm_gem_object *obj)
 568 {
 569         struct ast_bo *ast_bo = gem_to_ast_bo(obj);
 570
 571         ast_bo_unref(&ast_bo);
 572 }
 573
 574
 575 static inline u64 ast_bo_mmap_offset(struct ast_bo *bo)
 576 {
 577         return drm_vma_node_offset_addr(&bo->bo.vma_node);
 578 }
 579 int
 580 ast_dumb_mmap_offset(struct drm_file *file,
 581                      struct drm_device *dev,
 582                      uint32_t handle,
 583                      uint64_t *offset)
 584 {
 585         struct drm_gem_object *obj;
 586         struct ast_bo *bo;
 587
 588         obj = drm_gem_object_lookup(file, handle);
 589         if (obj == NULL)
 590                 return -ENOENT;
 591
 592         bo = gem_to_ast_bo(obj);
 593         *offset = ast_bo_mmap_offset(bo);
 594
 595         drm_gem_object_unreference_unlocked(obj);
 596
 597         return 0;
 598
 599 }
 600