2 * Copyright (C) 2014 Traphandler
3 * Copyright (C) 2014 Free Electrons
4 * Copyright (C) 2014 Atmel
6 * Author: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
7 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published by
11 * the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 * You should have received a copy of the GNU General Public License along with
19 * this program. If not, see <http://www.gnu.org/licenses/>.
22 #include <linux/clk.h>
23 #include <linux/irq.h>
24 #include <linux/irqchip.h>
25 #include <linux/module.h>
26 #include <linux/pm_runtime.h>
28 #include "atmel_hlcdc_dc.h"
30 #define ATMEL_HLCDC_LAYER_IRQS_OFFSET 8
32 static const struct atmel_hlcdc_layer_desc atmel_hlcdc_at91sam9n12_layers[] = {
35 .formats = &atmel_hlcdc_plane_rgb_formats,
38 .type = ATMEL_HLCDC_BASE_LAYER,
48 static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_at91sam9n12 = {
56 .conflicting_output_formats = true,
57 .nlayers = ARRAY_SIZE(atmel_hlcdc_at91sam9n12_layers),
58 .layers = atmel_hlcdc_at91sam9n12_layers,
61 static const struct atmel_hlcdc_layer_desc atmel_hlcdc_at91sam9x5_layers[] = {
64 .formats = &atmel_hlcdc_plane_rgb_formats,
67 .type = ATMEL_HLCDC_BASE_LAYER,
79 .formats = &atmel_hlcdc_plane_rgb_formats,
82 .type = ATMEL_HLCDC_OVERLAY_LAYER,
96 .name = "high-end-overlay",
97 .formats = &atmel_hlcdc_plane_rgb_and_yuv_formats,
100 .type = ATMEL_HLCDC_OVERLAY_LAYER,
110 .chroma_key_mask = 11,
111 .general_config = 12,
118 .formats = &atmel_hlcdc_plane_rgb_formats,
119 .regs_offset = 0x340,
121 .type = ATMEL_HLCDC_CURSOR_LAYER,
131 .chroma_key_mask = 8,
137 static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_at91sam9x5 = {
145 .conflicting_output_formats = true,
146 .nlayers = ARRAY_SIZE(atmel_hlcdc_at91sam9x5_layers),
147 .layers = atmel_hlcdc_at91sam9x5_layers,
150 static const struct atmel_hlcdc_layer_desc atmel_hlcdc_sama5d3_layers[] = {
153 .formats = &atmel_hlcdc_plane_rgb_formats,
156 .type = ATMEL_HLCDC_BASE_LAYER,
168 .formats = &atmel_hlcdc_plane_rgb_formats,
169 .regs_offset = 0x140,
171 .type = ATMEL_HLCDC_OVERLAY_LAYER,
180 .chroma_key_mask = 8,
186 .formats = &atmel_hlcdc_plane_rgb_formats,
187 .regs_offset = 0x240,
189 .type = ATMEL_HLCDC_OVERLAY_LAYER,
198 .chroma_key_mask = 8,
203 .name = "high-end-overlay",
204 .formats = &atmel_hlcdc_plane_rgb_and_yuv_formats,
205 .regs_offset = 0x340,
207 .type = ATMEL_HLCDC_OVERLAY_LAYER,
217 .chroma_key_mask = 11,
218 .general_config = 12,
229 .formats = &atmel_hlcdc_plane_rgb_formats,
230 .regs_offset = 0x440,
232 .type = ATMEL_HLCDC_CURSOR_LAYER,
243 .chroma_key_mask = 8,
250 static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_sama5d3 = {
258 .conflicting_output_formats = true,
259 .nlayers = ARRAY_SIZE(atmel_hlcdc_sama5d3_layers),
260 .layers = atmel_hlcdc_sama5d3_layers,
263 static const struct atmel_hlcdc_layer_desc atmel_hlcdc_sama5d4_layers[] = {
266 .formats = &atmel_hlcdc_plane_rgb_formats,
269 .type = ATMEL_HLCDC_BASE_LAYER,
281 .formats = &atmel_hlcdc_plane_rgb_formats,
282 .regs_offset = 0x140,
284 .type = ATMEL_HLCDC_OVERLAY_LAYER,
293 .chroma_key_mask = 8,
299 .formats = &atmel_hlcdc_plane_rgb_formats,
300 .regs_offset = 0x240,
302 .type = ATMEL_HLCDC_OVERLAY_LAYER,
311 .chroma_key_mask = 8,
316 .name = "high-end-overlay",
317 .formats = &atmel_hlcdc_plane_rgb_and_yuv_formats,
318 .regs_offset = 0x340,
320 .type = ATMEL_HLCDC_OVERLAY_LAYER,
330 .chroma_key_mask = 11,
331 .general_config = 12,
342 static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_sama5d4 = {
350 .nlayers = ARRAY_SIZE(atmel_hlcdc_sama5d4_layers),
351 .layers = atmel_hlcdc_sama5d4_layers,
353 static const struct of_device_id atmel_hlcdc_of_match[] = {
355 .compatible = "atmel,at91sam9n12-hlcdc",
356 .data = &atmel_hlcdc_dc_at91sam9n12,
359 .compatible = "atmel,at91sam9x5-hlcdc",
360 .data = &atmel_hlcdc_dc_at91sam9x5,
363 .compatible = "atmel,sama5d2-hlcdc",
364 .data = &atmel_hlcdc_dc_sama5d4,
367 .compatible = "atmel,sama5d3-hlcdc",
368 .data = &atmel_hlcdc_dc_sama5d3,
371 .compatible = "atmel,sama5d4-hlcdc",
372 .data = &atmel_hlcdc_dc_sama5d4,
376 MODULE_DEVICE_TABLE(of, atmel_hlcdc_of_match);
378 int atmel_hlcdc_dc_mode_valid(struct atmel_hlcdc_dc *dc,
379 struct drm_display_mode *mode)
381 int vfront_porch = mode->vsync_start - mode->vdisplay;
382 int vback_porch = mode->vtotal - mode->vsync_end;
383 int vsync_len = mode->vsync_end - mode->vsync_start;
384 int hfront_porch = mode->hsync_start - mode->hdisplay;
385 int hback_porch = mode->htotal - mode->hsync_end;
386 int hsync_len = mode->hsync_end - mode->hsync_start;
388 if (hsync_len > dc->desc->max_spw + 1 || hsync_len < 1)
391 if (vsync_len > dc->desc->max_spw + 1 || vsync_len < 1)
394 if (hfront_porch > dc->desc->max_hpw + 1 || hfront_porch < 1 ||
395 hback_porch > dc->desc->max_hpw + 1 || hback_porch < 1 ||
397 return MODE_H_ILLEGAL;
399 if (vfront_porch > dc->desc->max_vpw + 1 || vfront_porch < 1 ||
400 vback_porch > dc->desc->max_vpw || vback_porch < 0 ||
402 return MODE_V_ILLEGAL;
407 static void atmel_hlcdc_layer_irq(struct atmel_hlcdc_layer *layer)
412 if (layer->desc->type == ATMEL_HLCDC_BASE_LAYER ||
413 layer->desc->type == ATMEL_HLCDC_OVERLAY_LAYER ||
414 layer->desc->type == ATMEL_HLCDC_CURSOR_LAYER)
415 atmel_hlcdc_plane_irq(atmel_hlcdc_layer_to_plane(layer));
418 static irqreturn_t atmel_hlcdc_dc_irq_handler(int irq, void *data)
420 struct drm_device *dev = data;
421 struct atmel_hlcdc_dc *dc = dev->dev_private;
422 unsigned long status;
423 unsigned int imr, isr;
426 regmap_read(dc->hlcdc->regmap, ATMEL_HLCDC_IMR, &imr);
427 regmap_read(dc->hlcdc->regmap, ATMEL_HLCDC_ISR, &isr);
432 if (status & ATMEL_HLCDC_SOF)
433 atmel_hlcdc_crtc_irq(dc->crtc);
435 for (i = 0; i < ATMEL_HLCDC_MAX_LAYERS; i++) {
436 if (ATMEL_HLCDC_LAYER_STATUS(i) & status)
437 atmel_hlcdc_layer_irq(dc->layers[i]);
443 static struct drm_framebuffer *atmel_hlcdc_fb_create(struct drm_device *dev,
444 struct drm_file *file_priv, const struct drm_mode_fb_cmd2 *mode_cmd)
446 return drm_fb_cma_create(dev, file_priv, mode_cmd);
449 static void atmel_hlcdc_fb_output_poll_changed(struct drm_device *dev)
451 struct atmel_hlcdc_dc *dc = dev->dev_private;
454 drm_fbdev_cma_hotplug_event(dc->fbdev);
457 struct atmel_hlcdc_dc_commit {
458 struct work_struct work;
459 struct drm_device *dev;
460 struct drm_atomic_state *state;
464 atmel_hlcdc_dc_atomic_complete(struct atmel_hlcdc_dc_commit *commit)
466 struct drm_device *dev = commit->dev;
467 struct atmel_hlcdc_dc *dc = dev->dev_private;
468 struct drm_atomic_state *old_state = commit->state;
470 /* Apply the atomic update. */
471 drm_atomic_helper_commit_modeset_disables(dev, old_state);
472 drm_atomic_helper_commit_planes(dev, old_state, 0);
473 drm_atomic_helper_commit_modeset_enables(dev, old_state);
475 drm_atomic_helper_wait_for_vblanks(dev, old_state);
477 drm_atomic_helper_cleanup_planes(dev, old_state);
479 drm_atomic_state_put(old_state);
481 /* Complete the commit, wake up any waiter. */
482 spin_lock(&dc->commit.wait.lock);
483 dc->commit.pending = false;
484 wake_up_all_locked(&dc->commit.wait);
485 spin_unlock(&dc->commit.wait.lock);
490 static void atmel_hlcdc_dc_atomic_work(struct work_struct *work)
492 struct atmel_hlcdc_dc_commit *commit =
493 container_of(work, struct atmel_hlcdc_dc_commit, work);
495 atmel_hlcdc_dc_atomic_complete(commit);
498 static int atmel_hlcdc_dc_atomic_commit(struct drm_device *dev,
499 struct drm_atomic_state *state,
502 struct atmel_hlcdc_dc *dc = dev->dev_private;
503 struct atmel_hlcdc_dc_commit *commit;
506 ret = drm_atomic_helper_prepare_planes(dev, state);
510 /* Allocate the commit object. */
511 commit = kzalloc(sizeof(*commit), GFP_KERNEL);
517 INIT_WORK(&commit->work, atmel_hlcdc_dc_atomic_work);
519 commit->state = state;
521 spin_lock(&dc->commit.wait.lock);
522 ret = wait_event_interruptible_locked(dc->commit.wait,
523 !dc->commit.pending);
525 dc->commit.pending = true;
526 spin_unlock(&dc->commit.wait.lock);
533 /* Swap the state, this is the point of no return. */
534 drm_atomic_helper_swap_state(state, true);
536 drm_atomic_state_get(state);
538 queue_work(dc->wq, &commit->work);
540 atmel_hlcdc_dc_atomic_complete(commit);
545 drm_atomic_helper_cleanup_planes(dev, state);
549 static const struct drm_mode_config_funcs mode_config_funcs = {
550 .fb_create = atmel_hlcdc_fb_create,
551 .output_poll_changed = atmel_hlcdc_fb_output_poll_changed,
552 .atomic_check = drm_atomic_helper_check,
553 .atomic_commit = atmel_hlcdc_dc_atomic_commit,
556 static int atmel_hlcdc_dc_modeset_init(struct drm_device *dev)
558 struct atmel_hlcdc_dc *dc = dev->dev_private;
561 drm_mode_config_init(dev);
563 ret = atmel_hlcdc_create_outputs(dev);
565 dev_err(dev->dev, "failed to create HLCDC outputs: %d\n", ret);
569 ret = atmel_hlcdc_create_planes(dev);
571 dev_err(dev->dev, "failed to create planes: %d\n", ret);
575 ret = atmel_hlcdc_crtc_create(dev);
577 dev_err(dev->dev, "failed to create crtc\n");
581 dev->mode_config.min_width = dc->desc->min_width;
582 dev->mode_config.min_height = dc->desc->min_height;
583 dev->mode_config.max_width = dc->desc->max_width;
584 dev->mode_config.max_height = dc->desc->max_height;
585 dev->mode_config.funcs = &mode_config_funcs;
590 static int atmel_hlcdc_dc_load(struct drm_device *dev)
592 struct platform_device *pdev = to_platform_device(dev->dev);
593 const struct of_device_id *match;
594 struct atmel_hlcdc_dc *dc;
597 match = of_match_node(atmel_hlcdc_of_match, dev->dev->parent->of_node);
599 dev_err(&pdev->dev, "invalid compatible string\n");
604 dev_err(&pdev->dev, "invalid hlcdc description\n");
608 dc = devm_kzalloc(dev->dev, sizeof(*dc), GFP_KERNEL);
612 dc->wq = alloc_ordered_workqueue("atmel-hlcdc-dc", 0);
616 init_waitqueue_head(&dc->commit.wait);
617 dc->desc = match->data;
618 dc->hlcdc = dev_get_drvdata(dev->dev->parent);
619 dev->dev_private = dc;
621 ret = clk_prepare_enable(dc->hlcdc->periph_clk);
623 dev_err(dev->dev, "failed to enable periph_clk\n");
627 pm_runtime_enable(dev->dev);
629 ret = drm_vblank_init(dev, 1);
631 dev_err(dev->dev, "failed to initialize vblank\n");
632 goto err_periph_clk_disable;
635 ret = atmel_hlcdc_dc_modeset_init(dev);
637 dev_err(dev->dev, "failed to initialize mode setting\n");
638 goto err_periph_clk_disable;
641 drm_mode_config_reset(dev);
643 pm_runtime_get_sync(dev->dev);
644 ret = drm_irq_install(dev, dc->hlcdc->irq);
645 pm_runtime_put_sync(dev->dev);
647 dev_err(dev->dev, "failed to install IRQ handler\n");
648 goto err_periph_clk_disable;
651 platform_set_drvdata(pdev, dev);
653 dc->fbdev = drm_fbdev_cma_init(dev, 24,
654 dev->mode_config.num_connector);
655 if (IS_ERR(dc->fbdev))
658 drm_kms_helper_poll_init(dev);
662 err_periph_clk_disable:
663 pm_runtime_disable(dev->dev);
664 clk_disable_unprepare(dc->hlcdc->periph_clk);
667 destroy_workqueue(dc->wq);
672 static void atmel_hlcdc_dc_unload(struct drm_device *dev)
674 struct atmel_hlcdc_dc *dc = dev->dev_private;
677 drm_fbdev_cma_fini(dc->fbdev);
678 flush_workqueue(dc->wq);
679 drm_kms_helper_poll_fini(dev);
680 drm_mode_config_cleanup(dev);
681 drm_vblank_cleanup(dev);
683 pm_runtime_get_sync(dev->dev);
684 drm_irq_uninstall(dev);
685 pm_runtime_put_sync(dev->dev);
687 dev->dev_private = NULL;
689 pm_runtime_disable(dev->dev);
690 clk_disable_unprepare(dc->hlcdc->periph_clk);
691 destroy_workqueue(dc->wq);
694 static void atmel_hlcdc_dc_lastclose(struct drm_device *dev)
696 struct atmel_hlcdc_dc *dc = dev->dev_private;
698 drm_fbdev_cma_restore_mode(dc->fbdev);
701 static int atmel_hlcdc_dc_irq_postinstall(struct drm_device *dev)
703 struct atmel_hlcdc_dc *dc = dev->dev_private;
704 unsigned int cfg = 0;
707 /* Enable interrupts on activated layers */
708 for (i = 0; i < ATMEL_HLCDC_MAX_LAYERS; i++) {
710 cfg |= ATMEL_HLCDC_LAYER_STATUS(i);
713 regmap_write(dc->hlcdc->regmap, ATMEL_HLCDC_IER, cfg);
718 static void atmel_hlcdc_dc_irq_uninstall(struct drm_device *dev)
720 struct atmel_hlcdc_dc *dc = dev->dev_private;
723 regmap_write(dc->hlcdc->regmap, ATMEL_HLCDC_IDR, 0xffffffff);
724 regmap_read(dc->hlcdc->regmap, ATMEL_HLCDC_ISR, &isr);
727 DEFINE_DRM_GEM_CMA_FOPS(fops);
729 static struct drm_driver atmel_hlcdc_dc_driver = {
730 .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM |
731 DRIVER_MODESET | DRIVER_PRIME |
733 .lastclose = atmel_hlcdc_dc_lastclose,
734 .irq_handler = atmel_hlcdc_dc_irq_handler,
735 .irq_preinstall = atmel_hlcdc_dc_irq_uninstall,
736 .irq_postinstall = atmel_hlcdc_dc_irq_postinstall,
737 .irq_uninstall = atmel_hlcdc_dc_irq_uninstall,
738 .gem_free_object_unlocked = drm_gem_cma_free_object,
739 .gem_vm_ops = &drm_gem_cma_vm_ops,
740 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
741 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
742 .gem_prime_import = drm_gem_prime_import,
743 .gem_prime_export = drm_gem_prime_export,
744 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
745 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
746 .gem_prime_vmap = drm_gem_cma_prime_vmap,
747 .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
748 .gem_prime_mmap = drm_gem_cma_prime_mmap,
749 .dumb_create = drm_gem_cma_dumb_create,
750 .dumb_map_offset = drm_gem_cma_dumb_map_offset,
751 .dumb_destroy = drm_gem_dumb_destroy,
753 .name = "atmel-hlcdc",
754 .desc = "Atmel HLCD Controller DRM",
760 static int atmel_hlcdc_dc_drm_probe(struct platform_device *pdev)
762 struct drm_device *ddev;
765 ddev = drm_dev_alloc(&atmel_hlcdc_dc_driver, &pdev->dev);
767 return PTR_ERR(ddev);
769 ret = atmel_hlcdc_dc_load(ddev);
773 ret = drm_dev_register(ddev, 0);
780 atmel_hlcdc_dc_unload(ddev);
788 static int atmel_hlcdc_dc_drm_remove(struct platform_device *pdev)
790 struct drm_device *ddev = platform_get_drvdata(pdev);
792 drm_dev_unregister(ddev);
793 atmel_hlcdc_dc_unload(ddev);
799 #ifdef CONFIG_PM_SLEEP
800 static int atmel_hlcdc_dc_drm_suspend(struct device *dev)
802 struct drm_device *drm_dev = dev_get_drvdata(dev);
803 struct atmel_hlcdc_dc *dc = drm_dev->dev_private;
804 struct regmap *regmap = dc->hlcdc->regmap;
805 struct drm_atomic_state *state;
807 state = drm_atomic_helper_suspend(drm_dev);
809 return PTR_ERR(state);
811 dc->suspend.state = state;
813 regmap_read(regmap, ATMEL_HLCDC_IMR, &dc->suspend.imr);
814 regmap_write(regmap, ATMEL_HLCDC_IDR, dc->suspend.imr);
815 clk_disable_unprepare(dc->hlcdc->periph_clk);
820 static int atmel_hlcdc_dc_drm_resume(struct device *dev)
822 struct drm_device *drm_dev = dev_get_drvdata(dev);
823 struct atmel_hlcdc_dc *dc = drm_dev->dev_private;
825 clk_prepare_enable(dc->hlcdc->periph_clk);
826 regmap_write(dc->hlcdc->regmap, ATMEL_HLCDC_IER, dc->suspend.imr);
828 return drm_atomic_helper_resume(drm_dev, dc->suspend.state);
832 static SIMPLE_DEV_PM_OPS(atmel_hlcdc_dc_drm_pm_ops,
833 atmel_hlcdc_dc_drm_suspend, atmel_hlcdc_dc_drm_resume);
835 static const struct of_device_id atmel_hlcdc_dc_of_match[] = {
836 { .compatible = "atmel,hlcdc-display-controller" },
840 static struct platform_driver atmel_hlcdc_dc_platform_driver = {
841 .probe = atmel_hlcdc_dc_drm_probe,
842 .remove = atmel_hlcdc_dc_drm_remove,
844 .name = "atmel-hlcdc-display-controller",
845 .pm = &atmel_hlcdc_dc_drm_pm_ops,
846 .of_match_table = atmel_hlcdc_dc_of_match,
849 module_platform_driver(atmel_hlcdc_dc_platform_driver);
851 MODULE_AUTHOR("Jean-Jacques Hiblot <jjhiblot@traphandler.com>");
852 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>");
853 MODULE_DESCRIPTION("Atmel HLCDC Display Controller DRM Driver");
854 MODULE_LICENSE("GPL");
855 MODULE_ALIAS("platform:atmel-hlcdc-dc");