2 * Copyright (C) 2014 Traphandler
3 * Copyright (C) 2014 Free Electrons
4 * Copyright (C) 2014 Atmel
6 * Author: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
7 * Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published by
11 * the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
18 * You should have received a copy of the GNU General Public License along with
19 * this program. If not, see <http://www.gnu.org/licenses/>.
22 #include <linux/clk.h>
23 #include <linux/irq.h>
24 #include <linux/irqchip.h>
25 #include <linux/module.h>
26 #include <linux/pm_runtime.h>
28 #include "atmel_hlcdc_dc.h"
30 #define ATMEL_HLCDC_LAYER_IRQS_OFFSET 8
32 static const struct atmel_hlcdc_layer_desc atmel_hlcdc_at91sam9n12_layers[] = {
35 .formats = &atmel_hlcdc_plane_rgb_formats,
38 .type = ATMEL_HLCDC_BASE_LAYER,
48 static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_at91sam9n12 = {
56 .conflicting_output_formats = true,
57 .nlayers = ARRAY_SIZE(atmel_hlcdc_at91sam9n12_layers),
58 .layers = atmel_hlcdc_at91sam9n12_layers,
61 static const struct atmel_hlcdc_layer_desc atmel_hlcdc_at91sam9x5_layers[] = {
64 .formats = &atmel_hlcdc_plane_rgb_formats,
67 .type = ATMEL_HLCDC_BASE_LAYER,
79 .formats = &atmel_hlcdc_plane_rgb_formats,
82 .type = ATMEL_HLCDC_OVERLAY_LAYER,
96 .name = "high-end-overlay",
97 .formats = &atmel_hlcdc_plane_rgb_and_yuv_formats,
100 .type = ATMEL_HLCDC_OVERLAY_LAYER,
110 .chroma_key_mask = 11,
111 .general_config = 12,
117 .formats = &atmel_hlcdc_plane_rgb_formats,
118 .regs_offset = 0x340,
120 .type = ATMEL_HLCDC_CURSOR_LAYER,
130 .chroma_key_mask = 8,
136 static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_at91sam9x5 = {
144 .conflicting_output_formats = true,
145 .nlayers = ARRAY_SIZE(atmel_hlcdc_at91sam9x5_layers),
146 .layers = atmel_hlcdc_at91sam9x5_layers,
149 static const struct atmel_hlcdc_layer_desc atmel_hlcdc_sama5d3_layers[] = {
152 .formats = &atmel_hlcdc_plane_rgb_formats,
155 .type = ATMEL_HLCDC_BASE_LAYER,
167 .formats = &atmel_hlcdc_plane_rgb_formats,
168 .regs_offset = 0x140,
170 .type = ATMEL_HLCDC_OVERLAY_LAYER,
179 .chroma_key_mask = 8,
185 .formats = &atmel_hlcdc_plane_rgb_formats,
186 .regs_offset = 0x240,
188 .type = ATMEL_HLCDC_OVERLAY_LAYER,
197 .chroma_key_mask = 8,
202 .name = "high-end-overlay",
203 .formats = &atmel_hlcdc_plane_rgb_and_yuv_formats,
204 .regs_offset = 0x340,
206 .type = ATMEL_HLCDC_OVERLAY_LAYER,
216 .chroma_key_mask = 11,
217 .general_config = 12,
223 .formats = &atmel_hlcdc_plane_rgb_formats,
224 .regs_offset = 0x440,
226 .type = ATMEL_HLCDC_CURSOR_LAYER,
237 .chroma_key_mask = 8,
243 static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_sama5d3 = {
251 .conflicting_output_formats = true,
252 .nlayers = ARRAY_SIZE(atmel_hlcdc_sama5d3_layers),
253 .layers = atmel_hlcdc_sama5d3_layers,
256 static const struct atmel_hlcdc_layer_desc atmel_hlcdc_sama5d4_layers[] = {
259 .formats = &atmel_hlcdc_plane_rgb_formats,
262 .type = ATMEL_HLCDC_BASE_LAYER,
274 .formats = &atmel_hlcdc_plane_rgb_formats,
275 .regs_offset = 0x140,
277 .type = ATMEL_HLCDC_OVERLAY_LAYER,
286 .chroma_key_mask = 8,
292 .formats = &atmel_hlcdc_plane_rgb_formats,
293 .regs_offset = 0x240,
295 .type = ATMEL_HLCDC_OVERLAY_LAYER,
304 .chroma_key_mask = 8,
309 .name = "high-end-overlay",
310 .formats = &atmel_hlcdc_plane_rgb_and_yuv_formats,
311 .regs_offset = 0x340,
313 .type = ATMEL_HLCDC_OVERLAY_LAYER,
323 .chroma_key_mask = 11,
324 .general_config = 12,
330 static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_sama5d4 = {
338 .nlayers = ARRAY_SIZE(atmel_hlcdc_sama5d4_layers),
339 .layers = atmel_hlcdc_sama5d4_layers,
341 static const struct of_device_id atmel_hlcdc_of_match[] = {
343 .compatible = "atmel,at91sam9n12-hlcdc",
344 .data = &atmel_hlcdc_dc_at91sam9n12,
347 .compatible = "atmel,at91sam9x5-hlcdc",
348 .data = &atmel_hlcdc_dc_at91sam9x5,
351 .compatible = "atmel,sama5d2-hlcdc",
352 .data = &atmel_hlcdc_dc_sama5d4,
355 .compatible = "atmel,sama5d3-hlcdc",
356 .data = &atmel_hlcdc_dc_sama5d3,
359 .compatible = "atmel,sama5d4-hlcdc",
360 .data = &atmel_hlcdc_dc_sama5d4,
364 MODULE_DEVICE_TABLE(of, atmel_hlcdc_of_match);
366 int atmel_hlcdc_dc_mode_valid(struct atmel_hlcdc_dc *dc,
367 struct drm_display_mode *mode)
369 int vfront_porch = mode->vsync_start - mode->vdisplay;
370 int vback_porch = mode->vtotal - mode->vsync_end;
371 int vsync_len = mode->vsync_end - mode->vsync_start;
372 int hfront_porch = mode->hsync_start - mode->hdisplay;
373 int hback_porch = mode->htotal - mode->hsync_end;
374 int hsync_len = mode->hsync_end - mode->hsync_start;
376 if (hsync_len > dc->desc->max_spw + 1 || hsync_len < 1)
379 if (vsync_len > dc->desc->max_spw + 1 || vsync_len < 1)
382 if (hfront_porch > dc->desc->max_hpw + 1 || hfront_porch < 1 ||
383 hback_porch > dc->desc->max_hpw + 1 || hback_porch < 1 ||
385 return MODE_H_ILLEGAL;
387 if (vfront_porch > dc->desc->max_vpw + 1 || vfront_porch < 1 ||
388 vback_porch > dc->desc->max_vpw || vback_porch < 0 ||
390 return MODE_V_ILLEGAL;
395 static irqreturn_t atmel_hlcdc_dc_irq_handler(int irq, void *data)
397 struct drm_device *dev = data;
398 struct atmel_hlcdc_dc *dc = dev->dev_private;
399 unsigned long status;
400 unsigned int imr, isr;
403 regmap_read(dc->hlcdc->regmap, ATMEL_HLCDC_IMR, &imr);
404 regmap_read(dc->hlcdc->regmap, ATMEL_HLCDC_ISR, &isr);
409 if (status & ATMEL_HLCDC_SOF)
410 atmel_hlcdc_crtc_irq(dc->crtc);
412 for (i = 0; i < ATMEL_HLCDC_MAX_LAYERS; i++) {
413 struct atmel_hlcdc_layer *layer = dc->layers[i];
415 if (!(ATMEL_HLCDC_LAYER_STATUS(i) & status) || !layer)
418 atmel_hlcdc_layer_irq(layer);
424 static struct drm_framebuffer *atmel_hlcdc_fb_create(struct drm_device *dev,
425 struct drm_file *file_priv, const struct drm_mode_fb_cmd2 *mode_cmd)
427 return drm_fb_cma_create(dev, file_priv, mode_cmd);
430 static void atmel_hlcdc_fb_output_poll_changed(struct drm_device *dev)
432 struct atmel_hlcdc_dc *dc = dev->dev_private;
435 drm_fbdev_cma_hotplug_event(dc->fbdev);
437 dc->fbdev = drm_fbdev_cma_init(dev, 24,
438 dev->mode_config.num_crtc,
439 dev->mode_config.num_connector);
440 if (IS_ERR(dc->fbdev))
445 struct atmel_hlcdc_dc_commit {
446 struct work_struct work;
447 struct drm_device *dev;
448 struct drm_atomic_state *state;
452 atmel_hlcdc_dc_atomic_complete(struct atmel_hlcdc_dc_commit *commit)
454 struct drm_device *dev = commit->dev;
455 struct atmel_hlcdc_dc *dc = dev->dev_private;
456 struct drm_atomic_state *old_state = commit->state;
458 /* Apply the atomic update. */
459 drm_atomic_helper_commit_modeset_disables(dev, old_state);
460 drm_atomic_helper_commit_planes(dev, old_state, 0);
461 drm_atomic_helper_commit_modeset_enables(dev, old_state);
463 drm_atomic_helper_wait_for_vblanks(dev, old_state);
465 drm_atomic_helper_cleanup_planes(dev, old_state);
467 drm_atomic_state_put(old_state);
469 /* Complete the commit, wake up any waiter. */
470 spin_lock(&dc->commit.wait.lock);
471 dc->commit.pending = false;
472 wake_up_all_locked(&dc->commit.wait);
473 spin_unlock(&dc->commit.wait.lock);
478 static void atmel_hlcdc_dc_atomic_work(struct work_struct *work)
480 struct atmel_hlcdc_dc_commit *commit =
481 container_of(work, struct atmel_hlcdc_dc_commit, work);
483 atmel_hlcdc_dc_atomic_complete(commit);
486 static int atmel_hlcdc_dc_atomic_commit(struct drm_device *dev,
487 struct drm_atomic_state *state,
490 struct atmel_hlcdc_dc *dc = dev->dev_private;
491 struct atmel_hlcdc_dc_commit *commit;
494 ret = drm_atomic_helper_prepare_planes(dev, state);
498 /* Allocate the commit object. */
499 commit = kzalloc(sizeof(*commit), GFP_KERNEL);
505 INIT_WORK(&commit->work, atmel_hlcdc_dc_atomic_work);
507 commit->state = state;
509 spin_lock(&dc->commit.wait.lock);
510 ret = wait_event_interruptible_locked(dc->commit.wait,
511 !dc->commit.pending);
513 dc->commit.pending = true;
514 spin_unlock(&dc->commit.wait.lock);
521 /* Swap the state, this is the point of no return. */
522 drm_atomic_helper_swap_state(state, true);
524 drm_atomic_state_get(state);
526 queue_work(dc->wq, &commit->work);
528 atmel_hlcdc_dc_atomic_complete(commit);
533 drm_atomic_helper_cleanup_planes(dev, state);
537 static const struct drm_mode_config_funcs mode_config_funcs = {
538 .fb_create = atmel_hlcdc_fb_create,
539 .output_poll_changed = atmel_hlcdc_fb_output_poll_changed,
540 .atomic_check = drm_atomic_helper_check,
541 .atomic_commit = atmel_hlcdc_dc_atomic_commit,
544 static int atmel_hlcdc_dc_modeset_init(struct drm_device *dev)
546 struct atmel_hlcdc_dc *dc = dev->dev_private;
547 struct atmel_hlcdc_planes *planes;
551 drm_mode_config_init(dev);
553 ret = atmel_hlcdc_create_outputs(dev);
555 dev_err(dev->dev, "failed to create HLCDC outputs: %d\n", ret);
559 planes = atmel_hlcdc_create_planes(dev);
560 if (IS_ERR(planes)) {
561 dev_err(dev->dev, "failed to create planes\n");
562 return PTR_ERR(planes);
567 dc->layers[planes->primary->layer.desc->id] =
568 &planes->primary->layer;
571 dc->layers[planes->cursor->layer.desc->id] =
572 &planes->cursor->layer;
574 for (i = 0; i < planes->noverlays; i++)
575 dc->layers[planes->overlays[i]->layer.desc->id] =
576 &planes->overlays[i]->layer;
578 ret = atmel_hlcdc_crtc_create(dev);
580 dev_err(dev->dev, "failed to create crtc\n");
584 dev->mode_config.min_width = dc->desc->min_width;
585 dev->mode_config.min_height = dc->desc->min_height;
586 dev->mode_config.max_width = dc->desc->max_width;
587 dev->mode_config.max_height = dc->desc->max_height;
588 dev->mode_config.funcs = &mode_config_funcs;
593 static int atmel_hlcdc_dc_load(struct drm_device *dev)
595 struct platform_device *pdev = to_platform_device(dev->dev);
596 const struct of_device_id *match;
597 struct atmel_hlcdc_dc *dc;
600 match = of_match_node(atmel_hlcdc_of_match, dev->dev->parent->of_node);
602 dev_err(&pdev->dev, "invalid compatible string\n");
607 dev_err(&pdev->dev, "invalid hlcdc description\n");
611 dc = devm_kzalloc(dev->dev, sizeof(*dc), GFP_KERNEL);
615 dc->wq = alloc_ordered_workqueue("atmel-hlcdc-dc", 0);
619 init_waitqueue_head(&dc->commit.wait);
620 dc->desc = match->data;
621 dc->hlcdc = dev_get_drvdata(dev->dev->parent);
622 dev->dev_private = dc;
624 ret = clk_prepare_enable(dc->hlcdc->periph_clk);
626 dev_err(dev->dev, "failed to enable periph_clk\n");
630 pm_runtime_enable(dev->dev);
632 ret = drm_vblank_init(dev, 1);
634 dev_err(dev->dev, "failed to initialize vblank\n");
635 goto err_periph_clk_disable;
638 ret = atmel_hlcdc_dc_modeset_init(dev);
640 dev_err(dev->dev, "failed to initialize mode setting\n");
641 goto err_periph_clk_disable;
644 drm_mode_config_reset(dev);
646 pm_runtime_get_sync(dev->dev);
647 ret = drm_irq_install(dev, dc->hlcdc->irq);
648 pm_runtime_put_sync(dev->dev);
650 dev_err(dev->dev, "failed to install IRQ handler\n");
651 goto err_periph_clk_disable;
654 platform_set_drvdata(pdev, dev);
656 drm_kms_helper_poll_init(dev);
658 /* force connectors detection */
659 drm_helper_hpd_irq_event(dev);
663 err_periph_clk_disable:
664 pm_runtime_disable(dev->dev);
665 clk_disable_unprepare(dc->hlcdc->periph_clk);
668 destroy_workqueue(dc->wq);
673 static void atmel_hlcdc_dc_unload(struct drm_device *dev)
675 struct atmel_hlcdc_dc *dc = dev->dev_private;
678 drm_fbdev_cma_fini(dc->fbdev);
679 flush_workqueue(dc->wq);
680 drm_kms_helper_poll_fini(dev);
681 drm_mode_config_cleanup(dev);
682 drm_vblank_cleanup(dev);
684 pm_runtime_get_sync(dev->dev);
685 drm_irq_uninstall(dev);
686 pm_runtime_put_sync(dev->dev);
688 dev->dev_private = NULL;
690 pm_runtime_disable(dev->dev);
691 clk_disable_unprepare(dc->hlcdc->periph_clk);
692 destroy_workqueue(dc->wq);
695 static void atmel_hlcdc_dc_lastclose(struct drm_device *dev)
697 struct atmel_hlcdc_dc *dc = dev->dev_private;
699 drm_fbdev_cma_restore_mode(dc->fbdev);
702 static int atmel_hlcdc_dc_irq_postinstall(struct drm_device *dev)
704 struct atmel_hlcdc_dc *dc = dev->dev_private;
705 unsigned int cfg = 0;
708 /* Enable interrupts on activated layers */
709 for (i = 0; i < ATMEL_HLCDC_MAX_LAYERS; i++) {
711 cfg |= ATMEL_HLCDC_LAYER_STATUS(i);
714 regmap_write(dc->hlcdc->regmap, ATMEL_HLCDC_IER, cfg);
719 static void atmel_hlcdc_dc_irq_uninstall(struct drm_device *dev)
721 struct atmel_hlcdc_dc *dc = dev->dev_private;
724 regmap_write(dc->hlcdc->regmap, ATMEL_HLCDC_IDR, 0xffffffff);
725 regmap_read(dc->hlcdc->regmap, ATMEL_HLCDC_ISR, &isr);
728 static int atmel_hlcdc_dc_enable_vblank(struct drm_device *dev,
731 struct atmel_hlcdc_dc *dc = dev->dev_private;
733 /* Enable SOF (Start Of Frame) interrupt for vblank counting */
734 regmap_write(dc->hlcdc->regmap, ATMEL_HLCDC_IER, ATMEL_HLCDC_SOF);
739 static void atmel_hlcdc_dc_disable_vblank(struct drm_device *dev,
742 struct atmel_hlcdc_dc *dc = dev->dev_private;
744 regmap_write(dc->hlcdc->regmap, ATMEL_HLCDC_IDR, ATMEL_HLCDC_SOF);
747 static const struct file_operations fops = {
748 .owner = THIS_MODULE,
750 .release = drm_release,
751 .unlocked_ioctl = drm_ioctl,
752 .compat_ioctl = drm_compat_ioctl,
756 .mmap = drm_gem_cma_mmap,
759 static struct drm_driver atmel_hlcdc_dc_driver = {
760 .driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM |
761 DRIVER_MODESET | DRIVER_PRIME |
763 .lastclose = atmel_hlcdc_dc_lastclose,
764 .irq_handler = atmel_hlcdc_dc_irq_handler,
765 .irq_preinstall = atmel_hlcdc_dc_irq_uninstall,
766 .irq_postinstall = atmel_hlcdc_dc_irq_postinstall,
767 .irq_uninstall = atmel_hlcdc_dc_irq_uninstall,
768 .get_vblank_counter = drm_vblank_no_hw_counter,
769 .enable_vblank = atmel_hlcdc_dc_enable_vblank,
770 .disable_vblank = atmel_hlcdc_dc_disable_vblank,
771 .gem_free_object_unlocked = drm_gem_cma_free_object,
772 .gem_vm_ops = &drm_gem_cma_vm_ops,
773 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
774 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
775 .gem_prime_import = drm_gem_prime_import,
776 .gem_prime_export = drm_gem_prime_export,
777 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
778 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
779 .gem_prime_vmap = drm_gem_cma_prime_vmap,
780 .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
781 .gem_prime_mmap = drm_gem_cma_prime_mmap,
782 .dumb_create = drm_gem_cma_dumb_create,
783 .dumb_map_offset = drm_gem_cma_dumb_map_offset,
784 .dumb_destroy = drm_gem_dumb_destroy,
786 .name = "atmel-hlcdc",
787 .desc = "Atmel HLCD Controller DRM",
793 static int atmel_hlcdc_dc_drm_probe(struct platform_device *pdev)
795 struct drm_device *ddev;
798 ddev = drm_dev_alloc(&atmel_hlcdc_dc_driver, &pdev->dev);
800 return PTR_ERR(ddev);
802 ret = atmel_hlcdc_dc_load(ddev);
806 ret = drm_dev_register(ddev, 0);
813 atmel_hlcdc_dc_unload(ddev);
821 static int atmel_hlcdc_dc_drm_remove(struct platform_device *pdev)
823 struct drm_device *ddev = platform_get_drvdata(pdev);
825 drm_dev_unregister(ddev);
826 atmel_hlcdc_dc_unload(ddev);
832 #ifdef CONFIG_PM_SLEEP
833 static int atmel_hlcdc_dc_drm_suspend(struct device *dev)
835 struct drm_device *drm_dev = dev_get_drvdata(dev);
836 struct drm_crtc *crtc;
838 if (pm_runtime_suspended(dev))
841 drm_modeset_lock_all(drm_dev);
842 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head)
843 atmel_hlcdc_crtc_suspend(crtc);
844 drm_modeset_unlock_all(drm_dev);
848 static int atmel_hlcdc_dc_drm_resume(struct device *dev)
850 struct drm_device *drm_dev = dev_get_drvdata(dev);
851 struct drm_crtc *crtc;
853 if (pm_runtime_suspended(dev))
856 drm_modeset_lock_all(drm_dev);
857 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head)
858 atmel_hlcdc_crtc_resume(crtc);
859 drm_modeset_unlock_all(drm_dev);
864 static SIMPLE_DEV_PM_OPS(atmel_hlcdc_dc_drm_pm_ops,
865 atmel_hlcdc_dc_drm_suspend, atmel_hlcdc_dc_drm_resume);
867 static const struct of_device_id atmel_hlcdc_dc_of_match[] = {
868 { .compatible = "atmel,hlcdc-display-controller" },
872 static struct platform_driver atmel_hlcdc_dc_platform_driver = {
873 .probe = atmel_hlcdc_dc_drm_probe,
874 .remove = atmel_hlcdc_dc_drm_remove,
876 .name = "atmel-hlcdc-display-controller",
877 .pm = &atmel_hlcdc_dc_drm_pm_ops,
878 .of_match_table = atmel_hlcdc_dc_of_match,
881 module_platform_driver(atmel_hlcdc_dc_platform_driver);
883 MODULE_AUTHOR("Jean-Jacques Hiblot <jjhiblot@traphandler.com>");
884 MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>");
885 MODULE_DESCRIPTION("Atmel HLCDC Display Controller DRM Driver");
886 MODULE_LICENSE("GPL");
887 MODULE_ALIAS("platform:atmel-hlcdc-dc");