2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 * Copyright 2010 Red Hat, Inc.
7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
11 * Permission is hereby granted, free of charge, to any person obtaining a
12 * copy of this software and associated documentation files (the "Software"),
13 * to deal in the Software without restriction, including without limitation
14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
15 * and/or sell copies of the Software, and to permit persons to whom the
16 * Software is furnished to do so, subject to the following conditions:
18 * The above copyright notice and this permission notice (including the
19 * next paragraph) shall be included in all copies or substantial portions
22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
28 * DEALINGS IN THE SOFTWARE.
30 #include <linux/kernel.h>
31 #include <linux/slab.h>
32 #include <linux/hdmi.h>
33 #include <linux/i2c.h>
34 #include <linux/module.h>
36 #include <drm/drm_edid.h>
38 #define version_greater(edid, maj, min) \
39 (((edid)->version > (maj)) || \
40 ((edid)->version == (maj) && (edid)->revision > (min)))
42 #define EDID_EST_TIMINGS 16
43 #define EDID_STD_TIMINGS 8
44 #define EDID_DETAILED_TIMINGS 4
47 * EDID blocks out in the wild have a variety of bugs, try to collect
48 * them here (note that userspace may work around broken monitors first,
49 * but fixes should make their way here so that the kernel "just works"
50 * on as many displays as possible).
53 /* First detailed mode wrong, use largest 60Hz mode */
54 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
55 /* Reported 135MHz pixel clock is too high, needs adjustment */
56 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1)
57 /* Prefer the largest mode at 75 Hz */
58 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2)
59 /* Detail timing is in cm not mm */
60 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3)
61 /* Detailed timing descriptors have bogus size values, so just take the
62 * maximum size and use that.
64 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4)
65 /* Monitor forgot to set the first detailed is preferred bit. */
66 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5)
67 /* use +hsync +vsync for detailed mode */
68 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6)
69 /* Force reduced-blanking timings for detailed modes */
70 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7)
72 struct detailed_mode_closure {
73 struct drm_connector *connector;
85 static struct edid_quirk {
89 } edid_quirk_list[] = {
91 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
93 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
95 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
97 /* Belinea 10 15 55 */
98 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
99 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
101 /* Envision Peripherals, Inc. EN-7100e */
102 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
103 /* Envision EN2028 */
104 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
106 /* Funai Electronics PM36B */
107 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
108 EDID_QUIRK_DETAILED_IN_CM },
110 /* LG Philips LCD LP154W01-A5 */
111 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
112 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
114 /* Philips 107p5 CRT */
115 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
118 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
120 /* Samsung SyncMaster 205BW. Note: irony */
121 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
122 /* Samsung SyncMaster 22[5-6]BW */
123 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
124 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
126 /* ViewSonic VA2026w */
127 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
131 * Autogenerated from the DMT spec.
132 * This table is copied from xfree86/modes/xf86EdidModes.c.
134 static const struct drm_display_mode drm_dmt_modes[] = {
136 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
137 736, 832, 0, 350, 382, 385, 445, 0,
138 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
140 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
141 736, 832, 0, 400, 401, 404, 445, 0,
142 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
144 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
145 828, 936, 0, 400, 401, 404, 446, 0,
146 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
148 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
149 752, 800, 0, 480, 489, 492, 525, 0,
150 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
152 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
153 704, 832, 0, 480, 489, 492, 520, 0,
154 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
156 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
157 720, 840, 0, 480, 481, 484, 500, 0,
158 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
160 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
161 752, 832, 0, 480, 481, 484, 509, 0,
162 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
164 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
165 896, 1024, 0, 600, 601, 603, 625, 0,
166 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
168 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
169 968, 1056, 0, 600, 601, 605, 628, 0,
170 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
172 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
173 976, 1040, 0, 600, 637, 643, 666, 0,
174 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
176 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
177 896, 1056, 0, 600, 601, 604, 625, 0,
178 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
180 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
181 896, 1048, 0, 600, 601, 604, 631, 0,
182 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
183 /* 800x600@120Hz RB */
184 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
185 880, 960, 0, 600, 603, 607, 636, 0,
186 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
188 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
189 976, 1088, 0, 480, 486, 494, 517, 0,
190 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
191 /* 1024x768@43Hz, interlace */
192 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
193 1208, 1264, 0, 768, 768, 772, 817, 0,
194 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
195 DRM_MODE_FLAG_INTERLACE) },
197 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
198 1184, 1344, 0, 768, 771, 777, 806, 0,
199 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
201 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
202 1184, 1328, 0, 768, 771, 777, 806, 0,
203 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
205 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
206 1136, 1312, 0, 768, 769, 772, 800, 0,
207 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
209 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
210 1168, 1376, 0, 768, 769, 772, 808, 0,
211 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
212 /* 1024x768@120Hz RB */
213 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
214 1104, 1184, 0, 768, 771, 775, 813, 0,
215 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
217 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
218 1344, 1600, 0, 864, 865, 868, 900, 0,
219 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
220 /* 1280x768@60Hz RB */
221 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
222 1360, 1440, 0, 768, 771, 778, 790, 0,
223 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
225 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
226 1472, 1664, 0, 768, 771, 778, 798, 0,
227 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
229 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
230 1488, 1696, 0, 768, 771, 778, 805, 0,
231 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
233 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
234 1496, 1712, 0, 768, 771, 778, 809, 0,
235 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
236 /* 1280x768@120Hz RB */
237 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
238 1360, 1440, 0, 768, 771, 778, 813, 0,
239 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
240 /* 1280x800@60Hz RB */
241 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
242 1360, 1440, 0, 800, 803, 809, 823, 0,
243 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
245 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
246 1480, 1680, 0, 800, 803, 809, 831, 0,
247 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
249 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
250 1488, 1696, 0, 800, 803, 809, 838, 0,
251 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
253 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
254 1496, 1712, 0, 800, 803, 809, 843, 0,
255 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
256 /* 1280x800@120Hz RB */
257 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
258 1360, 1440, 0, 800, 803, 809, 847, 0,
259 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
261 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
262 1488, 1800, 0, 960, 961, 964, 1000, 0,
263 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
265 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
266 1504, 1728, 0, 960, 961, 964, 1011, 0,
267 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
268 /* 1280x960@120Hz RB */
269 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
270 1360, 1440, 0, 960, 963, 967, 1017, 0,
271 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
273 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
274 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
275 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
277 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
278 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
279 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
281 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
282 1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
283 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
284 /* 1280x1024@120Hz RB */
285 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
286 1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
287 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
289 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
290 1536, 1792, 0, 768, 771, 777, 795, 0,
291 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
292 /* 1360x768@120Hz RB */
293 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
294 1440, 1520, 0, 768, 771, 776, 813, 0,
295 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
296 /* 1400x1050@60Hz RB */
297 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
298 1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
299 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
301 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
302 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
303 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
305 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
306 1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
307 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
309 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
310 1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
311 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
312 /* 1400x1050@120Hz RB */
313 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
314 1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
315 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
316 /* 1440x900@60Hz RB */
317 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
318 1520, 1600, 0, 900, 903, 909, 926, 0,
319 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
321 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
322 1672, 1904, 0, 900, 903, 909, 934, 0,
323 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
325 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
326 1688, 1936, 0, 900, 903, 909, 942, 0,
327 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
329 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
330 1696, 1952, 0, 900, 903, 909, 948, 0,
331 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
332 /* 1440x900@120Hz RB */
333 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
334 1520, 1600, 0, 900, 903, 909, 953, 0,
335 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
337 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
338 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
339 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
341 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
342 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
343 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
345 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
346 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
347 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
349 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
350 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
351 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
353 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
354 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
355 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
356 /* 1600x1200@120Hz RB */
357 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
358 1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
359 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
360 /* 1680x1050@60Hz RB */
361 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
362 1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
363 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
365 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
366 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
367 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
369 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
370 1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
371 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
373 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
374 1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
375 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
376 /* 1680x1050@120Hz RB */
377 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
378 1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
379 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
381 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
382 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
383 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
385 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
386 2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
387 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
388 /* 1792x1344@120Hz RB */
389 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
390 1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
391 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
393 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
394 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
395 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
397 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
398 2208, 2560, 0, 1392, 1395, 1399, 1500, 0,
399 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
400 /* 1856x1392@120Hz RB */
401 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
402 1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
403 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
404 /* 1920x1200@60Hz RB */
405 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
406 2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
407 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
409 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
410 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
411 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
413 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
414 2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
415 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
417 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
418 2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
419 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
420 /* 1920x1200@120Hz RB */
421 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
422 2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
423 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
425 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
426 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
427 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
429 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
430 2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
431 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
432 /* 1920x1440@120Hz RB */
433 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
434 2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
435 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
436 /* 2560x1600@60Hz RB */
437 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
438 2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
439 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
441 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
442 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
443 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
445 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
446 3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
447 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
449 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
450 3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
451 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
452 /* 2560x1600@120Hz RB */
453 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
454 2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
455 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
458 static const struct drm_display_mode edid_est_modes[] = {
459 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
460 968, 1056, 0, 600, 601, 605, 628, 0,
461 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
462 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
463 896, 1024, 0, 600, 601, 603, 625, 0,
464 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
465 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
466 720, 840, 0, 480, 481, 484, 500, 0,
467 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
468 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
469 704, 832, 0, 480, 489, 491, 520, 0,
470 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
471 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
472 768, 864, 0, 480, 483, 486, 525, 0,
473 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
474 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656,
475 752, 800, 0, 480, 490, 492, 525, 0,
476 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
477 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
478 846, 900, 0, 400, 421, 423, 449, 0,
479 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
480 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
481 846, 900, 0, 400, 412, 414, 449, 0,
482 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
483 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
484 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
485 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
486 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040,
487 1136, 1312, 0, 768, 769, 772, 800, 0,
488 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
489 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
490 1184, 1328, 0, 768, 771, 777, 806, 0,
491 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
492 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
493 1184, 1344, 0, 768, 771, 777, 806, 0,
494 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
495 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
496 1208, 1264, 0, 768, 768, 776, 817, 0,
497 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
498 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
499 928, 1152, 0, 624, 625, 628, 667, 0,
500 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
501 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
502 896, 1056, 0, 600, 601, 604, 625, 0,
503 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
504 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
505 976, 1040, 0, 600, 637, 643, 666, 0,
506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
507 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
508 1344, 1600, 0, 864, 865, 868, 900, 0,
509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
519 static const struct minimode est3_modes[] = {
527 { 1024, 768, 85, 0 },
528 { 1152, 864, 75, 0 },
530 { 1280, 768, 60, 1 },
531 { 1280, 768, 60, 0 },
532 { 1280, 768, 75, 0 },
533 { 1280, 768, 85, 0 },
534 { 1280, 960, 60, 0 },
535 { 1280, 960, 85, 0 },
536 { 1280, 1024, 60, 0 },
537 { 1280, 1024, 85, 0 },
539 { 1360, 768, 60, 0 },
540 { 1440, 900, 60, 1 },
541 { 1440, 900, 60, 0 },
542 { 1440, 900, 75, 0 },
543 { 1440, 900, 85, 0 },
544 { 1400, 1050, 60, 1 },
545 { 1400, 1050, 60, 0 },
546 { 1400, 1050, 75, 0 },
548 { 1400, 1050, 85, 0 },
549 { 1680, 1050, 60, 1 },
550 { 1680, 1050, 60, 0 },
551 { 1680, 1050, 75, 0 },
552 { 1680, 1050, 85, 0 },
553 { 1600, 1200, 60, 0 },
554 { 1600, 1200, 65, 0 },
555 { 1600, 1200, 70, 0 },
557 { 1600, 1200, 75, 0 },
558 { 1600, 1200, 85, 0 },
559 { 1792, 1344, 60, 0 },
560 { 1792, 1344, 85, 0 },
561 { 1856, 1392, 60, 0 },
562 { 1856, 1392, 75, 0 },
563 { 1920, 1200, 60, 1 },
564 { 1920, 1200, 60, 0 },
566 { 1920, 1200, 75, 0 },
567 { 1920, 1200, 85, 0 },
568 { 1920, 1440, 60, 0 },
569 { 1920, 1440, 75, 0 },
572 static const struct minimode extra_modes[] = {
573 { 1024, 576, 60, 0 },
574 { 1366, 768, 60, 0 },
575 { 1600, 900, 60, 0 },
576 { 1680, 945, 60, 0 },
577 { 1920, 1080, 60, 0 },
578 { 2048, 1152, 60, 0 },
579 { 2048, 1536, 60, 0 },
583 * Probably taken from CEA-861 spec.
584 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
586 static const struct drm_display_mode edid_cea_modes[] = {
587 /* 1 - 640x480@60Hz */
588 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
589 752, 800, 0, 480, 490, 492, 525, 0,
590 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
591 /* 2 - 720x480@60Hz */
592 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
593 798, 858, 0, 480, 489, 495, 525, 0,
594 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
595 /* 3 - 720x480@60Hz */
596 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
597 798, 858, 0, 480, 489, 495, 525, 0,
598 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
599 /* 4 - 1280x720@60Hz */
600 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
601 1430, 1650, 0, 720, 725, 730, 750, 0,
602 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
603 /* 5 - 1920x1080i@60Hz */
604 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
605 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
606 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
607 DRM_MODE_FLAG_INTERLACE) },
608 /* 6 - 1440x480i@60Hz */
609 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
610 1602, 1716, 0, 480, 488, 494, 525, 0,
611 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
612 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },
613 /* 7 - 1440x480i@60Hz */
614 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
615 1602, 1716, 0, 480, 488, 494, 525, 0,
616 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
617 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },
618 /* 8 - 1440x240@60Hz */
619 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
620 1602, 1716, 0, 240, 244, 247, 262, 0,
621 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
622 DRM_MODE_FLAG_DBLCLK) },
623 /* 9 - 1440x240@60Hz */
624 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478,
625 1602, 1716, 0, 240, 244, 247, 262, 0,
626 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
627 DRM_MODE_FLAG_DBLCLK) },
628 /* 10 - 2880x480i@60Hz */
629 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
630 3204, 3432, 0, 480, 488, 494, 525, 0,
631 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
632 DRM_MODE_FLAG_INTERLACE) },
633 /* 11 - 2880x480i@60Hz */
634 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
635 3204, 3432, 0, 480, 488, 494, 525, 0,
636 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
637 DRM_MODE_FLAG_INTERLACE) },
638 /* 12 - 2880x240@60Hz */
639 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
640 3204, 3432, 0, 240, 244, 247, 262, 0,
641 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
642 /* 13 - 2880x240@60Hz */
643 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
644 3204, 3432, 0, 240, 244, 247, 262, 0,
645 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
646 /* 14 - 1440x480@60Hz */
647 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
648 1596, 1716, 0, 480, 489, 495, 525, 0,
649 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
650 /* 15 - 1440x480@60Hz */
651 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
652 1596, 1716, 0, 480, 489, 495, 525, 0,
653 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
654 /* 16 - 1920x1080@60Hz */
655 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
656 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
657 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
658 /* 17 - 720x576@50Hz */
659 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
660 796, 864, 0, 576, 581, 586, 625, 0,
661 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
662 /* 18 - 720x576@50Hz */
663 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
664 796, 864, 0, 576, 581, 586, 625, 0,
665 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
666 /* 19 - 1280x720@50Hz */
667 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
668 1760, 1980, 0, 720, 725, 730, 750, 0,
669 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
670 /* 20 - 1920x1080i@50Hz */
671 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
672 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
673 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
674 DRM_MODE_FLAG_INTERLACE) },
675 /* 21 - 1440x576i@50Hz */
676 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
677 1590, 1728, 0, 576, 580, 586, 625, 0,
678 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
679 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },
680 /* 22 - 1440x576i@50Hz */
681 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
682 1590, 1728, 0, 576, 580, 586, 625, 0,
683 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
684 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },
685 /* 23 - 1440x288@50Hz */
686 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
687 1590, 1728, 0, 288, 290, 293, 312, 0,
688 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
689 DRM_MODE_FLAG_DBLCLK) },
690 /* 24 - 1440x288@50Hz */
691 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464,
692 1590, 1728, 0, 288, 290, 293, 312, 0,
693 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
694 DRM_MODE_FLAG_DBLCLK) },
695 /* 25 - 2880x576i@50Hz */
696 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
697 3180, 3456, 0, 576, 580, 586, 625, 0,
698 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
699 DRM_MODE_FLAG_INTERLACE) },
700 /* 26 - 2880x576i@50Hz */
701 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
702 3180, 3456, 0, 576, 580, 586, 625, 0,
703 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
704 DRM_MODE_FLAG_INTERLACE) },
705 /* 27 - 2880x288@50Hz */
706 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
707 3180, 3456, 0, 288, 290, 293, 312, 0,
708 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
709 /* 28 - 2880x288@50Hz */
710 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
711 3180, 3456, 0, 288, 290, 293, 312, 0,
712 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
713 /* 29 - 1440x576@50Hz */
714 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
715 1592, 1728, 0, 576, 581, 586, 625, 0,
716 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
717 /* 30 - 1440x576@50Hz */
718 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
719 1592, 1728, 0, 576, 581, 586, 625, 0,
720 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
721 /* 31 - 1920x1080@50Hz */
722 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
723 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
724 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
725 /* 32 - 1920x1080@24Hz */
726 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
727 2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
728 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
729 /* 33 - 1920x1080@25Hz */
730 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
731 2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
732 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
733 /* 34 - 1920x1080@30Hz */
734 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
735 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
736 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
737 /* 35 - 2880x480@60Hz */
738 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
739 3192, 3432, 0, 480, 489, 495, 525, 0,
740 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
741 /* 36 - 2880x480@60Hz */
742 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
743 3192, 3432, 0, 480, 489, 495, 525, 0,
744 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
745 /* 37 - 2880x576@50Hz */
746 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
747 3184, 3456, 0, 576, 581, 586, 625, 0,
748 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
749 /* 38 - 2880x576@50Hz */
750 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
751 3184, 3456, 0, 576, 581, 586, 625, 0,
752 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
753 /* 39 - 1920x1080i@50Hz */
754 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
755 2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
756 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
757 DRM_MODE_FLAG_INTERLACE) },
758 /* 40 - 1920x1080i@100Hz */
759 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
760 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
761 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
762 DRM_MODE_FLAG_INTERLACE) },
763 /* 41 - 1280x720@100Hz */
764 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
765 1760, 1980, 0, 720, 725, 730, 750, 0,
766 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
767 /* 42 - 720x576@100Hz */
768 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
769 796, 864, 0, 576, 581, 586, 625, 0,
770 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
771 /* 43 - 720x576@100Hz */
772 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
773 796, 864, 0, 576, 581, 586, 625, 0,
774 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
775 /* 44 - 1440x576i@100Hz */
776 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
777 1590, 1728, 0, 576, 580, 586, 625, 0,
778 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
779 DRM_MODE_FLAG_DBLCLK) },
780 /* 45 - 1440x576i@100Hz */
781 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
782 1590, 1728, 0, 576, 580, 586, 625, 0,
783 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
784 DRM_MODE_FLAG_DBLCLK) },
785 /* 46 - 1920x1080i@120Hz */
786 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
787 2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
788 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
789 DRM_MODE_FLAG_INTERLACE) },
790 /* 47 - 1280x720@120Hz */
791 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
792 1430, 1650, 0, 720, 725, 730, 750, 0,
793 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
794 /* 48 - 720x480@120Hz */
795 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
796 798, 858, 0, 480, 489, 495, 525, 0,
797 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
798 /* 49 - 720x480@120Hz */
799 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
800 798, 858, 0, 480, 489, 495, 525, 0,
801 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
802 /* 50 - 1440x480i@120Hz */
803 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478,
804 1602, 1716, 0, 480, 488, 494, 525, 0,
805 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
806 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },
807 /* 51 - 1440x480i@120Hz */
808 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478,
809 1602, 1716, 0, 480, 488, 494, 525, 0,
810 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
811 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },
812 /* 52 - 720x576@200Hz */
813 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
814 796, 864, 0, 576, 581, 586, 625, 0,
815 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
816 /* 53 - 720x576@200Hz */
817 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
818 796, 864, 0, 576, 581, 586, 625, 0,
819 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
820 /* 54 - 1440x576i@200Hz */
821 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464,
822 1590, 1728, 0, 576, 580, 586, 625, 0,
823 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
824 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },
825 /* 55 - 1440x576i@200Hz */
826 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464,
827 1590, 1728, 0, 576, 580, 586, 625, 0,
828 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
829 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },
830 /* 56 - 720x480@240Hz */
831 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
832 798, 858, 0, 480, 489, 495, 525, 0,
833 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
834 /* 57 - 720x480@240Hz */
835 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
836 798, 858, 0, 480, 489, 495, 525, 0,
837 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
838 /* 58 - 1440x480i@240 */
839 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478,
840 1602, 1716, 0, 480, 488, 494, 525, 0,
841 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
842 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },
843 /* 59 - 1440x480i@240 */
844 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478,
845 1602, 1716, 0, 480, 488, 494, 525, 0,
846 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
847 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) },
848 /* 60 - 1280x720@24Hz */
849 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
850 3080, 3300, 0, 720, 725, 730, 750, 0,
851 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
852 /* 61 - 1280x720@25Hz */
853 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
854 3740, 3960, 0, 720, 725, 730, 750, 0,
855 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
856 /* 62 - 1280x720@30Hz */
857 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
858 3080, 3300, 0, 720, 725, 730, 750, 0,
859 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
860 /* 63 - 1920x1080@120Hz */
861 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
862 2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
863 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
864 /* 64 - 1920x1080@100Hz */
865 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
866 2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
867 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
870 /*** DDC fetch and block validation ***/
872 static const u8 edid_header[] = {
873 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
877 * Sanity check the header of the base EDID block. Return 8 if the header
878 * is perfect, down to 0 if it's totally wrong.
880 int drm_edid_header_is_valid(const u8 *raw_edid)
884 for (i = 0; i < sizeof(edid_header); i++)
885 if (raw_edid[i] == edid_header[i])
890 EXPORT_SYMBOL(drm_edid_header_is_valid);
892 static int edid_fixup __read_mostly = 6;
893 module_param_named(edid_fixup, edid_fixup, int, 0400);
894 MODULE_PARM_DESC(edid_fixup,
895 "Minimum number of valid EDID header bytes (0-8, default 6)");
898 * Sanity check the EDID block (base or extension). Return 0 if the block
899 * doesn't check out, or 1 if it's valid.
901 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid)
905 struct edid *edid = (struct edid *)raw_edid;
907 if (edid_fixup > 8 || edid_fixup < 0)
911 int score = drm_edid_header_is_valid(raw_edid);
913 else if (score >= edid_fixup) {
914 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
915 memcpy(raw_edid, edid_header, sizeof(edid_header));
921 for (i = 0; i < EDID_LENGTH; i++)
924 if (print_bad_edid) {
925 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
928 /* allow CEA to slide through, switches mangle this */
929 if (raw_edid[0] != 0x02)
933 /* per-block-type checks */
934 switch (raw_edid[0]) {
936 if (edid->version != 1) {
937 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
941 if (edid->revision > 4)
942 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
952 if (raw_edid && print_bad_edid) {
953 printk(KERN_ERR "Raw EDID:\n");
954 print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
955 raw_edid, EDID_LENGTH, false);
959 EXPORT_SYMBOL(drm_edid_block_valid);
962 * drm_edid_is_valid - sanity check EDID data
965 * Sanity-check an entire EDID record (including extensions)
967 bool drm_edid_is_valid(struct edid *edid)
970 u8 *raw = (u8 *)edid;
975 for (i = 0; i <= edid->extensions; i++)
976 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true))
981 EXPORT_SYMBOL(drm_edid_is_valid);
983 #define DDC_SEGMENT_ADDR 0x30
985 * Get EDID information via I2C.
987 * \param adapter : i2c device adaptor
988 * \param buf : EDID data buffer to be filled
989 * \param len : EDID data buffer length
990 * \return 0 on success or -1 on failure.
992 * Try to fetch EDID information by calling i2c driver function.
995 drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
998 unsigned char start = block * EDID_LENGTH;
999 unsigned char segment = block >> 1;
1000 unsigned char xfers = segment ? 3 : 2;
1001 int ret, retries = 5;
1003 /* The core i2c driver will automatically retry the transfer if the
1004 * adapter reports EAGAIN. However, we find that bit-banging transfers
1005 * are susceptible to errors under a heavily loaded machine and
1006 * generate spurious NAKs and timeouts. Retrying the transfer
1007 * of the individual block a few times seems to overcome this.
1010 struct i2c_msg msgs[] = {
1012 .addr = DDC_SEGMENT_ADDR,
1030 * Avoid sending the segment addr to not upset non-compliant ddc
1033 ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1035 if (ret == -ENXIO) {
1036 DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1040 } while (ret != xfers && --retries);
1042 return ret == xfers ? 0 : -1;
1045 static bool drm_edid_is_zero(u8 *in_edid, int length)
1047 if (memchr_inv(in_edid, 0, length))
1054 drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
1056 int i, j = 0, valid_extensions = 0;
1058 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS);
1060 if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
1063 /* base block fetch */
1064 for (i = 0; i < 4; i++) {
1065 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
1067 if (drm_edid_block_valid(block, 0, print_bad_edid))
1069 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
1070 connector->null_edid_counter++;
1077 /* if there's no extensions, we're done */
1078 if (block[0x7e] == 0)
1081 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
1086 for (j = 1; j <= block[0x7e]; j++) {
1087 for (i = 0; i < 4; i++) {
1088 if (drm_do_probe_ddc_edid(adapter,
1089 block + (valid_extensions + 1) * EDID_LENGTH,
1092 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) {
1098 if (i == 4 && print_bad_edid) {
1099 dev_warn(connector->dev->dev,
1100 "%s: Ignoring invalid EDID block %d.\n",
1101 drm_get_connector_name(connector), j);
1103 connector->bad_edid_counter++;
1107 if (valid_extensions != block[0x7e]) {
1108 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
1109 block[0x7e] = valid_extensions;
1110 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1119 if (print_bad_edid) {
1120 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
1121 drm_get_connector_name(connector), j);
1123 connector->bad_edid_counter++;
1131 * Probe DDC presence.
1133 * \param adapter : i2c device adaptor
1134 * \return 1 on success
1137 drm_probe_ddc(struct i2c_adapter *adapter)
1141 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1143 EXPORT_SYMBOL(drm_probe_ddc);
1146 * drm_get_edid - get EDID data, if available
1147 * @connector: connector we're probing
1148 * @adapter: i2c adapter to use for DDC
1150 * Poke the given i2c channel to grab EDID data if possible. If found,
1151 * attach it to the connector.
1153 * Return edid data or NULL if we couldn't find any.
1155 struct edid *drm_get_edid(struct drm_connector *connector,
1156 struct i2c_adapter *adapter)
1158 struct edid *edid = NULL;
1160 if (drm_probe_ddc(adapter))
1161 edid = (struct edid *)drm_do_get_edid(connector, adapter);
1165 EXPORT_SYMBOL(drm_get_edid);
1167 /*** EDID parsing ***/
1170 * edid_vendor - match a string against EDID's obfuscated vendor field
1171 * @edid: EDID to match
1172 * @vendor: vendor string
1174 * Returns true if @vendor is in @edid, false otherwise
1176 static bool edid_vendor(struct edid *edid, char *vendor)
1178 char edid_vendor[3];
1180 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1181 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1182 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1183 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1185 return !strncmp(edid_vendor, vendor, 3);
1189 * edid_get_quirks - return quirk flags for a given EDID
1190 * @edid: EDID to process
1192 * This tells subsequent routines what fixes they need to apply.
1194 static u32 edid_get_quirks(struct edid *edid)
1196 struct edid_quirk *quirk;
1199 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1200 quirk = &edid_quirk_list[i];
1202 if (edid_vendor(edid, quirk->vendor) &&
1203 (EDID_PRODUCT_ID(edid) == quirk->product_id))
1204 return quirk->quirks;
1210 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1211 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
1214 * edid_fixup_preferred - set preferred modes based on quirk list
1215 * @connector: has mode list to fix up
1216 * @quirks: quirks list
1218 * Walk the mode list for @connector, clearing the preferred status
1219 * on existing modes and setting it anew for the right mode ala @quirks.
1221 static void edid_fixup_preferred(struct drm_connector *connector,
1224 struct drm_display_mode *t, *cur_mode, *preferred_mode;
1225 int target_refresh = 0;
1227 if (list_empty(&connector->probed_modes))
1230 if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1231 target_refresh = 60;
1232 if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1233 target_refresh = 75;
1235 preferred_mode = list_first_entry(&connector->probed_modes,
1236 struct drm_display_mode, head);
1238 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1239 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1241 if (cur_mode == preferred_mode)
1244 /* Largest mode is preferred */
1245 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1246 preferred_mode = cur_mode;
1248 /* At a given size, try to get closest to target refresh */
1249 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1250 MODE_REFRESH_DIFF(cur_mode, target_refresh) <
1251 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
1252 preferred_mode = cur_mode;
1256 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1260 mode_is_rb(const struct drm_display_mode *mode)
1262 return (mode->htotal - mode->hdisplay == 160) &&
1263 (mode->hsync_end - mode->hdisplay == 80) &&
1264 (mode->hsync_end - mode->hsync_start == 32) &&
1265 (mode->vsync_start - mode->vdisplay == 3);
1269 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1270 * @dev: Device to duplicate against
1271 * @hsize: Mode width
1272 * @vsize: Mode height
1273 * @fresh: Mode refresh rate
1274 * @rb: Mode reduced-blanking-ness
1276 * Walk the DMT mode list looking for a match for the given parameters.
1277 * Return a newly allocated copy of the mode, or NULL if not found.
1279 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1280 int hsize, int vsize, int fresh,
1285 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1286 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1287 if (hsize != ptr->hdisplay)
1289 if (vsize != ptr->vdisplay)
1291 if (fresh != drm_mode_vrefresh(ptr))
1293 if (rb != mode_is_rb(ptr))
1296 return drm_mode_duplicate(dev, ptr);
1301 EXPORT_SYMBOL(drm_mode_find_dmt);
1303 typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1306 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1310 u8 *det_base = ext + d;
1313 for (i = 0; i < n; i++)
1314 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1318 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1320 unsigned int i, n = min((int)ext[0x02], 6);
1321 u8 *det_base = ext + 5;
1324 return; /* unknown version */
1326 for (i = 0; i < n; i++)
1327 cb((struct detailed_timing *)(det_base + 18 * i), closure);
1331 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1334 struct edid *edid = (struct edid *)raw_edid;
1339 for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1340 cb(&(edid->detailed_timings[i]), closure);
1342 for (i = 1; i <= raw_edid[0x7e]; i++) {
1343 u8 *ext = raw_edid + (i * EDID_LENGTH);
1346 cea_for_each_detailed_block(ext, cb, closure);
1349 vtb_for_each_detailed_block(ext, cb, closure);
1358 is_rb(struct detailed_timing *t, void *data)
1361 if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1363 *(bool *)data = true;
1366 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */
1368 drm_monitor_supports_rb(struct edid *edid)
1370 if (edid->revision >= 4) {
1372 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1376 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1380 find_gtf2(struct detailed_timing *t, void *data)
1383 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1387 /* Secondary GTF curve kicks in above some break frequency */
1389 drm_gtf2_hbreak(struct edid *edid)
1392 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1393 return r ? (r[12] * 2) : 0;
1397 drm_gtf2_2c(struct edid *edid)
1400 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1401 return r ? r[13] : 0;
1405 drm_gtf2_m(struct edid *edid)
1408 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1409 return r ? (r[15] << 8) + r[14] : 0;
1413 drm_gtf2_k(struct edid *edid)
1416 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1417 return r ? r[16] : 0;
1421 drm_gtf2_2j(struct edid *edid)
1424 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1425 return r ? r[17] : 0;
1429 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1430 * @edid: EDID block to scan
1432 static int standard_timing_level(struct edid *edid)
1434 if (edid->revision >= 2) {
1435 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1437 if (drm_gtf2_hbreak(edid))
1445 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old
1446 * monitors fill with ascii space (0x20) instead.
1449 bad_std_timing(u8 a, u8 b)
1451 return (a == 0x00 && b == 0x00) ||
1452 (a == 0x01 && b == 0x01) ||
1453 (a == 0x20 && b == 0x20);
1457 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1458 * @t: standard timing params
1459 * @timing_level: standard timing level
1461 * Take the standard timing params (in this case width, aspect, and refresh)
1462 * and convert them into a real mode using CVT/GTF/DMT.
1464 static struct drm_display_mode *
1465 drm_mode_std(struct drm_connector *connector, struct edid *edid,
1466 struct std_timing *t, int revision)
1468 struct drm_device *dev = connector->dev;
1469 struct drm_display_mode *m, *mode = NULL;
1472 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1473 >> EDID_TIMING_ASPECT_SHIFT;
1474 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1475 >> EDID_TIMING_VFREQ_SHIFT;
1476 int timing_level = standard_timing_level(edid);
1478 if (bad_std_timing(t->hsize, t->vfreq_aspect))
1481 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1482 hsize = t->hsize * 8 + 248;
1483 /* vrefresh_rate = vfreq + 60 */
1484 vrefresh_rate = vfreq + 60;
1485 /* the vdisplay is calculated based on the aspect ratio */
1486 if (aspect_ratio == 0) {
1490 vsize = (hsize * 10) / 16;
1491 } else if (aspect_ratio == 1)
1492 vsize = (hsize * 3) / 4;
1493 else if (aspect_ratio == 2)
1494 vsize = (hsize * 4) / 5;
1496 vsize = (hsize * 9) / 16;
1498 /* HDTV hack, part 1 */
1499 if (vrefresh_rate == 60 &&
1500 ((hsize == 1360 && vsize == 765) ||
1501 (hsize == 1368 && vsize == 769))) {
1507 * If this connector already has a mode for this size and refresh
1508 * rate (because it came from detailed or CVT info), use that
1509 * instead. This way we don't have to guess at interlace or
1512 list_for_each_entry(m, &connector->probed_modes, head)
1513 if (m->hdisplay == hsize && m->vdisplay == vsize &&
1514 drm_mode_vrefresh(m) == vrefresh_rate)
1517 /* HDTV hack, part 2 */
1518 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1519 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1521 mode->hdisplay = 1366;
1522 mode->hsync_start = mode->hsync_start - 1;
1523 mode->hsync_end = mode->hsync_end - 1;
1527 /* check whether it can be found in default mode table */
1528 if (drm_monitor_supports_rb(edid)) {
1529 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1534 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
1538 /* okay, generate it */
1539 switch (timing_level) {
1543 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1547 * This is potentially wrong if there's ever a monitor with
1548 * more than one ranges section, each claiming a different
1549 * secondary GTF curve. Please don't do that.
1551 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1554 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
1555 drm_mode_destroy(dev, mode);
1556 mode = drm_gtf_mode_complex(dev, hsize, vsize,
1557 vrefresh_rate, 0, 0,
1565 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
1573 * EDID is delightfully ambiguous about how interlaced modes are to be
1574 * encoded. Our internal representation is of frame height, but some
1575 * HDTV detailed timings are encoded as field height.
1577 * The format list here is from CEA, in frame size. Technically we
1578 * should be checking refresh rate too. Whatever.
1581 drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
1582 struct detailed_pixel_timing *pt)
1585 static const struct {
1587 } cea_interlaced[] = {
1597 if (!(pt->misc & DRM_EDID_PT_INTERLACED))
1600 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
1601 if ((mode->hdisplay == cea_interlaced[i].w) &&
1602 (mode->vdisplay == cea_interlaced[i].h / 2)) {
1603 mode->vdisplay *= 2;
1604 mode->vsync_start *= 2;
1605 mode->vsync_end *= 2;
1611 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1615 * drm_mode_detailed - create a new mode from an EDID detailed timing section
1616 * @dev: DRM device (needed to create new mode)
1618 * @timing: EDID detailed timing info
1619 * @quirks: quirks to apply
1621 * An EDID detailed timing block contains enough info for us to create and
1622 * return a new struct drm_display_mode.
1624 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
1626 struct detailed_timing *timing,
1629 struct drm_display_mode *mode;
1630 struct detailed_pixel_timing *pt = &timing->data.pixel_data;
1631 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
1632 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
1633 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
1634 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
1635 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
1636 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
1637 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
1638 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
1640 /* ignore tiny modes */
1641 if (hactive < 64 || vactive < 64)
1644 if (pt->misc & DRM_EDID_PT_STEREO) {
1645 printk(KERN_WARNING "stereo mode not supported\n");
1648 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
1649 printk(KERN_WARNING "composite sync not supported\n");
1652 /* it is incorrect if hsync/vsync width is zero */
1653 if (!hsync_pulse_width || !vsync_pulse_width) {
1654 DRM_DEBUG_KMS("Incorrect Detailed timing. "
1655 "Wrong Hsync/Vsync pulse width\n");
1659 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
1660 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
1667 mode = drm_mode_create(dev);
1671 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
1672 timing->pixel_clock = cpu_to_le16(1088);
1674 mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1676 mode->hdisplay = hactive;
1677 mode->hsync_start = mode->hdisplay + hsync_offset;
1678 mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1679 mode->htotal = mode->hdisplay + hblank;
1681 mode->vdisplay = vactive;
1682 mode->vsync_start = mode->vdisplay + vsync_offset;
1683 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1684 mode->vtotal = mode->vdisplay + vblank;
1686 /* Some EDIDs have bogus h/vtotal values */
1687 if (mode->hsync_end > mode->htotal)
1688 mode->htotal = mode->hsync_end + 1;
1689 if (mode->vsync_end > mode->vtotal)
1690 mode->vtotal = mode->vsync_end + 1;
1692 drm_mode_do_interlace_quirk(mode, pt);
1694 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
1695 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
1698 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
1699 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
1700 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
1701 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
1704 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
1705 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
1707 if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
1708 mode->width_mm *= 10;
1709 mode->height_mm *= 10;
1712 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
1713 mode->width_mm = edid->width_cm * 10;
1714 mode->height_mm = edid->height_cm * 10;
1717 mode->type = DRM_MODE_TYPE_DRIVER;
1718 drm_mode_set_name(mode);
1724 mode_in_hsync_range(const struct drm_display_mode *mode,
1725 struct edid *edid, u8 *t)
1727 int hsync, hmin, hmax;
1730 if (edid->revision >= 4)
1731 hmin += ((t[4] & 0x04) ? 255 : 0);
1733 if (edid->revision >= 4)
1734 hmax += ((t[4] & 0x08) ? 255 : 0);
1735 hsync = drm_mode_hsync(mode);
1737 return (hsync <= hmax && hsync >= hmin);
1741 mode_in_vsync_range(const struct drm_display_mode *mode,
1742 struct edid *edid, u8 *t)
1744 int vsync, vmin, vmax;
1747 if (edid->revision >= 4)
1748 vmin += ((t[4] & 0x01) ? 255 : 0);
1750 if (edid->revision >= 4)
1751 vmax += ((t[4] & 0x02) ? 255 : 0);
1752 vsync = drm_mode_vrefresh(mode);
1754 return (vsync <= vmax && vsync >= vmin);
1758 range_pixel_clock(struct edid *edid, u8 *t)
1761 if (t[9] == 0 || t[9] == 255)
1764 /* 1.4 with CVT support gives us real precision, yay */
1765 if (edid->revision >= 4 && t[10] == 0x04)
1766 return (t[9] * 10000) - ((t[12] >> 2) * 250);
1768 /* 1.3 is pathetic, so fuzz up a bit */
1769 return t[9] * 10000 + 5001;
1773 mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
1774 struct detailed_timing *timing)
1777 u8 *t = (u8 *)timing;
1779 if (!mode_in_hsync_range(mode, edid, t))
1782 if (!mode_in_vsync_range(mode, edid, t))
1785 if ((max_clock = range_pixel_clock(edid, t)))
1786 if (mode->clock > max_clock)
1789 /* 1.4 max horizontal check */
1790 if (edid->revision >= 4 && t[10] == 0x04)
1791 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
1794 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1800 static bool valid_inferred_mode(const struct drm_connector *connector,
1801 const struct drm_display_mode *mode)
1803 struct drm_display_mode *m;
1806 list_for_each_entry(m, &connector->probed_modes, head) {
1807 if (mode->hdisplay == m->hdisplay &&
1808 mode->vdisplay == m->vdisplay &&
1809 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
1810 return false; /* duplicated */
1811 if (mode->hdisplay <= m->hdisplay &&
1812 mode->vdisplay <= m->vdisplay)
1819 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1820 struct detailed_timing *timing)
1823 struct drm_display_mode *newmode;
1824 struct drm_device *dev = connector->dev;
1826 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1827 if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
1828 valid_inferred_mode(connector, drm_dmt_modes + i)) {
1829 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1831 drm_mode_probed_add(connector, newmode);
1840 /* fix up 1366x768 mode from 1368x768;
1841 * GFT/CVT can't express 1366 width which isn't dividable by 8
1843 static void fixup_mode_1366x768(struct drm_display_mode *mode)
1845 if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
1846 mode->hdisplay = 1366;
1847 mode->hsync_start--;
1849 drm_mode_set_name(mode);
1854 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1855 struct detailed_timing *timing)
1858 struct drm_display_mode *newmode;
1859 struct drm_device *dev = connector->dev;
1861 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
1862 const struct minimode *m = &extra_modes[i];
1863 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
1867 fixup_mode_1366x768(newmode);
1868 if (!mode_in_range(newmode, edid, timing) ||
1869 !valid_inferred_mode(connector, newmode)) {
1870 drm_mode_destroy(dev, newmode);
1874 drm_mode_probed_add(connector, newmode);
1882 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
1883 struct detailed_timing *timing)
1886 struct drm_display_mode *newmode;
1887 struct drm_device *dev = connector->dev;
1888 bool rb = drm_monitor_supports_rb(edid);
1890 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
1891 const struct minimode *m = &extra_modes[i];
1892 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
1896 fixup_mode_1366x768(newmode);
1897 if (!mode_in_range(newmode, edid, timing) ||
1898 !valid_inferred_mode(connector, newmode)) {
1899 drm_mode_destroy(dev, newmode);
1903 drm_mode_probed_add(connector, newmode);
1911 do_inferred_modes(struct detailed_timing *timing, void *c)
1913 struct detailed_mode_closure *closure = c;
1914 struct detailed_non_pixel *data = &timing->data.other_data;
1915 struct detailed_data_monitor_range *range = &data->data.range;
1917 if (data->type != EDID_DETAIL_MONITOR_RANGE)
1920 closure->modes += drm_dmt_modes_for_range(closure->connector,
1924 if (!version_greater(closure->edid, 1, 1))
1925 return; /* GTF not defined yet */
1927 switch (range->flags) {
1928 case 0x02: /* secondary gtf, XXX could do more */
1929 case 0x00: /* default gtf */
1930 closure->modes += drm_gtf_modes_for_range(closure->connector,
1934 case 0x04: /* cvt, only in 1.4+ */
1935 if (!version_greater(closure->edid, 1, 3))
1938 closure->modes += drm_cvt_modes_for_range(closure->connector,
1942 case 0x01: /* just the ranges, no formula */
1949 add_inferred_modes(struct drm_connector *connector, struct edid *edid)
1951 struct detailed_mode_closure closure = {
1952 connector, edid, 0, 0, 0
1955 if (version_greater(edid, 1, 0))
1956 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
1959 return closure.modes;
1963 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1965 int i, j, m, modes = 0;
1966 struct drm_display_mode *mode;
1967 u8 *est = ((u8 *)timing) + 5;
1969 for (i = 0; i < 6; i++) {
1970 for (j = 7; j > 0; j--) {
1971 m = (i * 8) + (7 - j);
1972 if (m >= ARRAY_SIZE(est3_modes))
1974 if (est[i] & (1 << j)) {
1975 mode = drm_mode_find_dmt(connector->dev,
1981 drm_mode_probed_add(connector, mode);
1992 do_established_modes(struct detailed_timing *timing, void *c)
1994 struct detailed_mode_closure *closure = c;
1995 struct detailed_non_pixel *data = &timing->data.other_data;
1997 if (data->type == EDID_DETAIL_EST_TIMINGS)
1998 closure->modes += drm_est3_modes(closure->connector, timing);
2002 * add_established_modes - get est. modes from EDID and add them
2003 * @edid: EDID block to scan
2005 * Each EDID block contains a bitmap of the supported "established modes" list
2006 * (defined above). Tease them out and add them to the global modes list.
2009 add_established_modes(struct drm_connector *connector, struct edid *edid)
2011 struct drm_device *dev = connector->dev;
2012 unsigned long est_bits = edid->established_timings.t1 |
2013 (edid->established_timings.t2 << 8) |
2014 ((edid->established_timings.mfg_rsvd & 0x80) << 9);
2016 struct detailed_mode_closure closure = {
2017 connector, edid, 0, 0, 0
2020 for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2021 if (est_bits & (1<<i)) {
2022 struct drm_display_mode *newmode;
2023 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2025 drm_mode_probed_add(connector, newmode);
2031 if (version_greater(edid, 1, 0))
2032 drm_for_each_detailed_block((u8 *)edid,
2033 do_established_modes, &closure);
2035 return modes + closure.modes;
2039 do_standard_modes(struct detailed_timing *timing, void *c)
2041 struct detailed_mode_closure *closure = c;
2042 struct detailed_non_pixel *data = &timing->data.other_data;
2043 struct drm_connector *connector = closure->connector;
2044 struct edid *edid = closure->edid;
2046 if (data->type == EDID_DETAIL_STD_MODES) {
2048 for (i = 0; i < 6; i++) {
2049 struct std_timing *std;
2050 struct drm_display_mode *newmode;
2052 std = &data->data.timings[i];
2053 newmode = drm_mode_std(connector, edid, std,
2056 drm_mode_probed_add(connector, newmode);
2064 * add_standard_modes - get std. modes from EDID and add them
2065 * @edid: EDID block to scan
2067 * Standard modes can be calculated using the appropriate standard (DMT,
2068 * GTF or CVT. Grab them from @edid and add them to the list.
2071 add_standard_modes(struct drm_connector *connector, struct edid *edid)
2074 struct detailed_mode_closure closure = {
2075 connector, edid, 0, 0, 0
2078 for (i = 0; i < EDID_STD_TIMINGS; i++) {
2079 struct drm_display_mode *newmode;
2081 newmode = drm_mode_std(connector, edid,
2082 &edid->standard_timings[i],
2085 drm_mode_probed_add(connector, newmode);
2090 if (version_greater(edid, 1, 0))
2091 drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2094 /* XXX should also look for standard codes in VTB blocks */
2096 return modes + closure.modes;
2099 static int drm_cvt_modes(struct drm_connector *connector,
2100 struct detailed_timing *timing)
2102 int i, j, modes = 0;
2103 struct drm_display_mode *newmode;
2104 struct drm_device *dev = connector->dev;
2105 struct cvt_timing *cvt;
2106 const int rates[] = { 60, 85, 75, 60, 50 };
2107 const u8 empty[3] = { 0, 0, 0 };
2109 for (i = 0; i < 4; i++) {
2110 int uninitialized_var(width), height;
2111 cvt = &(timing->data.other_data.data.cvt[i]);
2113 if (!memcmp(cvt->code, empty, 3))
2116 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2117 switch (cvt->code[1] & 0x0c) {
2119 width = height * 4 / 3;
2122 width = height * 16 / 9;
2125 width = height * 16 / 10;
2128 width = height * 15 / 9;
2132 for (j = 1; j < 5; j++) {
2133 if (cvt->code[2] & (1 << j)) {
2134 newmode = drm_cvt_mode(dev, width, height,
2138 drm_mode_probed_add(connector, newmode);
2149 do_cvt_mode(struct detailed_timing *timing, void *c)
2151 struct detailed_mode_closure *closure = c;
2152 struct detailed_non_pixel *data = &timing->data.other_data;
2154 if (data->type == EDID_DETAIL_CVT_3BYTE)
2155 closure->modes += drm_cvt_modes(closure->connector, timing);
2159 add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2161 struct detailed_mode_closure closure = {
2162 connector, edid, 0, 0, 0
2165 if (version_greater(edid, 1, 2))
2166 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2168 /* XXX should also look for CVT codes in VTB blocks */
2170 return closure.modes;
2174 do_detailed_mode(struct detailed_timing *timing, void *c)
2176 struct detailed_mode_closure *closure = c;
2177 struct drm_display_mode *newmode;
2179 if (timing->pixel_clock) {
2180 newmode = drm_mode_detailed(closure->connector->dev,
2181 closure->edid, timing,
2186 if (closure->preferred)
2187 newmode->type |= DRM_MODE_TYPE_PREFERRED;
2189 drm_mode_probed_add(closure->connector, newmode);
2191 closure->preferred = 0;
2196 * add_detailed_modes - Add modes from detailed timings
2197 * @connector: attached connector
2198 * @edid: EDID block to scan
2199 * @quirks: quirks to apply
2202 add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2205 struct detailed_mode_closure closure = {
2213 if (closure.preferred && !version_greater(edid, 1, 3))
2215 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2217 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2219 return closure.modes;
2222 #define HDMI_IDENTIFIER 0x000C03
2223 #define AUDIO_BLOCK 0x01
2224 #define VIDEO_BLOCK 0x02
2225 #define VENDOR_BLOCK 0x03
2226 #define SPEAKER_BLOCK 0x04
2227 #define VIDEO_CAPABILITY_BLOCK 0x07
2228 #define EDID_BASIC_AUDIO (1 << 6)
2229 #define EDID_CEA_YCRCB444 (1 << 5)
2230 #define EDID_CEA_YCRCB422 (1 << 4)
2231 #define EDID_CEA_VCDB_QS (1 << 6)
2234 * Search EDID for CEA extension block.
2236 u8 *drm_find_cea_extension(struct edid *edid)
2238 u8 *edid_ext = NULL;
2241 /* No EDID or EDID extensions */
2242 if (edid == NULL || edid->extensions == 0)
2245 /* Find CEA extension */
2246 for (i = 0; i < edid->extensions; i++) {
2247 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2248 if (edid_ext[0] == CEA_EXT)
2252 if (i == edid->extensions)
2257 EXPORT_SYMBOL(drm_find_cea_extension);
2260 * drm_match_cea_mode - look for a CEA mode matching given mode
2261 * @to_match: display mode
2263 * Returns the CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2266 u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2268 struct drm_display_mode *cea_mode;
2271 for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) {
2272 cea_mode = (struct drm_display_mode *)&edid_cea_modes[mode];
2274 if (drm_mode_equal(to_match, cea_mode))
2279 EXPORT_SYMBOL(drm_match_cea_mode);
2283 do_cea_modes (struct drm_connector *connector, u8 *db, u8 len)
2285 struct drm_device *dev = connector->dev;
2286 u8 * mode, cea_mode;
2289 for (mode = db; mode < db + len; mode++) {
2290 cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */
2291 if (cea_mode < ARRAY_SIZE(edid_cea_modes)) {
2292 struct drm_display_mode *newmode;
2293 newmode = drm_mode_duplicate(dev,
2294 &edid_cea_modes[cea_mode]);
2296 drm_mode_probed_add(connector, newmode);
2306 cea_db_payload_len(const u8 *db)
2308 return db[0] & 0x1f;
2312 cea_db_tag(const u8 *db)
2318 cea_revision(const u8 *cea)
2324 cea_db_offsets(const u8 *cea, int *start, int *end)
2326 /* Data block offset in CEA extension block */
2331 if (*end < 4 || *end > 127)
2336 #define for_each_cea_db(cea, i, start, end) \
2337 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
2340 add_cea_modes(struct drm_connector *connector, struct edid *edid)
2342 u8 * cea = drm_find_cea_extension(edid);
2346 if (cea && cea_revision(cea) >= 3) {
2349 if (cea_db_offsets(cea, &start, &end))
2352 for_each_cea_db(cea, i, start, end) {
2354 dbl = cea_db_payload_len(db);
2356 if (cea_db_tag(db) == VIDEO_BLOCK)
2357 modes += do_cea_modes (connector, db+1, dbl);
2365 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db)
2367 u8 len = cea_db_payload_len(db);
2370 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */
2371 connector->dvi_dual = db[6] & 1;
2374 connector->max_tmds_clock = db[7] * 5;
2376 connector->latency_present[0] = db[8] >> 7;
2377 connector->latency_present[1] = (db[8] >> 6) & 1;
2380 connector->video_latency[0] = db[9];
2382 connector->audio_latency[0] = db[10];
2384 connector->video_latency[1] = db[11];
2386 connector->audio_latency[1] = db[12];
2388 DRM_DEBUG_KMS("HDMI: DVI dual %d, "
2389 "max TMDS clock %d, "
2390 "latency present %d %d, "
2391 "video latency %d %d, "
2392 "audio latency %d %d\n",
2393 connector->dvi_dual,
2394 connector->max_tmds_clock,
2395 (int) connector->latency_present[0],
2396 (int) connector->latency_present[1],
2397 connector->video_latency[0],
2398 connector->video_latency[1],
2399 connector->audio_latency[0],
2400 connector->audio_latency[1]);
2404 monitor_name(struct detailed_timing *t, void *data)
2406 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
2407 *(u8 **)data = t->data.other_data.data.str.str;
2410 static bool cea_db_is_hdmi_vsdb(const u8 *db)
2414 if (cea_db_tag(db) != VENDOR_BLOCK)
2417 if (cea_db_payload_len(db) < 5)
2420 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
2422 return hdmi_id == HDMI_IDENTIFIER;
2426 * drm_edid_to_eld - build ELD from EDID
2427 * @connector: connector corresponding to the HDMI/DP sink
2428 * @edid: EDID to parse
2430 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver.
2431 * Some ELD fields are left to the graphics driver caller:
2436 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
2438 uint8_t *eld = connector->eld;
2446 memset(eld, 0, sizeof(connector->eld));
2448 cea = drm_find_cea_extension(edid);
2450 DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
2455 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name);
2456 for (mnl = 0; name && mnl < 13; mnl++) {
2457 if (name[mnl] == 0x0a)
2459 eld[20 + mnl] = name[mnl];
2461 eld[4] = (cea[1] << 5) | mnl;
2462 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
2464 eld[0] = 2 << 3; /* ELD version: 2 */
2466 eld[16] = edid->mfg_id[0];
2467 eld[17] = edid->mfg_id[1];
2468 eld[18] = edid->prod_code[0];
2469 eld[19] = edid->prod_code[1];
2471 if (cea_revision(cea) >= 3) {
2474 if (cea_db_offsets(cea, &start, &end)) {
2479 for_each_cea_db(cea, i, start, end) {
2481 dbl = cea_db_payload_len(db);
2483 switch (cea_db_tag(db)) {
2485 /* Audio Data Block, contains SADs */
2486 sad_count = dbl / 3;
2488 memcpy(eld + 20 + mnl, &db[1], dbl);
2491 /* Speaker Allocation Data Block */
2496 /* HDMI Vendor-Specific Data Block */
2497 if (cea_db_is_hdmi_vsdb(db))
2498 parse_hdmi_vsdb(connector, db);
2505 eld[5] |= sad_count << 4;
2506 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4;
2508 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count);
2510 EXPORT_SYMBOL(drm_edid_to_eld);
2513 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond
2514 * @connector: connector associated with the HDMI/DP sink
2515 * @mode: the display mode
2517 int drm_av_sync_delay(struct drm_connector *connector,
2518 struct drm_display_mode *mode)
2520 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
2523 if (!connector->latency_present[0])
2525 if (!connector->latency_present[1])
2528 a = connector->audio_latency[i];
2529 v = connector->video_latency[i];
2532 * HDMI/DP sink doesn't support audio or video?
2534 if (a == 255 || v == 255)
2538 * Convert raw EDID values to millisecond.
2539 * Treat unknown latency as 0ms.
2542 a = min(2 * (a - 1), 500);
2544 v = min(2 * (v - 1), 500);
2546 return max(v - a, 0);
2548 EXPORT_SYMBOL(drm_av_sync_delay);
2551 * drm_select_eld - select one ELD from multiple HDMI/DP sinks
2552 * @encoder: the encoder just changed display mode
2553 * @mode: the adjusted display mode
2555 * It's possible for one encoder to be associated with multiple HDMI/DP sinks.
2556 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD.
2558 struct drm_connector *drm_select_eld(struct drm_encoder *encoder,
2559 struct drm_display_mode *mode)
2561 struct drm_connector *connector;
2562 struct drm_device *dev = encoder->dev;
2564 list_for_each_entry(connector, &dev->mode_config.connector_list, head)
2565 if (connector->encoder == encoder && connector->eld[0])
2570 EXPORT_SYMBOL(drm_select_eld);
2573 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
2574 * @edid: monitor EDID information
2576 * Parse the CEA extension according to CEA-861-B.
2577 * Return true if HDMI, false if not or unknown.
2579 bool drm_detect_hdmi_monitor(struct edid *edid)
2583 int start_offset, end_offset;
2585 edid_ext = drm_find_cea_extension(edid);
2589 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
2593 * Because HDMI identifier is in Vendor Specific Block,
2594 * search it from all data blocks of CEA extension.
2596 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
2597 if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
2603 EXPORT_SYMBOL(drm_detect_hdmi_monitor);
2606 * drm_detect_monitor_audio - check monitor audio capability
2608 * Monitor should have CEA extension block.
2609 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
2610 * audio' only. If there is any audio extension block and supported
2611 * audio format, assume at least 'basic audio' support, even if 'basic
2612 * audio' is not defined in EDID.
2615 bool drm_detect_monitor_audio(struct edid *edid)
2619 bool has_audio = false;
2620 int start_offset, end_offset;
2622 edid_ext = drm_find_cea_extension(edid);
2626 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
2629 DRM_DEBUG_KMS("Monitor has basic audio support\n");
2633 if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
2636 for_each_cea_db(edid_ext, i, start_offset, end_offset) {
2637 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
2639 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
2640 DRM_DEBUG_KMS("CEA audio format %d\n",
2641 (edid_ext[i + j] >> 3) & 0xf);
2648 EXPORT_SYMBOL(drm_detect_monitor_audio);
2651 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
2653 * Check whether the monitor reports the RGB quantization range selection
2654 * as supported. The AVI infoframe can then be used to inform the monitor
2655 * which quantization range (full or limited) is used.
2657 bool drm_rgb_quant_range_selectable(struct edid *edid)
2662 edid_ext = drm_find_cea_extension(edid);
2666 if (cea_db_offsets(edid_ext, &start, &end))
2669 for_each_cea_db(edid_ext, i, start, end) {
2670 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
2671 cea_db_payload_len(&edid_ext[i]) == 2) {
2672 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
2673 return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
2679 EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
2682 * drm_add_display_info - pull display info out if present
2684 * @info: display info (attached to connector)
2686 * Grab any available display info and stuff it into the drm_display_info
2687 * structure that's part of the connector. Useful for tracking bpp and
2690 static void drm_add_display_info(struct edid *edid,
2691 struct drm_display_info *info)
2695 info->width_mm = edid->width_cm * 10;
2696 info->height_mm = edid->height_cm * 10;
2698 /* driver figures it out in this case */
2700 info->color_formats = 0;
2702 if (edid->revision < 3)
2705 if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
2708 /* Get data from CEA blocks if present */
2709 edid_ext = drm_find_cea_extension(edid);
2711 info->cea_rev = edid_ext[1];
2713 /* The existence of a CEA block should imply RGB support */
2714 info->color_formats = DRM_COLOR_FORMAT_RGB444;
2715 if (edid_ext[3] & EDID_CEA_YCRCB444)
2716 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
2717 if (edid_ext[3] & EDID_CEA_YCRCB422)
2718 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
2721 /* Only defined for 1.4 with digital displays */
2722 if (edid->revision < 4)
2725 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
2726 case DRM_EDID_DIGITAL_DEPTH_6:
2729 case DRM_EDID_DIGITAL_DEPTH_8:
2732 case DRM_EDID_DIGITAL_DEPTH_10:
2735 case DRM_EDID_DIGITAL_DEPTH_12:
2738 case DRM_EDID_DIGITAL_DEPTH_14:
2741 case DRM_EDID_DIGITAL_DEPTH_16:
2744 case DRM_EDID_DIGITAL_DEPTH_UNDEF:
2750 info->color_formats |= DRM_COLOR_FORMAT_RGB444;
2751 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
2752 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
2753 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
2754 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
2758 * drm_add_edid_modes - add modes from EDID data, if available
2759 * @connector: connector we're probing
2762 * Add the specified modes to the connector's mode list.
2764 * Return number of modes added or 0 if we couldn't find any.
2766 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
2774 if (!drm_edid_is_valid(edid)) {
2775 dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
2776 drm_get_connector_name(connector));
2780 quirks = edid_get_quirks(edid);
2783 * EDID spec says modes should be preferred in this order:
2784 * - preferred detailed mode
2785 * - other detailed modes from base block
2786 * - detailed modes from extension blocks
2787 * - CVT 3-byte code modes
2788 * - standard timing codes
2789 * - established timing codes
2790 * - modes inferred from GTF or CVT range information
2792 * We get this pretty much right.
2794 * XXX order for additional mode types in extension blocks?
2796 num_modes += add_detailed_modes(connector, edid, quirks);
2797 num_modes += add_cvt_modes(connector, edid);
2798 num_modes += add_standard_modes(connector, edid);
2799 num_modes += add_established_modes(connector, edid);
2800 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
2801 num_modes += add_inferred_modes(connector, edid);
2802 num_modes += add_cea_modes(connector, edid);
2804 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
2805 edid_fixup_preferred(connector, quirks);
2807 drm_add_display_info(edid, &connector->display_info);
2811 EXPORT_SYMBOL(drm_add_edid_modes);
2814 * drm_add_modes_noedid - add modes for the connectors without EDID
2815 * @connector: connector we're probing
2816 * @hdisplay: the horizontal display limit
2817 * @vdisplay: the vertical display limit
2819 * Add the specified modes to the connector's mode list. Only when the
2820 * hdisplay/vdisplay is not beyond the given limit, it will be added.
2822 * Return number of modes added or 0 if we couldn't find any.
2824 int drm_add_modes_noedid(struct drm_connector *connector,
2825 int hdisplay, int vdisplay)
2827 int i, count, num_modes = 0;
2828 struct drm_display_mode *mode;
2829 struct drm_device *dev = connector->dev;
2831 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
2837 for (i = 0; i < count; i++) {
2838 const struct drm_display_mode *ptr = &drm_dmt_modes[i];
2839 if (hdisplay && vdisplay) {
2841 * Only when two are valid, they will be used to check
2842 * whether the mode should be added to the mode list of
2845 if (ptr->hdisplay > hdisplay ||
2846 ptr->vdisplay > vdisplay)
2849 if (drm_mode_vrefresh(ptr) > 61)
2851 mode = drm_mode_duplicate(dev, ptr);
2853 drm_mode_probed_add(connector, mode);
2859 EXPORT_SYMBOL(drm_add_modes_noedid);
2862 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
2863 * data from a DRM display mode
2864 * @frame: HDMI AVI infoframe
2865 * @mode: DRM display mode
2867 * Returns 0 on success or a negative error code on failure.
2870 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
2871 const struct drm_display_mode *mode)
2875 if (!frame || !mode)
2878 err = hdmi_avi_infoframe_init(frame);
2882 frame->video_code = drm_match_cea_mode(mode);
2883 if (!frame->video_code)
2886 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
2887 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
2891 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);