3 * Copyright (C) 2011 Samsung Electronics Co.Ltd
5 * Joonyoung Shim <jy0922.shim@samsung.com>
6 * Inki Dae <inki.dae@samsung.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
16 #include <linux/kernel.h>
17 #include <linux/platform_device.h>
18 #include <linux/clk.h>
20 #include <linux/of_device.h>
21 #include <linux/pm_runtime.h>
23 #include <video/of_display_timing.h>
24 #include <video/of_videomode.h>
25 #include <video/samsung_fimd.h>
26 #include <drm/exynos_drm.h>
28 #include "exynos_drm_drv.h"
29 #include "exynos_drm_fbdev.h"
30 #include "exynos_drm_crtc.h"
31 #include "exynos_drm_iommu.h"
34 * FIMD stands for Fully Interactive Mobile Display and
35 * as a display controller, it transfers contents drawn on memory
36 * to a LCD Panel through Display Interfaces such as RGB or
40 #define FIMD_DEFAULT_FRAMERATE 60
42 /* position control register for hardware window 0, 2 ~ 4.*/
43 #define VIDOSD_A(win) (VIDOSD_BASE + 0x00 + (win) * 16)
44 #define VIDOSD_B(win) (VIDOSD_BASE + 0x04 + (win) * 16)
46 * size control register for hardware windows 0 and alpha control register
47 * for hardware windows 1 ~ 4
49 #define VIDOSD_C(win) (VIDOSD_BASE + 0x08 + (win) * 16)
50 /* size control register for hardware windows 1 ~ 2. */
51 #define VIDOSD_D(win) (VIDOSD_BASE + 0x0C + (win) * 16)
53 #define VIDWx_BUF_START(win, buf) (VIDW_BUF_START(buf) + (win) * 8)
54 #define VIDWx_BUF_END(win, buf) (VIDW_BUF_END(buf) + (win) * 8)
55 #define VIDWx_BUF_SIZE(win, buf) (VIDW_BUF_SIZE(buf) + (win) * 4)
57 /* color key control register for hardware window 1 ~ 4. */
58 #define WKEYCON0_BASE(x) ((WKEYCON0 + 0x140) + ((x - 1) * 8))
59 /* color key value register for hardware window 1 ~ 4. */
60 #define WKEYCON1_BASE(x) ((WKEYCON1 + 0x140) + ((x - 1) * 8))
62 /* FIMD has totally five hardware windows. */
65 #define get_fimd_manager(mgr) platform_get_drvdata(to_platform_device(dev))
67 struct fimd_driver_data {
68 unsigned int timing_base;
70 unsigned int has_shadowcon:1;
71 unsigned int has_clksel:1;
72 unsigned int has_limited_fmt:1;
75 static struct fimd_driver_data s3c64xx_fimd_driver_data = {
81 static struct fimd_driver_data exynos4_fimd_driver_data = {
86 static struct fimd_driver_data exynos5_fimd_driver_data = {
87 .timing_base = 0x20000,
91 struct fimd_win_data {
92 unsigned int offset_x;
93 unsigned int offset_y;
94 unsigned int ovl_width;
95 unsigned int ovl_height;
96 unsigned int fb_width;
97 unsigned int fb_height;
99 unsigned int pixel_format;
101 unsigned int buf_offsize;
102 unsigned int line_size; /* bytes */
107 struct fimd_context {
109 struct drm_device *drm_dev;
113 struct drm_display_mode mode;
114 struct fimd_win_data win_data[WINDOWS_NR];
115 unsigned int default_win;
116 unsigned long irq_flags;
121 wait_queue_head_t wait_vsync_queue;
122 atomic_t wait_vsync_event;
124 struct exynos_drm_panel_info panel;
125 struct fimd_driver_data *driver_data;
128 static const struct of_device_id fimd_driver_dt_match[] = {
129 { .compatible = "samsung,s3c6400-fimd",
130 .data = &s3c64xx_fimd_driver_data },
131 { .compatible = "samsung,exynos4210-fimd",
132 .data = &exynos4_fimd_driver_data },
133 { .compatible = "samsung,exynos5250-fimd",
134 .data = &exynos5_fimd_driver_data },
138 static inline struct fimd_driver_data *drm_fimd_get_driver_data(
139 struct platform_device *pdev)
141 const struct of_device_id *of_id =
142 of_match_device(fimd_driver_dt_match, &pdev->dev);
144 return (struct fimd_driver_data *)of_id->data;
147 static bool fimd_display_is_connected(struct exynos_drm_display *display)
154 static void *fimd_get_panel(struct exynos_drm_display *display)
156 struct fimd_context *ctx = display->ctx;
161 static int fimd_check_mode(struct exynos_drm_display *display,
162 struct drm_display_mode *mode)
169 static struct exynos_drm_display_ops fimd_display_ops = {
170 .is_connected = fimd_display_is_connected,
171 .get_panel = fimd_get_panel,
172 .check_mode = fimd_check_mode,
175 static struct exynos_drm_display fimd_display = {
176 .type = EXYNOS_DISPLAY_TYPE_LCD,
177 .ops = &fimd_display_ops,
180 static int fimd_mgr_initialize(struct exynos_drm_manager *mgr,
181 struct drm_device *drm_dev, int pipe)
183 struct fimd_context *ctx = mgr->ctx;
185 ctx->drm_dev = drm_dev;
189 * enable drm irq mode.
190 * - with irq_enabled = true, we can use the vblank feature.
192 * P.S. note that we wouldn't use drm irq handler but
193 * just specific driver own one instead because
194 * drm framework supports only one irq handler.
196 drm_dev->irq_enabled = true;
199 * with vblank_disable_allowed = true, vblank interrupt will be disabled
200 * by drm timer once a current process gives up ownership of
201 * vblank event.(after drm_vblank_put function is called)
203 drm_dev->vblank_disable_allowed = true;
205 /* attach this sub driver to iommu mapping if supported. */
206 if (is_drm_iommu_supported(ctx->drm_dev))
207 drm_iommu_attach_device(ctx->drm_dev, ctx->dev);
212 static void fimd_mgr_remove(struct exynos_drm_manager *mgr)
214 struct fimd_context *ctx = mgr->ctx;
216 /* detach this sub driver from iommu mapping if supported. */
217 if (is_drm_iommu_supported(ctx->drm_dev))
218 drm_iommu_detach_device(ctx->drm_dev, ctx->dev);
221 static u32 fimd_calc_clkdiv(struct fimd_context *ctx,
222 const struct drm_display_mode *mode)
224 unsigned long ideal_clk = mode->htotal * mode->vtotal * mode->vrefresh;
227 /* Find the clock divider value that gets us closest to ideal_clk */
228 clkdiv = DIV_ROUND_UP(clk_get_rate(ctx->lcd_clk), ideal_clk);
230 return (clkdiv < 0x100) ? clkdiv : 0xff;
233 static bool fimd_mode_fixup(struct exynos_drm_manager *mgr,
234 const struct drm_display_mode *mode,
235 struct drm_display_mode *adjusted_mode)
237 if (adjusted_mode->vrefresh == 0)
238 adjusted_mode->vrefresh = FIMD_DEFAULT_FRAMERATE;
243 static void fimd_mode_set(struct exynos_drm_manager *mgr,
244 const struct drm_display_mode *in_mode)
246 struct fimd_context *ctx = mgr->ctx;
248 drm_mode_copy(&ctx->mode, in_mode);
251 static void fimd_commit(struct exynos_drm_manager *mgr)
253 struct fimd_context *ctx = mgr->ctx;
254 struct drm_display_mode *mode = &ctx->mode;
255 struct fimd_driver_data *driver_data;
257 int hblank, vblank, vsync_len, vbpd, vfpd, hsync_len, hbpd, hfpd;
259 driver_data = ctx->driver_data;
263 /* nothing to do if we haven't set the mode yet */
264 if (mode->htotal == 0 || mode->vtotal == 0)
267 /* setup polarity values from machine code. */
268 writel(ctx->vidcon1, ctx->regs + driver_data->timing_base + VIDCON1);
270 /* setup vertical timing values. */
271 vblank = mode->crtc_vblank_end - mode->crtc_vblank_start;
272 vsync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
273 vbpd = (vblank - vsync_len) / 2;
274 vfpd = vblank - vsync_len - vbpd;
276 val = VIDTCON0_VBPD(vbpd - 1) |
277 VIDTCON0_VFPD(vfpd - 1) |
278 VIDTCON0_VSPW(vsync_len - 1);
279 writel(val, ctx->regs + driver_data->timing_base + VIDTCON0);
281 /* setup horizontal timing values. */
282 hblank = mode->crtc_hblank_end - mode->crtc_hblank_start;
283 hsync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
284 hbpd = (hblank - hsync_len) / 2;
285 hfpd = hblank - hsync_len - hbpd;
287 val = VIDTCON1_HBPD(hbpd - 1) |
288 VIDTCON1_HFPD(hfpd - 1) |
289 VIDTCON1_HSPW(hsync_len - 1);
290 writel(val, ctx->regs + driver_data->timing_base + VIDTCON1);
292 /* setup horizontal and vertical display size. */
293 val = VIDTCON2_LINEVAL(mode->vdisplay - 1) |
294 VIDTCON2_HOZVAL(mode->hdisplay - 1) |
295 VIDTCON2_LINEVAL_E(mode->vdisplay - 1) |
296 VIDTCON2_HOZVAL_E(mode->hdisplay - 1);
297 writel(val, ctx->regs + driver_data->timing_base + VIDTCON2);
299 /* setup clock source, clock divider, enable dma. */
301 val &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
303 if (ctx->driver_data->has_clksel) {
304 val &= ~VIDCON0_CLKSEL_MASK;
305 val |= VIDCON0_CLKSEL_LCD;
308 clkdiv = fimd_calc_clkdiv(ctx, mode);
310 val |= VIDCON0_CLKVAL_F(clkdiv - 1) | VIDCON0_CLKDIR;
312 val &= ~VIDCON0_CLKDIR; /* 1:1 clock */
315 * fields of register with prefix '_F' would be updated
316 * at vsync(same as dma start)
318 val |= VIDCON0_ENVID | VIDCON0_ENVID_F;
319 writel(val, ctx->regs + VIDCON0);
322 static int fimd_enable_vblank(struct exynos_drm_manager *mgr)
324 struct fimd_context *ctx = mgr->ctx;
330 if (!test_and_set_bit(0, &ctx->irq_flags)) {
331 val = readl(ctx->regs + VIDINTCON0);
333 val |= VIDINTCON0_INT_ENABLE;
334 val |= VIDINTCON0_INT_FRAME;
336 val &= ~VIDINTCON0_FRAMESEL0_MASK;
337 val |= VIDINTCON0_FRAMESEL0_VSYNC;
338 val &= ~VIDINTCON0_FRAMESEL1_MASK;
339 val |= VIDINTCON0_FRAMESEL1_NONE;
341 writel(val, ctx->regs + VIDINTCON0);
347 static void fimd_disable_vblank(struct exynos_drm_manager *mgr)
349 struct fimd_context *ctx = mgr->ctx;
355 if (test_and_clear_bit(0, &ctx->irq_flags)) {
356 val = readl(ctx->regs + VIDINTCON0);
358 val &= ~VIDINTCON0_INT_FRAME;
359 val &= ~VIDINTCON0_INT_ENABLE;
361 writel(val, ctx->regs + VIDINTCON0);
365 static void fimd_wait_for_vblank(struct exynos_drm_manager *mgr)
367 struct fimd_context *ctx = mgr->ctx;
372 atomic_set(&ctx->wait_vsync_event, 1);
375 * wait for FIMD to signal VSYNC interrupt or return after
376 * timeout which is set to 50ms (refresh rate of 20).
378 if (!wait_event_timeout(ctx->wait_vsync_queue,
379 !atomic_read(&ctx->wait_vsync_event),
381 DRM_DEBUG_KMS("vblank wait timed out.\n");
384 static void fimd_win_mode_set(struct exynos_drm_manager *mgr,
385 struct exynos_drm_overlay *overlay)
387 struct fimd_context *ctx = mgr->ctx;
388 struct fimd_win_data *win_data;
390 unsigned long offset;
393 DRM_ERROR("overlay is NULL\n");
398 if (win == DEFAULT_ZPOS)
399 win = ctx->default_win;
401 if (win < 0 || win >= WINDOWS_NR)
404 offset = overlay->fb_x * (overlay->bpp >> 3);
405 offset += overlay->fb_y * overlay->pitch;
407 DRM_DEBUG_KMS("offset = 0x%lx, pitch = %x\n", offset, overlay->pitch);
409 win_data = &ctx->win_data[win];
411 win_data->offset_x = overlay->crtc_x;
412 win_data->offset_y = overlay->crtc_y;
413 win_data->ovl_width = overlay->crtc_width;
414 win_data->ovl_height = overlay->crtc_height;
415 win_data->fb_width = overlay->fb_width;
416 win_data->fb_height = overlay->fb_height;
417 win_data->dma_addr = overlay->dma_addr[0] + offset;
418 win_data->bpp = overlay->bpp;
419 win_data->pixel_format = overlay->pixel_format;
420 win_data->buf_offsize = (overlay->fb_width - overlay->crtc_width) *
422 win_data->line_size = overlay->crtc_width * (overlay->bpp >> 3);
424 DRM_DEBUG_KMS("offset_x = %d, offset_y = %d\n",
425 win_data->offset_x, win_data->offset_y);
426 DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
427 win_data->ovl_width, win_data->ovl_height);
428 DRM_DEBUG_KMS("paddr = 0x%lx\n", (unsigned long)win_data->dma_addr);
429 DRM_DEBUG_KMS("fb_width = %d, crtc_width = %d\n",
430 overlay->fb_width, overlay->crtc_width);
433 static void fimd_win_set_pixfmt(struct fimd_context *ctx, unsigned int win)
435 struct fimd_win_data *win_data = &ctx->win_data[win];
441 * In case of s3c64xx, window 0 doesn't support alpha channel.
442 * So the request format is ARGB8888 then change it to XRGB8888.
444 if (ctx->driver_data->has_limited_fmt && !win) {
445 if (win_data->pixel_format == DRM_FORMAT_ARGB8888)
446 win_data->pixel_format = DRM_FORMAT_XRGB8888;
449 switch (win_data->pixel_format) {
451 val |= WINCON0_BPPMODE_8BPP_PALETTE;
452 val |= WINCONx_BURSTLEN_8WORD;
453 val |= WINCONx_BYTSWP;
455 case DRM_FORMAT_XRGB1555:
456 val |= WINCON0_BPPMODE_16BPP_1555;
457 val |= WINCONx_HAWSWP;
458 val |= WINCONx_BURSTLEN_16WORD;
460 case DRM_FORMAT_RGB565:
461 val |= WINCON0_BPPMODE_16BPP_565;
462 val |= WINCONx_HAWSWP;
463 val |= WINCONx_BURSTLEN_16WORD;
465 case DRM_FORMAT_XRGB8888:
466 val |= WINCON0_BPPMODE_24BPP_888;
468 val |= WINCONx_BURSTLEN_16WORD;
470 case DRM_FORMAT_ARGB8888:
471 val |= WINCON1_BPPMODE_25BPP_A1888
472 | WINCON1_BLD_PIX | WINCON1_ALPHA_SEL;
474 val |= WINCONx_BURSTLEN_16WORD;
477 DRM_DEBUG_KMS("invalid pixel size so using unpacked 24bpp.\n");
479 val |= WINCON0_BPPMODE_24BPP_888;
481 val |= WINCONx_BURSTLEN_16WORD;
485 DRM_DEBUG_KMS("bpp = %d\n", win_data->bpp);
487 writel(val, ctx->regs + WINCON(win));
490 static void fimd_win_set_colkey(struct fimd_context *ctx, unsigned int win)
492 unsigned int keycon0 = 0, keycon1 = 0;
494 keycon0 = ~(WxKEYCON0_KEYBL_EN | WxKEYCON0_KEYEN_F |
495 WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0);
497 keycon1 = WxKEYCON1_COLVAL(0xffffffff);
499 writel(keycon0, ctx->regs + WKEYCON0_BASE(win));
500 writel(keycon1, ctx->regs + WKEYCON1_BASE(win));
504 * shadow_protect_win() - disable updating values from shadow registers at vsync
506 * @win: window to protect registers for
507 * @protect: 1 to protect (disable updates)
509 static void fimd_shadow_protect_win(struct fimd_context *ctx,
510 int win, bool protect)
514 if (ctx->driver_data->has_shadowcon) {
516 bits = SHADOWCON_WINx_PROTECT(win);
519 bits = PRTCON_PROTECT;
522 val = readl(ctx->regs + reg);
527 writel(val, ctx->regs + reg);
530 static void fimd_win_commit(struct exynos_drm_manager *mgr, int zpos)
532 struct fimd_context *ctx = mgr->ctx;
533 struct fimd_win_data *win_data;
535 unsigned long val, alpha, size;
542 if (win == DEFAULT_ZPOS)
543 win = ctx->default_win;
545 if (win < 0 || win >= WINDOWS_NR)
548 win_data = &ctx->win_data[win];
551 * SHADOWCON/PRTCON register is used for enabling timing.
553 * for example, once only width value of a register is set,
554 * if the dma is started then fimd hardware could malfunction so
555 * with protect window setting, the register fields with prefix '_F'
556 * wouldn't be updated at vsync also but updated once unprotect window
560 /* protect windows */
561 fimd_shadow_protect_win(ctx, win, true);
563 /* buffer start address */
564 val = (unsigned long)win_data->dma_addr;
565 writel(val, ctx->regs + VIDWx_BUF_START(win, 0));
567 /* buffer end address */
568 size = win_data->fb_width * win_data->ovl_height * (win_data->bpp >> 3);
569 val = (unsigned long)(win_data->dma_addr + size);
570 writel(val, ctx->regs + VIDWx_BUF_END(win, 0));
572 DRM_DEBUG_KMS("start addr = 0x%lx, end addr = 0x%lx, size = 0x%lx\n",
573 (unsigned long)win_data->dma_addr, val, size);
574 DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
575 win_data->ovl_width, win_data->ovl_height);
578 val = VIDW_BUF_SIZE_OFFSET(win_data->buf_offsize) |
579 VIDW_BUF_SIZE_PAGEWIDTH(win_data->line_size) |
580 VIDW_BUF_SIZE_OFFSET_E(win_data->buf_offsize) |
581 VIDW_BUF_SIZE_PAGEWIDTH_E(win_data->line_size);
582 writel(val, ctx->regs + VIDWx_BUF_SIZE(win, 0));
585 val = VIDOSDxA_TOPLEFT_X(win_data->offset_x) |
586 VIDOSDxA_TOPLEFT_Y(win_data->offset_y) |
587 VIDOSDxA_TOPLEFT_X_E(win_data->offset_x) |
588 VIDOSDxA_TOPLEFT_Y_E(win_data->offset_y);
589 writel(val, ctx->regs + VIDOSD_A(win));
591 last_x = win_data->offset_x + win_data->ovl_width;
594 last_y = win_data->offset_y + win_data->ovl_height;
598 val = VIDOSDxB_BOTRIGHT_X(last_x) | VIDOSDxB_BOTRIGHT_Y(last_y) |
599 VIDOSDxB_BOTRIGHT_X_E(last_x) | VIDOSDxB_BOTRIGHT_Y_E(last_y);
601 writel(val, ctx->regs + VIDOSD_B(win));
603 DRM_DEBUG_KMS("osd pos: tx = %d, ty = %d, bx = %d, by = %d\n",
604 win_data->offset_x, win_data->offset_y, last_x, last_y);
606 /* hardware window 0 doesn't support alpha channel. */
609 alpha = VIDISD14C_ALPHA1_R(0xf) |
610 VIDISD14C_ALPHA1_G(0xf) |
611 VIDISD14C_ALPHA1_B(0xf);
613 writel(alpha, ctx->regs + VIDOSD_C(win));
617 if (win != 3 && win != 4) {
618 u32 offset = VIDOSD_D(win);
620 offset = VIDOSD_C(win);
621 val = win_data->ovl_width * win_data->ovl_height;
622 writel(val, ctx->regs + offset);
624 DRM_DEBUG_KMS("osd size = 0x%x\n", (unsigned int)val);
627 fimd_win_set_pixfmt(ctx, win);
629 /* hardware window 0 doesn't support color key. */
631 fimd_win_set_colkey(ctx, win);
634 val = readl(ctx->regs + WINCON(win));
635 val |= WINCONx_ENWIN;
636 writel(val, ctx->regs + WINCON(win));
638 /* Enable DMA channel and unprotect windows */
639 fimd_shadow_protect_win(ctx, win, false);
641 if (ctx->driver_data->has_shadowcon) {
642 val = readl(ctx->regs + SHADOWCON);
643 val |= SHADOWCON_CHx_ENABLE(win);
644 writel(val, ctx->regs + SHADOWCON);
647 win_data->enabled = true;
650 static void fimd_win_disable(struct exynos_drm_manager *mgr, int zpos)
652 struct fimd_context *ctx = mgr->ctx;
653 struct fimd_win_data *win_data;
657 if (win == DEFAULT_ZPOS)
658 win = ctx->default_win;
660 if (win < 0 || win >= WINDOWS_NR)
663 win_data = &ctx->win_data[win];
665 if (ctx->suspended) {
666 /* do not resume this window*/
667 win_data->resume = false;
671 /* protect windows */
672 fimd_shadow_protect_win(ctx, win, true);
675 val = readl(ctx->regs + WINCON(win));
676 val &= ~WINCONx_ENWIN;
677 writel(val, ctx->regs + WINCON(win));
679 /* unprotect windows */
680 if (ctx->driver_data->has_shadowcon) {
681 val = readl(ctx->regs + SHADOWCON);
682 val &= ~SHADOWCON_CHx_ENABLE(win);
683 writel(val, ctx->regs + SHADOWCON);
686 fimd_shadow_protect_win(ctx, win, false);
688 win_data->enabled = false;
691 static void fimd_dpms(struct exynos_drm_manager *mgr, int mode)
693 struct fimd_context *ctx = mgr->ctx;
695 DRM_DEBUG_KMS("%d\n", mode);
698 case DRM_MODE_DPMS_ON:
700 * enable fimd hardware only if suspended status.
702 * P.S. fimd_dpms function would be called at booting time so
703 * clk_enable could be called double time.
706 pm_runtime_get_sync(ctx->dev);
708 case DRM_MODE_DPMS_STANDBY:
709 case DRM_MODE_DPMS_SUSPEND:
710 case DRM_MODE_DPMS_OFF:
712 pm_runtime_put_sync(ctx->dev);
715 DRM_DEBUG_KMS("unspecified mode %d\n", mode);
720 static struct exynos_drm_manager_ops fimd_manager_ops = {
721 .initialize = fimd_mgr_initialize,
722 .remove = fimd_mgr_remove,
724 .mode_fixup = fimd_mode_fixup,
725 .mode_set = fimd_mode_set,
726 .commit = fimd_commit,
727 .enable_vblank = fimd_enable_vblank,
728 .disable_vblank = fimd_disable_vblank,
729 .wait_for_vblank = fimd_wait_for_vblank,
730 .win_mode_set = fimd_win_mode_set,
731 .win_commit = fimd_win_commit,
732 .win_disable = fimd_win_disable,
735 static struct exynos_drm_manager fimd_manager = {
736 .type = EXYNOS_DISPLAY_TYPE_LCD,
737 .ops = &fimd_manager_ops,
740 static irqreturn_t fimd_irq_handler(int irq, void *dev_id)
742 struct fimd_context *ctx = (struct fimd_context *)dev_id;
745 val = readl(ctx->regs + VIDINTCON1);
747 if (val & VIDINTCON1_INT_FRAME)
748 /* VSYNC interrupt */
749 writel(VIDINTCON1_INT_FRAME, ctx->regs + VIDINTCON1);
751 /* check the crtc is detached already from encoder */
752 if (ctx->pipe < 0 || !ctx->drm_dev)
755 drm_handle_vblank(ctx->drm_dev, ctx->pipe);
756 exynos_drm_crtc_finish_pageflip(ctx->drm_dev, ctx->pipe);
758 /* set wait vsync event to zero and wake up queue. */
759 if (atomic_read(&ctx->wait_vsync_event)) {
760 atomic_set(&ctx->wait_vsync_event, 0);
761 wake_up(&ctx->wait_vsync_queue);
767 static void fimd_clear_win(struct fimd_context *ctx, int win)
769 writel(0, ctx->regs + WINCON(win));
770 writel(0, ctx->regs + VIDOSD_A(win));
771 writel(0, ctx->regs + VIDOSD_B(win));
772 writel(0, ctx->regs + VIDOSD_C(win));
774 if (win == 1 || win == 2)
775 writel(0, ctx->regs + VIDOSD_D(win));
777 fimd_shadow_protect_win(ctx, win, false);
780 static int fimd_clock(struct fimd_context *ctx, bool enable)
785 ret = clk_prepare_enable(ctx->bus_clk);
789 ret = clk_prepare_enable(ctx->lcd_clk);
791 clk_disable_unprepare(ctx->bus_clk);
795 clk_disable_unprepare(ctx->lcd_clk);
796 clk_disable_unprepare(ctx->bus_clk);
802 static void fimd_window_suspend(struct exynos_drm_manager *mgr)
804 struct fimd_context *ctx = mgr->ctx;
805 struct fimd_win_data *win_data;
808 for (i = 0; i < WINDOWS_NR; i++) {
809 win_data = &ctx->win_data[i];
810 win_data->resume = win_data->enabled;
811 fimd_win_disable(mgr, i);
813 fimd_wait_for_vblank(mgr);
816 static void fimd_window_resume(struct exynos_drm_manager *mgr)
818 struct fimd_context *ctx = mgr->ctx;
819 struct fimd_win_data *win_data;
822 for (i = 0; i < WINDOWS_NR; i++) {
823 win_data = &ctx->win_data[i];
824 win_data->enabled = win_data->resume;
825 win_data->resume = false;
829 static void fimd_apply(struct exynos_drm_manager *mgr)
831 struct fimd_context *ctx = mgr->ctx;
832 struct fimd_win_data *win_data;
835 for (i = 0; i < WINDOWS_NR; i++) {
836 win_data = &ctx->win_data[i];
837 if (win_data->enabled)
838 fimd_win_commit(mgr, i);
844 static int fimd_activate(struct exynos_drm_manager *mgr, bool enable)
846 struct fimd_context *ctx = mgr->ctx;
851 ret = fimd_clock(ctx, true);
855 ctx->suspended = false;
857 /* if vblank was enabled status, enable it again. */
858 if (test_and_clear_bit(0, &ctx->irq_flags))
859 fimd_enable_vblank(mgr);
861 fimd_window_resume(mgr);
865 fimd_window_suspend(mgr);
867 fimd_clock(ctx, false);
868 ctx->suspended = true;
874 static int fimd_get_platform_data(struct fimd_context *ctx, struct device *dev)
876 struct videomode *vm;
880 ret = of_get_videomode(dev->of_node, vm, OF_USE_NATIVE_MODE);
882 DRM_ERROR("failed: of_get_videomode() : %d\n", ret);
886 if (vm->flags & DISPLAY_FLAGS_VSYNC_LOW)
887 ctx->vidcon1 |= VIDCON1_INV_VSYNC;
888 if (vm->flags & DISPLAY_FLAGS_HSYNC_LOW)
889 ctx->vidcon1 |= VIDCON1_INV_HSYNC;
890 if (vm->flags & DISPLAY_FLAGS_DE_LOW)
891 ctx->vidcon1 |= VIDCON1_INV_VDEN;
892 if (vm->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
893 ctx->vidcon1 |= VIDCON1_INV_VCLK;
898 static int fimd_probe(struct platform_device *pdev)
900 struct device *dev = &pdev->dev;
901 struct fimd_context *ctx;
902 struct resource *res;
909 ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
915 ret = fimd_get_platform_data(ctx, dev);
919 ctx->bus_clk = devm_clk_get(dev, "fimd");
920 if (IS_ERR(ctx->bus_clk)) {
921 dev_err(dev, "failed to get bus clock\n");
922 return PTR_ERR(ctx->bus_clk);
925 ctx->lcd_clk = devm_clk_get(dev, "sclk_fimd");
926 if (IS_ERR(ctx->lcd_clk)) {
927 dev_err(dev, "failed to get lcd clock\n");
928 return PTR_ERR(ctx->lcd_clk);
931 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
933 ctx->regs = devm_ioremap_resource(dev, res);
934 if (IS_ERR(ctx->regs))
935 return PTR_ERR(ctx->regs);
937 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "vsync");
939 dev_err(dev, "irq request failed.\n");
943 ret = devm_request_irq(dev, res->start, fimd_irq_handler,
946 dev_err(dev, "irq request failed.\n");
950 ctx->driver_data = drm_fimd_get_driver_data(pdev);
951 init_waitqueue_head(&ctx->wait_vsync_queue);
952 atomic_set(&ctx->wait_vsync_event, 0);
954 platform_set_drvdata(pdev, &fimd_manager);
956 fimd_manager.ctx = ctx;
957 exynos_drm_manager_register(&fimd_manager);
959 fimd_display.ctx = ctx;
960 exynos_drm_display_register(&fimd_display);
962 pm_runtime_enable(dev);
963 pm_runtime_get_sync(dev);
965 for (win = 0; win < WINDOWS_NR; win++)
966 fimd_clear_win(ctx, win);
971 static int fimd_remove(struct platform_device *pdev)
973 struct device *dev = &pdev->dev;
974 struct exynos_drm_manager *mgr = platform_get_drvdata(pdev);
975 struct fimd_context *ctx = mgr->ctx;
977 exynos_drm_display_unregister(&fimd_display);
978 exynos_drm_manager_unregister(&fimd_manager);
983 pm_runtime_set_suspended(dev);
984 pm_runtime_put_sync(dev);
987 pm_runtime_disable(dev);
992 #ifdef CONFIG_PM_SLEEP
993 static int fimd_suspend(struct device *dev)
995 struct exynos_drm_manager *mgr = get_fimd_manager(dev);
998 * do not use pm_runtime_suspend(). if pm_runtime_suspend() is
999 * called here, an error would be returned by that interface
1000 * because the usage_count of pm runtime is more than 1.
1002 if (!pm_runtime_suspended(dev))
1003 return fimd_activate(mgr, false);
1008 static int fimd_resume(struct device *dev)
1010 struct exynos_drm_manager *mgr = get_fimd_manager(dev);
1013 * if entered to sleep when lcd panel was on, the usage_count
1014 * of pm runtime would still be 1 so in this case, fimd driver
1015 * should be on directly not drawing on pm runtime interface.
1017 if (pm_runtime_suspended(dev))
1020 return fimd_activate(mgr, true);
1024 #ifdef CONFIG_PM_RUNTIME
1025 static int fimd_runtime_suspend(struct device *dev)
1027 struct exynos_drm_manager *mgr = get_fimd_manager(dev);
1029 return fimd_activate(mgr, false);
1032 static int fimd_runtime_resume(struct device *dev)
1034 struct exynos_drm_manager *mgr = get_fimd_manager(dev);
1036 return fimd_activate(mgr, true);
1040 static const struct dev_pm_ops fimd_pm_ops = {
1041 SET_SYSTEM_SLEEP_PM_OPS(fimd_suspend, fimd_resume)
1042 SET_RUNTIME_PM_OPS(fimd_runtime_suspend, fimd_runtime_resume, NULL)
1045 struct platform_driver fimd_driver = {
1046 .probe = fimd_probe,
1047 .remove = fimd_remove,
1049 .name = "exynos4-fb",
1050 .owner = THIS_MODULE,
1052 .of_match_table = fimd_driver_dt_match,