drivers/gpu/drm/exynos/exynos_drm_fimd.c

   1 /* exynos_drm_fimd.c
   2  *
   3  * Copyright (C) 2011 Samsung Electronics Co.Ltd
   4  * Authors:
   5  *      Joonyoung Shim <jy0922.shim@samsung.com>
   6  *      Inki Dae <inki.dae@samsung.com>
   7  *
   8  * This program is free software; you can redistribute  it and/or modify it
   9  * under  the terms of  the GNU General  Public License as published by the
  10  * Free Software Foundation;  either version 2 of the  License, or (at your
  11  * option) any later version.
  12  *
  13  */
  14 #include <drm/drmP.h>
  15
  16 #include <linux/kernel.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/clk.h>
  19 #include <linux/of.h>
  20 #include <linux/of_device.h>
  21 #include <linux/pm_runtime.h>
  22
  23 #include <video/of_display_timing.h>
  24 #include <video/of_videomode.h>
  25 #include <video/samsung_fimd.h>
  26 #include <drm/exynos_drm.h>
  27
  28 #include "exynos_drm_drv.h"
  29 #include "exynos_drm_fbdev.h"
  30 #include "exynos_drm_crtc.h"
  31 #include "exynos_drm_iommu.h"
  32
  33 /*
  34  * FIMD stands for Fully Interactive Mobile Display and
  35  * as a display controller, it transfers contents drawn on memory
  36  * to a LCD Panel through Display Interfaces such as RGB or
  37  * CPU Interface.
  38  */
  39
  40 #define FIMD_DEFAULT_FRAMERATE 60
  41
  42 /* position control register for hardware window 0, 2 ~ 4.*/
  43 #define VIDOSD_A(win)           (VIDOSD_BASE + 0x00 + (win) * 16)
  44 #define VIDOSD_B(win)           (VIDOSD_BASE + 0x04 + (win) * 16)
  45 /*
  46  * size control register for hardware windows 0 and alpha control register
  47  * for hardware windows 1 ~ 4
  48  */
  49 #define VIDOSD_C(win)           (VIDOSD_BASE + 0x08 + (win) * 16)
  50 /* size control register for hardware windows 1 ~ 2. */
  51 #define VIDOSD_D(win)           (VIDOSD_BASE + 0x0C + (win) * 16)
  52
  53 #define VIDWx_BUF_START(win, buf)       (VIDW_BUF_START(buf) + (win) * 8)
  54 #define VIDWx_BUF_END(win, buf)         (VIDW_BUF_END(buf) + (win) * 8)
  55 #define VIDWx_BUF_SIZE(win, buf)        (VIDW_BUF_SIZE(buf) + (win) * 4)
  56
  57 /* color key control register for hardware window 1 ~ 4. */
  58 #define WKEYCON0_BASE(x)                ((WKEYCON0 + 0x140) + ((x - 1) * 8))
  59 /* color key value register for hardware window 1 ~ 4. */
  60 #define WKEYCON1_BASE(x)                ((WKEYCON1 + 0x140) + ((x - 1) * 8))
  61
  62 /* FIMD has totally five hardware windows. */
  63 #define WINDOWS_NR      5
  64
  65 #define get_fimd_context(dev)   platform_get_drvdata(to_platform_device(dev))
  66
  67 struct fimd_driver_data {
  68         unsigned int timing_base;
  69
  70         unsigned int has_shadowcon:1;
  71         unsigned int has_clksel:1;
  72         unsigned int has_limited_fmt:1;
  73 };
  74
  75 static struct fimd_driver_data s3c64xx_fimd_driver_data = {
  76         .timing_base = 0x0,
  77         .has_clksel = 1,
  78         .has_limited_fmt = 1,
  79 };
  80
  81 static struct fimd_driver_data exynos4_fimd_driver_data = {
  82         .timing_base = 0x0,
  83         .has_shadowcon = 1,
  84 };
  85
  86 static struct fimd_driver_data exynos5_fimd_driver_data = {
  87         .timing_base = 0x20000,
  88         .has_shadowcon = 1,
  89 };
  90
  91 struct fimd_win_data {
  92         unsigned int            offset_x;
  93         unsigned int            offset_y;
  94         unsigned int            ovl_width;
  95         unsigned int            ovl_height;
  96         unsigned int            fb_width;
  97         unsigned int            fb_height;
  98         unsigned int            bpp;
  99         unsigned int            pixel_format;
 100         dma_addr_t              dma_addr;
 101         unsigned int            buf_offsize;
 102         unsigned int            line_size;      /* bytes */
 103         bool                    enabled;
 104         bool                    resume;
 105 };
 106
 107 struct fimd_context {
 108         struct exynos_drm_subdrv        subdrv;
 109         struct drm_device               *drm_dev;
 110         int                             irq;
 111         struct drm_crtc                 *crtc;
 112         struct clk                      *bus_clk;
 113         struct clk                      *lcd_clk;
 114         void __iomem                    *regs;
 115         struct fimd_win_data            win_data[WINDOWS_NR];
 116         unsigned int                    clkdiv;
 117         unsigned int                    default_win;
 118         unsigned long                   irq_flags;
 119         u32                             vidcon0;
 120         u32                             vidcon1;
 121         bool                            suspended;
 122         struct mutex                    lock;
 123         wait_queue_head_t               wait_vsync_queue;
 124         atomic_t                        wait_vsync_event;
 125
 126         struct exynos_drm_panel_info panel;
 127         struct fimd_driver_data *driver_data;
 128 };
 129
 130 static const struct of_device_id fimd_driver_dt_match[] = {
 131         { .compatible = "samsung,s3c6400-fimd",
 132           .data = &s3c64xx_fimd_driver_data },
 133         { .compatible = "samsung,exynos4210-fimd",
 134           .data = &exynos4_fimd_driver_data },
 135         { .compatible = "samsung,exynos5250-fimd",
 136           .data = &exynos5_fimd_driver_data },
 137         {},
 138 };
 139
 140 static inline struct fimd_driver_data *drm_fimd_get_driver_data(
 141         struct platform_device *pdev)
 142 {
 143         const struct of_device_id *of_id =
 144                         of_match_device(fimd_driver_dt_match, &pdev->dev);
 145
 146         return (struct fimd_driver_data *)of_id->data;
 147 }
 148
 149 static bool fimd_display_is_connected(struct device *dev)
 150 {
 151         /* TODO. */
 152
 153         return true;
 154 }
 155
 156 static void *fimd_get_panel(struct device *dev)
 157 {
 158         struct fimd_context *ctx = get_fimd_context(dev);
 159
 160         return &ctx->panel;
 161 }
 162
 163 static int fimd_check_mode(struct device *dev, struct drm_display_mode *mode)
 164 {
 165         /* TODO. */
 166
 167         return 0;
 168 }
 169
 170 static int fimd_display_power_on(struct device *dev, int mode)
 171 {
 172         /* TODO */
 173
 174         return 0;
 175 }
 176
 177 static struct exynos_drm_display_ops fimd_display_ops = {
 178         .type = EXYNOS_DISPLAY_TYPE_LCD,
 179         .is_connected = fimd_display_is_connected,
 180         .get_panel = fimd_get_panel,
 181         .check_mode = fimd_check_mode,
 182         .power_on = fimd_display_power_on,
 183 };
 184
 185 static int fimd_mgr_initialize(struct device *subdrv_dev,
 186                 struct drm_device *drm_dev)
 187 {
 188         struct fimd_context *ctx = get_fimd_context(subdrv_dev);
 189
 190         ctx->drm_dev = drm_dev;
 191
 192         return 0;
 193 }
 194
 195 static void fimd_dpms(struct device *subdrv_dev, int mode)
 196 {
 197         struct fimd_context *ctx = get_fimd_context(subdrv_dev);
 198
 199         DRM_DEBUG_KMS("%d\n", mode);
 200
 201         mutex_lock(&ctx->lock);
 202
 203         switch (mode) {
 204         case DRM_MODE_DPMS_ON:
 205                 /*
 206                  * enable fimd hardware only if suspended status.
 207                  *
 208                  * P.S. fimd_dpms function would be called at booting time so
 209                  * clk_enable could be called double time.
 210                  */
 211                 if (ctx->suspended)
 212                         pm_runtime_get_sync(subdrv_dev);
 213                 break;
 214         case DRM_MODE_DPMS_STANDBY:
 215         case DRM_MODE_DPMS_SUSPEND:
 216         case DRM_MODE_DPMS_OFF:
 217                 if (!ctx->suspended)
 218                         pm_runtime_put_sync(subdrv_dev);
 219                 break;
 220         default:
 221                 DRM_DEBUG_KMS("unspecified mode %d\n", mode);
 222                 break;
 223         }
 224
 225         mutex_unlock(&ctx->lock);
 226 }
 227
 228 static void fimd_apply(struct device *subdrv_dev)
 229 {
 230         struct fimd_context *ctx = get_fimd_context(subdrv_dev);
 231         struct exynos_drm_manager *mgr = ctx->subdrv.manager;
 232         struct exynos_drm_manager_ops *mgr_ops = mgr->ops;
 233         struct fimd_win_data *win_data;
 234         int i;
 235
 236         for (i = 0; i < WINDOWS_NR; i++) {
 237                 win_data = &ctx->win_data[i];
 238                 if (win_data->enabled && (mgr_ops && mgr_ops->win_commit))
 239                         mgr_ops->win_commit(subdrv_dev, i);
 240         }
 241
 242         if (mgr_ops && mgr_ops->commit)
 243                 mgr_ops->commit(subdrv_dev);
 244 }
 245
 246 static void fimd_commit(struct device *dev)
 247 {
 248         struct fimd_context *ctx = get_fimd_context(dev);
 249         struct exynos_drm_panel_info *panel = &ctx->panel;
 250         struct videomode *vm = &panel->vm;
 251         struct fimd_driver_data *driver_data;
 252         u32 val;
 253
 254         driver_data = ctx->driver_data;
 255         if (ctx->suspended)
 256                 return;
 257
 258         /* setup polarity values from machine code. */
 259         writel(ctx->vidcon1, ctx->regs + driver_data->timing_base + VIDCON1);
 260
 261         /* setup vertical timing values. */
 262         val = VIDTCON0_VBPD(vm->vback_porch - 1) |
 263                VIDTCON0_VFPD(vm->vfront_porch - 1) |
 264                VIDTCON0_VSPW(vm->vsync_len - 1);
 265         writel(val, ctx->regs + driver_data->timing_base + VIDTCON0);
 266
 267         /* setup horizontal timing values.  */
 268         val = VIDTCON1_HBPD(vm->hback_porch - 1) |
 269                VIDTCON1_HFPD(vm->hfront_porch - 1) |
 270                VIDTCON1_HSPW(vm->hsync_len - 1);
 271         writel(val, ctx->regs + driver_data->timing_base + VIDTCON1);
 272
 273         /* setup horizontal and vertical display size. */
 274         val = VIDTCON2_LINEVAL(vm->vactive - 1) |
 275                VIDTCON2_HOZVAL(vm->hactive - 1) |
 276                VIDTCON2_LINEVAL_E(vm->vactive - 1) |
 277                VIDTCON2_HOZVAL_E(vm->hactive - 1);
 278         writel(val, ctx->regs + driver_data->timing_base + VIDTCON2);
 279
 280         /* setup clock source, clock divider, enable dma. */
 281         val = ctx->vidcon0;
 282         val &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR);
 283
 284         if (ctx->driver_data->has_clksel) {
 285                 val &= ~VIDCON0_CLKSEL_MASK;
 286                 val |= VIDCON0_CLKSEL_LCD;
 287         }
 288
 289         if (ctx->clkdiv > 1)
 290                 val |= VIDCON0_CLKVAL_F(ctx->clkdiv - 1) | VIDCON0_CLKDIR;
 291         else
 292                 val &= ~VIDCON0_CLKDIR; /* 1:1 clock */
 293
 294         /*
 295          * fields of register with prefix '_F' would be updated
 296          * at vsync(same as dma start)
 297          */
 298         val |= VIDCON0_ENVID | VIDCON0_ENVID_F;
 299         writel(val, ctx->regs + VIDCON0);
 300 }
 301
 302 static int fimd_enable_vblank(struct device *dev)
 303 {
 304         struct fimd_context *ctx = get_fimd_context(dev);
 305         u32 val;
 306
 307         if (ctx->suspended)
 308                 return -EPERM;
 309
 310         if (!test_and_set_bit(0, &ctx->irq_flags)) {
 311                 val = readl(ctx->regs + VIDINTCON0);
 312
 313                 val |= VIDINTCON0_INT_ENABLE;
 314                 val |= VIDINTCON0_INT_FRAME;
 315
 316                 val &= ~VIDINTCON0_FRAMESEL0_MASK;
 317                 val |= VIDINTCON0_FRAMESEL0_VSYNC;
 318                 val &= ~VIDINTCON0_FRAMESEL1_MASK;
 319                 val |= VIDINTCON0_FRAMESEL1_NONE;
 320
 321                 writel(val, ctx->regs + VIDINTCON0);
 322         }
 323
 324         return 0;
 325 }
 326
 327 static void fimd_disable_vblank(struct device *dev)
 328 {
 329         struct fimd_context *ctx = get_fimd_context(dev);
 330         u32 val;
 331
 332         if (ctx->suspended)
 333                 return;
 334
 335         if (test_and_clear_bit(0, &ctx->irq_flags)) {
 336                 val = readl(ctx->regs + VIDINTCON0);
 337
 338                 val &= ~VIDINTCON0_INT_FRAME;
 339                 val &= ~VIDINTCON0_INT_ENABLE;
 340
 341                 writel(val, ctx->regs + VIDINTCON0);
 342         }
 343 }
 344
 345 static void fimd_wait_for_vblank(struct device *dev)
 346 {
 347         struct fimd_context *ctx = get_fimd_context(dev);
 348
 349         if (ctx->suspended)
 350                 return;
 351
 352         atomic_set(&ctx->wait_vsync_event, 1);
 353
 354         /*
 355          * wait for FIMD to signal VSYNC interrupt or return after
 356          * timeout which is set to 50ms (refresh rate of 20).
 357          */
 358         if (!wait_event_timeout(ctx->wait_vsync_queue,
 359                                 !atomic_read(&ctx->wait_vsync_event),
 360                                 HZ/20))
 361                 DRM_DEBUG_KMS("vblank wait timed out.\n");
 362 }
 363
 364 static void fimd_win_mode_set(struct device *dev,
 365                               struct exynos_drm_overlay *overlay)
 366 {
 367         struct fimd_context *ctx = get_fimd_context(dev);
 368         struct fimd_win_data *win_data;
 369         int win;
 370         unsigned long offset;
 371
 372         if (!overlay) {
 373                 dev_err(dev, "overlay is NULL\n");
 374                 return;
 375         }
 376
 377         win = overlay->zpos;
 378         if (win == DEFAULT_ZPOS)
 379                 win = ctx->default_win;
 380
 381         if (win < 0 || win >= WINDOWS_NR)
 382                 return;
 383
 384         offset = overlay->fb_x * (overlay->bpp >> 3);
 385         offset += overlay->fb_y * overlay->pitch;
 386
 387         DRM_DEBUG_KMS("offset = 0x%lx, pitch = %x\n", offset, overlay->pitch);
 388
 389         win_data = &ctx->win_data[win];
 390
 391         win_data->offset_x = overlay->crtc_x;
 392         win_data->offset_y = overlay->crtc_y;
 393         win_data->ovl_width = overlay->crtc_width;
 394         win_data->ovl_height = overlay->crtc_height;
 395         win_data->fb_width = overlay->fb_width;
 396         win_data->fb_height = overlay->fb_height;
 397         win_data->dma_addr = overlay->dma_addr[0] + offset;
 398         win_data->bpp = overlay->bpp;
 399         win_data->pixel_format = overlay->pixel_format;
 400         win_data->buf_offsize = (overlay->fb_width - overlay->crtc_width) *
 401                                 (overlay->bpp >> 3);
 402         win_data->line_size = overlay->crtc_width * (overlay->bpp >> 3);
 403
 404         DRM_DEBUG_KMS("offset_x = %d, offset_y = %d\n",
 405                         win_data->offset_x, win_data->offset_y);
 406         DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
 407                         win_data->ovl_width, win_data->ovl_height);
 408         DRM_DEBUG_KMS("paddr = 0x%lx\n", (unsigned long)win_data->dma_addr);
 409         DRM_DEBUG_KMS("fb_width = %d, crtc_width = %d\n",
 410                         overlay->fb_width, overlay->crtc_width);
 411 }
 412
 413 static void fimd_win_set_pixfmt(struct device *dev, unsigned int win)
 414 {
 415         struct fimd_context *ctx = get_fimd_context(dev);
 416         struct fimd_win_data *win_data = &ctx->win_data[win];
 417         unsigned long val;
 418
 419         val = WINCONx_ENWIN;
 420
 421         /*
 422          * In case of s3c64xx, window 0 doesn't support alpha channel.
 423          * So the request format is ARGB8888 then change it to XRGB8888.
 424          */
 425         if (ctx->driver_data->has_limited_fmt && !win) {
 426                 if (win_data->pixel_format == DRM_FORMAT_ARGB8888)
 427                         win_data->pixel_format = DRM_FORMAT_XRGB8888;
 428         }
 429
 430         switch (win_data->pixel_format) {
 431         case DRM_FORMAT_C8:
 432                 val |= WINCON0_BPPMODE_8BPP_PALETTE;
 433                 val |= WINCONx_BURSTLEN_8WORD;
 434                 val |= WINCONx_BYTSWP;
 435                 break;
 436         case DRM_FORMAT_XRGB1555:
 437                 val |= WINCON0_BPPMODE_16BPP_1555;
 438                 val |= WINCONx_HAWSWP;
 439                 val |= WINCONx_BURSTLEN_16WORD;
 440                 break;
 441         case DRM_FORMAT_RGB565:
 442                 val |= WINCON0_BPPMODE_16BPP_565;
 443                 val |= WINCONx_HAWSWP;
 444                 val |= WINCONx_BURSTLEN_16WORD;
 445                 break;
 446         case DRM_FORMAT_XRGB8888:
 447                 val |= WINCON0_BPPMODE_24BPP_888;
 448                 val |= WINCONx_WSWP;
 449                 val |= WINCONx_BURSTLEN_16WORD;
 450                 break;
 451         case DRM_FORMAT_ARGB8888:
 452                 val |= WINCON1_BPPMODE_25BPP_A1888
 453                         | WINCON1_BLD_PIX | WINCON1_ALPHA_SEL;
 454                 val |= WINCONx_WSWP;
 455                 val |= WINCONx_BURSTLEN_16WORD;
 456                 break;
 457         default:
 458                 DRM_DEBUG_KMS("invalid pixel size so using unpacked 24bpp.\n");
 459
 460                 val |= WINCON0_BPPMODE_24BPP_888;
 461                 val |= WINCONx_WSWP;
 462                 val |= WINCONx_BURSTLEN_16WORD;
 463                 break;
 464         }
 465
 466         DRM_DEBUG_KMS("bpp = %d\n", win_data->bpp);
 467
 468         writel(val, ctx->regs + WINCON(win));
 469 }
 470
 471 static void fimd_win_set_colkey(struct device *dev, unsigned int win)
 472 {
 473         struct fimd_context *ctx = get_fimd_context(dev);
 474         unsigned int keycon0 = 0, keycon1 = 0;
 475
 476         keycon0 = ~(WxKEYCON0_KEYBL_EN | WxKEYCON0_KEYEN_F |
 477                         WxKEYCON0_DIRCON) | WxKEYCON0_COMPKEY(0);
 478
 479         keycon1 = WxKEYCON1_COLVAL(0xffffffff);
 480
 481         writel(keycon0, ctx->regs + WKEYCON0_BASE(win));
 482         writel(keycon1, ctx->regs + WKEYCON1_BASE(win));
 483 }
 484
 485 /**
 486  * shadow_protect_win() - disable updating values from shadow registers at vsync
 487  *
 488  * @win: window to protect registers for
 489  * @protect: 1 to protect (disable updates)
 490  */
 491 static void fimd_shadow_protect_win(struct fimd_context *ctx,
 492                                                         int win, bool protect)
 493 {
 494         u32 reg, bits, val;
 495
 496         if (ctx->driver_data->has_shadowcon) {
 497                 reg = SHADOWCON;
 498                 bits = SHADOWCON_WINx_PROTECT(win);
 499         } else {
 500                 reg = PRTCON;
 501                 bits = PRTCON_PROTECT;
 502         }
 503
 504         val = readl(ctx->regs + reg);
 505         if (protect)
 506                 val |= bits;
 507         else
 508                 val &= ~bits;
 509         writel(val, ctx->regs + reg);
 510 }
 511
 512 static void fimd_win_commit(struct device *dev, int zpos)
 513 {
 514         struct fimd_context *ctx = get_fimd_context(dev);
 515         struct fimd_win_data *win_data;
 516         int win = zpos;
 517         unsigned long val, alpha, size;
 518         unsigned int last_x;
 519         unsigned int last_y;
 520
 521         if (ctx->suspended)
 522                 return;
 523
 524         if (win == DEFAULT_ZPOS)
 525                 win = ctx->default_win;
 526
 527         if (win < 0 || win >= WINDOWS_NR)
 528                 return;
 529
 530         win_data = &ctx->win_data[win];
 531
 532         /*
 533          * SHADOWCON/PRTCON register is used for enabling timing.
 534          *
 535          * for example, once only width value of a register is set,
 536          * if the dma is started then fimd hardware could malfunction so
 537          * with protect window setting, the register fields with prefix '_F'
 538          * wouldn't be updated at vsync also but updated once unprotect window
 539          * is set.
 540          */
 541
 542         /* protect windows */
 543         fimd_shadow_protect_win(ctx, win, true);
 544
 545         /* buffer start address */
 546         val = (unsigned long)win_data->dma_addr;
 547         writel(val, ctx->regs + VIDWx_BUF_START(win, 0));
 548
 549         /* buffer end address */
 550         size = win_data->fb_width * win_data->ovl_height * (win_data->bpp >> 3);
 551         val = (unsigned long)(win_data->dma_addr + size);
 552         writel(val, ctx->regs + VIDWx_BUF_END(win, 0));
 553
 554         DRM_DEBUG_KMS("start addr = 0x%lx, end addr = 0x%lx, size = 0x%lx\n",
 555                         (unsigned long)win_data->dma_addr, val, size);
 556         DRM_DEBUG_KMS("ovl_width = %d, ovl_height = %d\n",
 557                         win_data->ovl_width, win_data->ovl_height);
 558
 559         /* buffer size */
 560         val = VIDW_BUF_SIZE_OFFSET(win_data->buf_offsize) |
 561                 VIDW_BUF_SIZE_PAGEWIDTH(win_data->line_size) |
 562                 VIDW_BUF_SIZE_OFFSET_E(win_data->buf_offsize) |
 563                 VIDW_BUF_SIZE_PAGEWIDTH_E(win_data->line_size);
 564         writel(val, ctx->regs + VIDWx_BUF_SIZE(win, 0));
 565
 566         /* OSD position */
 567         val = VIDOSDxA_TOPLEFT_X(win_data->offset_x) |
 568                 VIDOSDxA_TOPLEFT_Y(win_data->offset_y) |
 569                 VIDOSDxA_TOPLEFT_X_E(win_data->offset_x) |
 570                 VIDOSDxA_TOPLEFT_Y_E(win_data->offset_y);
 571         writel(val, ctx->regs + VIDOSD_A(win));
 572
 573         last_x = win_data->offset_x + win_data->ovl_width;
 574         if (last_x)
 575                 last_x--;
 576         last_y = win_data->offset_y + win_data->ovl_height;
 577         if (last_y)
 578                 last_y--;
 579
 580         val = VIDOSDxB_BOTRIGHT_X(last_x) | VIDOSDxB_BOTRIGHT_Y(last_y) |
 581                 VIDOSDxB_BOTRIGHT_X_E(last_x) | VIDOSDxB_BOTRIGHT_Y_E(last_y);
 582
 583         writel(val, ctx->regs + VIDOSD_B(win));
 584
 585         DRM_DEBUG_KMS("osd pos: tx = %d, ty = %d, bx = %d, by = %d\n",
 586                         win_data->offset_x, win_data->offset_y, last_x, last_y);
 587
 588         /* hardware window 0 doesn't support alpha channel. */
 589         if (win != 0) {
 590                 /* OSD alpha */
 591                 alpha = VIDISD14C_ALPHA1_R(0xf) |
 592                         VIDISD14C_ALPHA1_G(0xf) |
 593                         VIDISD14C_ALPHA1_B(0xf);
 594
 595                 writel(alpha, ctx->regs + VIDOSD_C(win));
 596         }
 597
 598         /* OSD size */
 599         if (win != 3 && win != 4) {
 600                 u32 offset = VIDOSD_D(win);
 601                 if (win == 0)
 602                         offset = VIDOSD_C(win);
 603                 val = win_data->ovl_width * win_data->ovl_height;
 604                 writel(val, ctx->regs + offset);
 605
 606                 DRM_DEBUG_KMS("osd size = 0x%x\n", (unsigned int)val);
 607         }
 608
 609         fimd_win_set_pixfmt(dev, win);
 610
 611         /* hardware window 0 doesn't support color key. */
 612         if (win != 0)
 613                 fimd_win_set_colkey(dev, win);
 614
 615         /* wincon */
 616         val = readl(ctx->regs + WINCON(win));
 617         val |= WINCONx_ENWIN;
 618         writel(val, ctx->regs + WINCON(win));
 619
 620         /* Enable DMA channel and unprotect windows */
 621         fimd_shadow_protect_win(ctx, win, false);
 622
 623         if (ctx->driver_data->has_shadowcon) {
 624                 val = readl(ctx->regs + SHADOWCON);
 625                 val |= SHADOWCON_CHx_ENABLE(win);
 626                 writel(val, ctx->regs + SHADOWCON);
 627         }
 628
 629         win_data->enabled = true;
 630 }
 631
 632 static void fimd_win_disable(struct device *dev, int zpos)
 633 {
 634         struct fimd_context *ctx = get_fimd_context(dev);
 635         struct fimd_win_data *win_data;
 636         int win = zpos;
 637         u32 val;
 638
 639         if (win == DEFAULT_ZPOS)
 640                 win = ctx->default_win;
 641
 642         if (win < 0 || win >= WINDOWS_NR)
 643                 return;
 644
 645         win_data = &ctx->win_data[win];
 646
 647         if (ctx->suspended) {
 648                 /* do not resume this window*/
 649                 win_data->resume = false;
 650                 return;
 651         }
 652
 653         /* protect windows */
 654         fimd_shadow_protect_win(ctx, win, true);
 655
 656         /* wincon */
 657         val = readl(ctx->regs + WINCON(win));
 658         val &= ~WINCONx_ENWIN;
 659         writel(val, ctx->regs + WINCON(win));
 660
 661         /* unprotect windows */
 662         if (ctx->driver_data->has_shadowcon) {
 663                 val = readl(ctx->regs + SHADOWCON);
 664                 val &= ~SHADOWCON_CHx_ENABLE(win);
 665                 writel(val, ctx->regs + SHADOWCON);
 666         }
 667
 668         fimd_shadow_protect_win(ctx, win, false);
 669
 670         win_data->enabled = false;
 671 }
 672
 673 static struct exynos_drm_manager_ops fimd_manager_ops = {
 674         .initialize = fimd_mgr_initialize,
 675         .dpms = fimd_dpms,
 676         .apply = fimd_apply,
 677         .commit = fimd_commit,
 678         .enable_vblank = fimd_enable_vblank,
 679         .disable_vblank = fimd_disable_vblank,
 680         .wait_for_vblank = fimd_wait_for_vblank,
 681         .win_mode_set = fimd_win_mode_set,
 682         .win_commit = fimd_win_commit,
 683         .win_disable = fimd_win_disable,
 684 };
 685
 686 static struct exynos_drm_manager fimd_manager = {
 687         .pipe           = -1,
 688         .ops            = &fimd_manager_ops,
 689         .display_ops    = &fimd_display_ops,
 690 };
 691
 692 static irqreturn_t fimd_irq_handler(int irq, void *dev_id)
 693 {
 694         struct fimd_context *ctx = (struct fimd_context *)dev_id;
 695         struct exynos_drm_subdrv *subdrv = &ctx->subdrv;
 696         struct exynos_drm_manager *manager = subdrv->manager;
 697         u32 val;
 698
 699         val = readl(ctx->regs + VIDINTCON1);
 700
 701         if (val & VIDINTCON1_INT_FRAME)
 702                 /* VSYNC interrupt */
 703                 writel(VIDINTCON1_INT_FRAME, ctx->regs + VIDINTCON1);
 704
 705         /* check the crtc is detached already from encoder */
 706         if (manager->pipe < 0 || !ctx->drm_dev)
 707                 goto out;
 708
 709         drm_handle_vblank(ctx->drm_dev, manager->pipe);
 710         exynos_drm_crtc_finish_pageflip(ctx->drm_dev, manager->pipe);
 711
 712         /* set wait vsync event to zero and wake up queue. */
 713         if (atomic_read(&ctx->wait_vsync_event)) {
 714                 atomic_set(&ctx->wait_vsync_event, 0);
 715                 wake_up(&ctx->wait_vsync_queue);
 716         }
 717 out:
 718         return IRQ_HANDLED;
 719 }
 720
 721 static int fimd_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
 722 {
 723         /*
 724          * enable drm irq mode.
 725          * - with irq_enabled = true, we can use the vblank feature.
 726          *
 727          * P.S. note that we wouldn't use drm irq handler but
 728          *      just specific driver own one instead because
 729          *      drm framework supports only one irq handler.
 730          */
 731         drm_dev->irq_enabled = true;
 732
 733         /*
 734          * with vblank_disable_allowed = true, vblank interrupt will be disabled
 735          * by drm timer once a current process gives up ownership of
 736          * vblank event.(after drm_vblank_put function is called)
 737          */
 738         drm_dev->vblank_disable_allowed = true;
 739
 740         /* attach this sub driver to iommu mapping if supported. */
 741         if (is_drm_iommu_supported(drm_dev))
 742                 drm_iommu_attach_device(drm_dev, dev);
 743
 744         return 0;
 745 }
 746
 747 static void fimd_subdrv_remove(struct drm_device *drm_dev, struct device *dev)
 748 {
 749         /* detach this sub driver from iommu mapping if supported. */
 750         if (is_drm_iommu_supported(drm_dev))
 751                 drm_iommu_detach_device(drm_dev, dev);
 752 }
 753
 754 static int fimd_configure_clocks(struct fimd_context *ctx, struct device *dev)
 755 {
 756         struct videomode *vm = &ctx->panel.vm;
 757         unsigned long clk;
 758
 759         ctx->bus_clk = devm_clk_get(dev, "fimd");
 760         if (IS_ERR(ctx->bus_clk)) {
 761                 dev_err(dev, "failed to get bus clock\n");
 762                 return PTR_ERR(ctx->bus_clk);
 763         }
 764
 765         ctx->lcd_clk = devm_clk_get(dev, "sclk_fimd");
 766         if (IS_ERR(ctx->lcd_clk)) {
 767                 dev_err(dev, "failed to get lcd clock\n");
 768                 return PTR_ERR(ctx->lcd_clk);
 769         }
 770
 771         clk = clk_get_rate(ctx->lcd_clk);
 772         if (clk == 0) {
 773                 dev_err(dev, "error getting sclk_fimd clock rate\n");
 774                 return -EINVAL;
 775         }
 776
 777         if (vm->pixelclock == 0) {
 778                 unsigned long c;
 779                 c = vm->hactive + vm->hback_porch + vm->hfront_porch +
 780                     vm->hsync_len;
 781                 c *= vm->vactive + vm->vback_porch + vm->vfront_porch +
 782                      vm->vsync_len;
 783                 vm->pixelclock = c * FIMD_DEFAULT_FRAMERATE;
 784                 if (vm->pixelclock == 0) {
 785                         dev_err(dev, "incorrect display timings\n");
 786                         return -EINVAL;
 787                 }
 788                 dev_warn(dev, "pixel clock recalculated to %luHz (%dHz frame rate)\n",
 789                          vm->pixelclock, FIMD_DEFAULT_FRAMERATE);
 790         }
 791         ctx->clkdiv = DIV_ROUND_UP(clk, vm->pixelclock);
 792         if (ctx->clkdiv > 256) {
 793                 dev_warn(dev, "calculated pixel clock divider too high (%u), lowered to 256\n",
 794                          ctx->clkdiv);
 795                 ctx->clkdiv = 256;
 796         }
 797         vm->pixelclock = clk / ctx->clkdiv;
 798         DRM_DEBUG_KMS("pixel clock = %lu, clkdiv = %d\n", vm->pixelclock,
 799                       ctx->clkdiv);
 800
 801         return 0;
 802 }
 803
 804 static void fimd_clear_win(struct fimd_context *ctx, int win)
 805 {
 806         writel(0, ctx->regs + WINCON(win));
 807         writel(0, ctx->regs + VIDOSD_A(win));
 808         writel(0, ctx->regs + VIDOSD_B(win));
 809         writel(0, ctx->regs + VIDOSD_C(win));
 810
 811         if (win == 1 || win == 2)
 812                 writel(0, ctx->regs + VIDOSD_D(win));
 813
 814         fimd_shadow_protect_win(ctx, win, false);
 815 }
 816
 817 static int fimd_clock(struct fimd_context *ctx, bool enable)
 818 {
 819         if (enable) {
 820                 int ret;
 821
 822                 ret = clk_prepare_enable(ctx->bus_clk);
 823                 if (ret < 0)
 824                         return ret;
 825
 826                 ret = clk_prepare_enable(ctx->lcd_clk);
 827                 if  (ret < 0) {
 828                         clk_disable_unprepare(ctx->bus_clk);
 829                         return ret;
 830                 }
 831         } else {
 832                 clk_disable_unprepare(ctx->lcd_clk);
 833                 clk_disable_unprepare(ctx->bus_clk);
 834         }
 835
 836         return 0;
 837 }
 838
 839 static void fimd_window_suspend(struct device *dev)
 840 {
 841         struct fimd_context *ctx = get_fimd_context(dev);
 842         struct fimd_win_data *win_data;
 843         int i;
 844
 845         for (i = 0; i < WINDOWS_NR; i++) {
 846                 win_data = &ctx->win_data[i];
 847                 win_data->resume = win_data->enabled;
 848                 fimd_win_disable(dev, i);
 849         }
 850         fimd_wait_for_vblank(dev);
 851 }
 852
 853 static void fimd_window_resume(struct device *dev)
 854 {
 855         struct fimd_context *ctx = get_fimd_context(dev);
 856         struct fimd_win_data *win_data;
 857         int i;
 858
 859         for (i = 0; i < WINDOWS_NR; i++) {
 860                 win_data = &ctx->win_data[i];
 861                 win_data->enabled = win_data->resume;
 862                 win_data->resume = false;
 863         }
 864 }
 865
 866 static int fimd_activate(struct fimd_context *ctx, bool enable)
 867 {
 868         struct device *dev = ctx->subdrv.dev;
 869         if (enable) {
 870                 int ret;
 871
 872                 ret = fimd_clock(ctx, true);
 873                 if (ret < 0)
 874                         return ret;
 875
 876                 ctx->suspended = false;
 877
 878                 /* if vblank was enabled status, enable it again. */
 879                 if (test_and_clear_bit(0, &ctx->irq_flags))
 880                         fimd_enable_vblank(dev);
 881
 882                 fimd_window_resume(dev);
 883         } else {
 884                 fimd_window_suspend(dev);
 885
 886                 fimd_clock(ctx, false);
 887                 ctx->suspended = true;
 888         }
 889
 890         return 0;
 891 }
 892
 893 static int fimd_get_platform_data(struct fimd_context *ctx, struct device *dev)
 894 {
 895         struct videomode *vm;
 896         int ret;
 897
 898         vm = &ctx->panel.vm;
 899         ret = of_get_videomode(dev->of_node, vm, OF_USE_NATIVE_MODE);
 900         if (ret) {
 901                 DRM_ERROR("failed: of_get_videomode() : %d\n", ret);
 902                 return ret;
 903         }
 904
 905         if (vm->flags & DISPLAY_FLAGS_VSYNC_LOW)
 906                 ctx->vidcon1 |= VIDCON1_INV_VSYNC;
 907         if (vm->flags & DISPLAY_FLAGS_HSYNC_LOW)
 908                 ctx->vidcon1 |= VIDCON1_INV_HSYNC;
 909         if (vm->flags & DISPLAY_FLAGS_DE_LOW)
 910                 ctx->vidcon1 |= VIDCON1_INV_VDEN;
 911         if (vm->flags & DISPLAY_FLAGS_PIXDATA_NEGEDGE)
 912                 ctx->vidcon1 |= VIDCON1_INV_VCLK;
 913
 914         return 0;
 915 }
 916
 917 static int fimd_probe(struct platform_device *pdev)
 918 {
 919         struct device *dev = &pdev->dev;
 920         struct fimd_context *ctx;
 921         struct exynos_drm_subdrv *subdrv;
 922         struct resource *res;
 923         int win;
 924         int ret = -EINVAL;
 925
 926         if (!dev->of_node)
 927                 return -ENODEV;
 928
 929         ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
 930         if (!ctx)
 931                 return -ENOMEM;
 932
 933         ret = fimd_get_platform_data(ctx, dev);
 934         if (ret)
 935                 return ret;
 936
 937         ret = fimd_configure_clocks(ctx, dev);
 938         if (ret)
 939                 return ret;
 940
 941         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 942
 943         ctx->regs = devm_ioremap_resource(dev, res);
 944         if (IS_ERR(ctx->regs))
 945                 return PTR_ERR(ctx->regs);
 946
 947         res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "vsync");
 948         if (!res) {
 949                 dev_err(dev, "irq request failed.\n");
 950                 return -ENXIO;
 951         }
 952
 953         ctx->irq = res->start;
 954
 955         ret = devm_request_irq(dev, ctx->irq, fimd_irq_handler,
 956                                                         0, "drm_fimd", ctx);
 957         if (ret) {
 958                 dev_err(dev, "irq request failed.\n");
 959                 return ret;
 960         }
 961
 962         ctx->driver_data = drm_fimd_get_driver_data(pdev);
 963         init_waitqueue_head(&ctx->wait_vsync_queue);
 964         atomic_set(&ctx->wait_vsync_event, 0);
 965
 966         subdrv = &ctx->subdrv;
 967
 968         subdrv->dev = dev;
 969         subdrv->manager = &fimd_manager;
 970         subdrv->probe = fimd_subdrv_probe;
 971         subdrv->remove = fimd_subdrv_remove;
 972
 973         mutex_init(&ctx->lock);
 974
 975         platform_set_drvdata(pdev, ctx);
 976
 977         pm_runtime_enable(dev);
 978         pm_runtime_get_sync(dev);
 979
 980         for (win = 0; win < WINDOWS_NR; win++)
 981                 fimd_clear_win(ctx, win);
 982
 983         exynos_drm_subdrv_register(subdrv);
 984
 985         return 0;
 986 }
 987
 988 static int fimd_remove(struct platform_device *pdev)
 989 {
 990         struct device *dev = &pdev->dev;
 991         struct fimd_context *ctx = platform_get_drvdata(pdev);
 992
 993         exynos_drm_subdrv_unregister(&ctx->subdrv);
 994
 995         if (ctx->suspended)
 996                 goto out;
 997
 998         pm_runtime_set_suspended(dev);
 999         pm_runtime_put_sync(dev);
1000
1001 out:
1002         pm_runtime_disable(dev);
1003
1004         return 0;
1005 }
1006
1007 #ifdef CONFIG_PM_SLEEP
1008 static int fimd_suspend(struct device *dev)
1009 {
1010         struct fimd_context *ctx = get_fimd_context(dev);
1011
1012         /*
1013          * do not use pm_runtime_suspend(). if pm_runtime_suspend() is
1014          * called here, an error would be returned by that interface
1015          * because the usage_count of pm runtime is more than 1.
1016          */
1017         if (!pm_runtime_suspended(dev))
1018                 return fimd_activate(ctx, false);
1019
1020         return 0;
1021 }
1022
1023 static int fimd_resume(struct device *dev)
1024 {
1025         struct fimd_context *ctx = get_fimd_context(dev);
1026
1027         /*
1028          * if entered to sleep when lcd panel was on, the usage_count
1029          * of pm runtime would still be 1 so in this case, fimd driver
1030          * should be on directly not drawing on pm runtime interface.
1031          */
1032         if (!pm_runtime_suspended(dev)) {
1033                 int ret;
1034
1035                 ret = fimd_activate(ctx, true);
1036                 if (ret < 0)
1037                         return ret;
1038
1039                 /*
1040                  * in case of dpms on(standby), fimd_apply function will
1041                  * be called by encoder's dpms callback to update fimd's
1042                  * registers but in case of sleep wakeup, it's not.
1043                  * so fimd_apply function should be called at here.
1044                  */
1045                 fimd_apply(dev);
1046         }
1047
1048         return 0;
1049 }
1050 #endif
1051
1052 #ifdef CONFIG_PM_RUNTIME
1053 static int fimd_runtime_suspend(struct device *dev)
1054 {
1055         struct fimd_context *ctx = get_fimd_context(dev);
1056
1057         return fimd_activate(ctx, false);
1058 }
1059
1060 static int fimd_runtime_resume(struct device *dev)
1061 {
1062         struct fimd_context *ctx = get_fimd_context(dev);
1063
1064         return fimd_activate(ctx, true);
1065 }
1066 #endif
1067
1068 static const struct dev_pm_ops fimd_pm_ops = {
1069         SET_SYSTEM_SLEEP_PM_OPS(fimd_suspend, fimd_resume)
1070         SET_RUNTIME_PM_OPS(fimd_runtime_suspend, fimd_runtime_resume, NULL)
1071 };
1072
1073 struct platform_driver fimd_driver = {
1074         .probe          = fimd_probe,
1075         .remove         = fimd_remove,
1076         .driver         = {
1077                 .name   = "exynos4-fb",
1078                 .owner  = THIS_MODULE,
1079                 .pm     = &fimd_pm_ops,
1080                 .of_match_table = fimd_driver_dt_match,
1081         },
1082 };