2 * Copyright (C) 2012 Samsung Electronics Co.Ltd
3 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundationr
10 #include <linux/kernel.h>
11 #include <linux/clk.h>
12 #include <linux/err.h>
13 #include <linux/interrupt.h>
15 #include <linux/platform_device.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/slab.h>
18 #include <linux/workqueue.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/dma-attrs.h>
24 #include <drm/exynos_drm.h>
25 #include "exynos_drm_drv.h"
26 #include "exynos_drm_g2d.h"
27 #include "exynos_drm_gem.h"
28 #include "exynos_drm_iommu.h"
30 #define G2D_HW_MAJOR_VER 4
31 #define G2D_HW_MINOR_VER 1
33 /* vaild register range set from user: 0x0104 ~ 0x0880 */
34 #define G2D_VALID_START 0x0104
35 #define G2D_VALID_END 0x0880
37 /* general registers */
38 #define G2D_SOFT_RESET 0x0000
39 #define G2D_INTEN 0x0004
40 #define G2D_INTC_PEND 0x000C
41 #define G2D_DMA_SFR_BASE_ADDR 0x0080
42 #define G2D_DMA_COMMAND 0x0084
43 #define G2D_DMA_STATUS 0x008C
44 #define G2D_DMA_HOLD_CMD 0x0090
46 /* command registers */
47 #define G2D_BITBLT_START 0x0100
49 /* registers for base address */
50 #define G2D_SRC_BASE_ADDR 0x0304
51 #define G2D_SRC_STRIDE_REG 0x0308
52 #define G2D_SRC_COLOR_MODE 0x030C
53 #define G2D_SRC_LEFT_TOP 0x0310
54 #define G2D_SRC_RIGHT_BOTTOM 0x0314
55 #define G2D_SRC_PLANE2_BASE_ADDR 0x0318
56 #define G2D_DST_BASE_ADDR 0x0404
57 #define G2D_DST_STRIDE_REG 0x0408
58 #define G2D_DST_COLOR_MODE 0x040C
59 #define G2D_DST_LEFT_TOP 0x0410
60 #define G2D_DST_RIGHT_BOTTOM 0x0414
61 #define G2D_DST_PLANE2_BASE_ADDR 0x0418
62 #define G2D_PAT_BASE_ADDR 0x0500
63 #define G2D_MSK_BASE_ADDR 0x0520
66 #define G2D_SFRCLEAR (1 << 1)
67 #define G2D_R (1 << 0)
70 #define G2D_INTEN_ACF (1 << 3)
71 #define G2D_INTEN_UCF (1 << 2)
72 #define G2D_INTEN_GCF (1 << 1)
73 #define G2D_INTEN_SCF (1 << 0)
76 #define G2D_INTP_ACMD_FIN (1 << 3)
77 #define G2D_INTP_UCMD_FIN (1 << 2)
78 #define G2D_INTP_GCMD_FIN (1 << 1)
79 #define G2D_INTP_SCMD_FIN (1 << 0)
82 #define G2D_DMA_HALT (1 << 2)
83 #define G2D_DMA_CONTINUE (1 << 1)
84 #define G2D_DMA_START (1 << 0)
87 #define G2D_DMA_LIST_DONE_COUNT (0xFF << 17)
88 #define G2D_DMA_BITBLT_DONE_COUNT (0xFFFF << 1)
89 #define G2D_DMA_DONE (1 << 0)
90 #define G2D_DMA_LIST_DONE_COUNT_OFFSET 17
92 /* G2D_DMA_HOLD_CMD */
93 #define G2D_USER_HOLD (1 << 2)
94 #define G2D_LIST_HOLD (1 << 1)
95 #define G2D_BITBLT_HOLD (1 << 0)
97 /* G2D_BITBLT_START */
98 #define G2D_START_CASESEL (1 << 2)
99 #define G2D_START_NHOLT (1 << 1)
100 #define G2D_START_BITBLT (1 << 0)
102 /* buffer color format */
103 #define G2D_FMT_XRGB8888 0
104 #define G2D_FMT_ARGB8888 1
105 #define G2D_FMT_RGB565 2
106 #define G2D_FMT_XRGB1555 3
107 #define G2D_FMT_ARGB1555 4
108 #define G2D_FMT_XRGB4444 5
109 #define G2D_FMT_ARGB4444 6
110 #define G2D_FMT_PACKED_RGB888 7
111 #define G2D_FMT_A8 11
112 #define G2D_FMT_L8 12
114 /* buffer valid length */
115 #define G2D_LEN_MIN 1
116 #define G2D_LEN_MAX 8000
118 #define G2D_CMDLIST_SIZE (PAGE_SIZE / 4)
119 #define G2D_CMDLIST_NUM 64
120 #define G2D_CMDLIST_POOL_SIZE (G2D_CMDLIST_SIZE * G2D_CMDLIST_NUM)
121 #define G2D_CMDLIST_DATA_NUM (G2D_CMDLIST_SIZE / sizeof(u32) - 2)
123 /* maximum buffer pool size of userptr is 64MB as default */
124 #define MAX_POOL (64 * 1024 * 1024)
142 /* cmdlist data structure */
145 unsigned long data[G2D_CMDLIST_DATA_NUM];
146 u32 last; /* last data offset */
150 * A structure of buffer description
152 * @format: color format
153 * @stride: buffer stride/pitch in bytes
154 * @left_x: the x coordinates of left top corner
155 * @top_y: the y coordinates of left top corner
156 * @right_x: the x coordinates of right bottom corner
157 * @bottom_y: the y coordinates of right bottom corner
160 struct g2d_buf_desc {
165 unsigned int right_x;
166 unsigned int bottom_y;
170 * A structure of buffer information
172 * @map_nr: manages the number of mapped buffers
173 * @reg_types: stores regitster type in the order of requested command
174 * @handles: stores buffer handle in its reg_type position
175 * @types: stores buffer type in its reg_type position
176 * @descs: stores buffer description in its reg_type position
179 struct g2d_buf_info {
181 enum g2d_reg_type reg_types[MAX_REG_TYPE_NR];
182 unsigned long handles[MAX_REG_TYPE_NR];
183 unsigned int types[MAX_REG_TYPE_NR];
184 struct g2d_buf_desc descs[MAX_REG_TYPE_NR];
187 struct drm_exynos_pending_g2d_event {
188 struct drm_pending_event base;
189 struct drm_exynos_g2d_event event;
192 struct g2d_cmdlist_userptr {
193 struct list_head list;
195 unsigned long userptr;
197 struct frame_vector *vec;
198 struct sg_table *sgt;
203 struct g2d_cmdlist_node {
204 struct list_head list;
205 struct g2d_cmdlist *cmdlist;
207 struct g2d_buf_info buf_info;
209 struct drm_exynos_pending_g2d_event *event;
212 struct g2d_runqueue_node {
213 struct list_head list;
214 struct list_head run_cmdlist;
215 struct list_head event_list;
216 struct drm_file *filp;
218 struct completion complete;
224 struct clk *gate_clk;
227 struct workqueue_struct *g2d_workq;
228 struct work_struct runqueue_work;
229 struct exynos_drm_subdrv subdrv;
233 struct g2d_cmdlist_node *cmdlist_node;
234 struct list_head free_cmdlist;
235 struct mutex cmdlist_mutex;
236 dma_addr_t cmdlist_pool;
237 void *cmdlist_pool_virt;
238 struct dma_attrs cmdlist_dma_attrs;
241 struct g2d_runqueue_node *runqueue_node;
242 struct list_head runqueue;
243 struct mutex runqueue_mutex;
244 struct kmem_cache *runqueue_slab;
246 unsigned long current_pool;
247 unsigned long max_pool;
250 static int g2d_init_cmdlist(struct g2d_data *g2d)
252 struct device *dev = g2d->dev;
253 struct g2d_cmdlist_node *node = g2d->cmdlist_node;
254 struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
257 struct g2d_buf_info *buf_info;
259 init_dma_attrs(&g2d->cmdlist_dma_attrs);
260 dma_set_attr(DMA_ATTR_WRITE_COMBINE, &g2d->cmdlist_dma_attrs);
262 g2d->cmdlist_pool_virt = dma_alloc_attrs(subdrv->drm_dev->dev,
263 G2D_CMDLIST_POOL_SIZE,
264 &g2d->cmdlist_pool, GFP_KERNEL,
265 &g2d->cmdlist_dma_attrs);
266 if (!g2d->cmdlist_pool_virt) {
267 dev_err(dev, "failed to allocate dma memory\n");
271 node = kcalloc(G2D_CMDLIST_NUM, sizeof(*node), GFP_KERNEL);
273 dev_err(dev, "failed to allocate memory\n");
278 for (nr = 0; nr < G2D_CMDLIST_NUM; nr++) {
282 g2d->cmdlist_pool_virt + nr * G2D_CMDLIST_SIZE;
284 g2d->cmdlist_pool + nr * G2D_CMDLIST_SIZE;
286 buf_info = &node[nr].buf_info;
287 for (i = 0; i < MAX_REG_TYPE_NR; i++)
288 buf_info->reg_types[i] = REG_TYPE_NONE;
290 list_add_tail(&node[nr].list, &g2d->free_cmdlist);
296 dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE,
297 g2d->cmdlist_pool_virt,
298 g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs);
302 static void g2d_fini_cmdlist(struct g2d_data *g2d)
304 struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
306 kfree(g2d->cmdlist_node);
308 if (g2d->cmdlist_pool_virt && g2d->cmdlist_pool) {
309 dma_free_attrs(subdrv->drm_dev->dev, G2D_CMDLIST_POOL_SIZE,
310 g2d->cmdlist_pool_virt,
311 g2d->cmdlist_pool, &g2d->cmdlist_dma_attrs);
315 static struct g2d_cmdlist_node *g2d_get_cmdlist(struct g2d_data *g2d)
317 struct device *dev = g2d->dev;
318 struct g2d_cmdlist_node *node;
320 mutex_lock(&g2d->cmdlist_mutex);
321 if (list_empty(&g2d->free_cmdlist)) {
322 dev_err(dev, "there is no free cmdlist\n");
323 mutex_unlock(&g2d->cmdlist_mutex);
327 node = list_first_entry(&g2d->free_cmdlist, struct g2d_cmdlist_node,
329 list_del_init(&node->list);
330 mutex_unlock(&g2d->cmdlist_mutex);
335 static void g2d_put_cmdlist(struct g2d_data *g2d, struct g2d_cmdlist_node *node)
337 mutex_lock(&g2d->cmdlist_mutex);
338 list_move_tail(&node->list, &g2d->free_cmdlist);
339 mutex_unlock(&g2d->cmdlist_mutex);
342 static void g2d_add_cmdlist_to_inuse(struct exynos_drm_g2d_private *g2d_priv,
343 struct g2d_cmdlist_node *node)
345 struct g2d_cmdlist_node *lnode;
347 if (list_empty(&g2d_priv->inuse_cmdlist))
350 /* this links to base address of new cmdlist */
351 lnode = list_entry(g2d_priv->inuse_cmdlist.prev,
352 struct g2d_cmdlist_node, list);
353 lnode->cmdlist->data[lnode->cmdlist->last] = node->dma_addr;
356 list_add_tail(&node->list, &g2d_priv->inuse_cmdlist);
359 list_add_tail(&node->event->base.link, &g2d_priv->event_list);
362 static void g2d_userptr_put_dma_addr(struct drm_device *drm_dev,
366 struct g2d_cmdlist_userptr *g2d_userptr =
367 (struct g2d_cmdlist_userptr *)obj;
376 atomic_dec(&g2d_userptr->refcount);
378 if (atomic_read(&g2d_userptr->refcount) > 0)
381 if (g2d_userptr->in_pool)
385 exynos_gem_unmap_sgt_from_dma(drm_dev, g2d_userptr->sgt,
388 pages = frame_vector_pages(g2d_userptr->vec);
389 if (!IS_ERR(pages)) {
392 for (i = 0; i < frame_vector_count(g2d_userptr->vec); i++)
393 set_page_dirty_lock(pages[i]);
395 put_vaddr_frames(g2d_userptr->vec);
396 frame_vector_destroy(g2d_userptr->vec);
398 if (!g2d_userptr->out_of_list)
399 list_del_init(&g2d_userptr->list);
401 sg_free_table(g2d_userptr->sgt);
402 kfree(g2d_userptr->sgt);
406 static dma_addr_t *g2d_userptr_get_dma_addr(struct drm_device *drm_dev,
407 unsigned long userptr,
409 struct drm_file *filp,
412 struct drm_exynos_file_private *file_priv = filp->driver_priv;
413 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
414 struct g2d_cmdlist_userptr *g2d_userptr;
415 struct g2d_data *g2d;
416 struct sg_table *sgt;
417 unsigned long start, end;
418 unsigned int npages, offset;
422 DRM_ERROR("invalid userptr size.\n");
423 return ERR_PTR(-EINVAL);
426 g2d = dev_get_drvdata(g2d_priv->dev);
428 /* check if userptr already exists in userptr_list. */
429 list_for_each_entry(g2d_userptr, &g2d_priv->userptr_list, list) {
430 if (g2d_userptr->userptr == userptr) {
432 * also check size because there could be same address
433 * and different size.
435 if (g2d_userptr->size == size) {
436 atomic_inc(&g2d_userptr->refcount);
437 *obj = (unsigned long)g2d_userptr;
439 return &g2d_userptr->dma_addr;
443 * at this moment, maybe g2d dma is accessing this
444 * g2d_userptr memory region so just remove this
445 * g2d_userptr object from userptr_list not to be
446 * referred again and also except it the userptr
447 * pool to be released after the dma access completion.
449 g2d_userptr->out_of_list = true;
450 g2d_userptr->in_pool = false;
451 list_del_init(&g2d_userptr->list);
457 g2d_userptr = kzalloc(sizeof(*g2d_userptr), GFP_KERNEL);
459 return ERR_PTR(-ENOMEM);
461 atomic_set(&g2d_userptr->refcount, 1);
462 g2d_userptr->size = size;
464 start = userptr & PAGE_MASK;
465 offset = userptr & ~PAGE_MASK;
466 end = PAGE_ALIGN(userptr + size);
467 npages = (end - start) >> PAGE_SHIFT;
468 g2d_userptr->vec = frame_vector_create(npages);
469 if (!g2d_userptr->vec) {
474 ret = get_vaddr_frames(start, npages, true, true, g2d_userptr->vec);
476 DRM_ERROR("failed to get user pages from userptr.\n");
478 goto err_destroy_framevec;
480 goto err_put_framevec;
482 if (frame_vector_to_pages(g2d_userptr->vec) < 0) {
484 goto err_put_framevec;
487 sgt = kzalloc(sizeof(*sgt), GFP_KERNEL);
490 goto err_put_framevec;
493 ret = sg_alloc_table_from_pages(sgt,
494 frame_vector_pages(g2d_userptr->vec),
495 npages, offset, size, GFP_KERNEL);
497 DRM_ERROR("failed to get sgt from pages.\n");
501 g2d_userptr->sgt = sgt;
503 ret = exynos_gem_map_sgt_with_dma(drm_dev, g2d_userptr->sgt,
506 DRM_ERROR("failed to map sgt with dma region.\n");
507 goto err_sg_free_table;
510 g2d_userptr->dma_addr = sgt->sgl[0].dma_address;
511 g2d_userptr->userptr = userptr;
513 list_add_tail(&g2d_userptr->list, &g2d_priv->userptr_list);
515 if (g2d->current_pool + (npages << PAGE_SHIFT) < g2d->max_pool) {
516 g2d->current_pool += npages << PAGE_SHIFT;
517 g2d_userptr->in_pool = true;
520 *obj = (unsigned long)g2d_userptr;
522 return &g2d_userptr->dma_addr;
531 put_vaddr_frames(g2d_userptr->vec);
533 err_destroy_framevec:
534 frame_vector_destroy(g2d_userptr->vec);
542 static void g2d_userptr_free_all(struct drm_device *drm_dev,
543 struct g2d_data *g2d,
544 struct drm_file *filp)
546 struct drm_exynos_file_private *file_priv = filp->driver_priv;
547 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
548 struct g2d_cmdlist_userptr *g2d_userptr, *n;
550 list_for_each_entry_safe(g2d_userptr, n, &g2d_priv->userptr_list, list)
551 if (g2d_userptr->in_pool)
552 g2d_userptr_put_dma_addr(drm_dev,
553 (unsigned long)g2d_userptr,
556 g2d->current_pool = 0;
559 static enum g2d_reg_type g2d_get_reg_type(int reg_offset)
561 enum g2d_reg_type reg_type;
563 switch (reg_offset) {
564 case G2D_SRC_BASE_ADDR:
565 case G2D_SRC_STRIDE_REG:
566 case G2D_SRC_COLOR_MODE:
567 case G2D_SRC_LEFT_TOP:
568 case G2D_SRC_RIGHT_BOTTOM:
569 reg_type = REG_TYPE_SRC;
571 case G2D_SRC_PLANE2_BASE_ADDR:
572 reg_type = REG_TYPE_SRC_PLANE2;
574 case G2D_DST_BASE_ADDR:
575 case G2D_DST_STRIDE_REG:
576 case G2D_DST_COLOR_MODE:
577 case G2D_DST_LEFT_TOP:
578 case G2D_DST_RIGHT_BOTTOM:
579 reg_type = REG_TYPE_DST;
581 case G2D_DST_PLANE2_BASE_ADDR:
582 reg_type = REG_TYPE_DST_PLANE2;
584 case G2D_PAT_BASE_ADDR:
585 reg_type = REG_TYPE_PAT;
587 case G2D_MSK_BASE_ADDR:
588 reg_type = REG_TYPE_MSK;
591 reg_type = REG_TYPE_NONE;
592 DRM_ERROR("Unknown register offset![%d]\n", reg_offset);
599 static unsigned long g2d_get_buf_bpp(unsigned int format)
604 case G2D_FMT_XRGB8888:
605 case G2D_FMT_ARGB8888:
609 case G2D_FMT_XRGB1555:
610 case G2D_FMT_ARGB1555:
611 case G2D_FMT_XRGB4444:
612 case G2D_FMT_ARGB4444:
615 case G2D_FMT_PACKED_RGB888:
626 static bool g2d_check_buf_desc_is_valid(struct g2d_buf_desc *buf_desc,
627 enum g2d_reg_type reg_type,
631 unsigned long bpp, last_pos;
634 * check source and destination buffers only.
635 * so the others are always valid.
637 if (reg_type != REG_TYPE_SRC && reg_type != REG_TYPE_DST)
640 /* This check also makes sure that right_x > left_x. */
641 width = (int)buf_desc->right_x - (int)buf_desc->left_x;
642 if (width < G2D_LEN_MIN || width > G2D_LEN_MAX) {
643 DRM_ERROR("width[%d] is out of range!\n", width);
647 /* This check also makes sure that bottom_y > top_y. */
648 height = (int)buf_desc->bottom_y - (int)buf_desc->top_y;
649 if (height < G2D_LEN_MIN || height > G2D_LEN_MAX) {
650 DRM_ERROR("height[%d] is out of range!\n", height);
654 bpp = g2d_get_buf_bpp(buf_desc->format);
656 /* Compute the position of the last byte that the engine accesses. */
657 last_pos = ((unsigned long)buf_desc->bottom_y - 1) *
658 (unsigned long)buf_desc->stride +
659 (unsigned long)buf_desc->right_x * bpp - 1;
662 * Since right_x > left_x and bottom_y > top_y we already know
663 * that the first_pos < last_pos (first_pos being the position
664 * of the first byte the engine accesses), it just remains to
665 * check if last_pos is smaller then the buffer size.
668 if (last_pos >= size) {
669 DRM_ERROR("last engine access position [%lu] "
670 "is out of range [%lu]!\n", last_pos, size);
677 static int g2d_map_cmdlist_gem(struct g2d_data *g2d,
678 struct g2d_cmdlist_node *node,
679 struct drm_device *drm_dev,
680 struct drm_file *file)
682 struct g2d_cmdlist *cmdlist = node->cmdlist;
683 struct g2d_buf_info *buf_info = &node->buf_info;
688 for (i = 0; i < buf_info->map_nr; i++) {
689 struct g2d_buf_desc *buf_desc;
690 enum g2d_reg_type reg_type;
692 unsigned long handle;
695 reg_pos = cmdlist->last - 2 * (i + 1);
697 offset = cmdlist->data[reg_pos];
698 handle = cmdlist->data[reg_pos + 1];
700 reg_type = g2d_get_reg_type(offset);
701 if (reg_type == REG_TYPE_NONE) {
706 buf_desc = &buf_info->descs[reg_type];
708 if (buf_info->types[reg_type] == BUF_TYPE_GEM) {
711 size = exynos_drm_gem_get_size(drm_dev, handle, file);
717 if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
723 addr = exynos_drm_gem_get_dma_addr(drm_dev, handle,
730 struct drm_exynos_g2d_userptr g2d_userptr;
732 if (copy_from_user(&g2d_userptr, (void __user *)handle,
733 sizeof(struct drm_exynos_g2d_userptr))) {
738 if (!g2d_check_buf_desc_is_valid(buf_desc, reg_type,
744 addr = g2d_userptr_get_dma_addr(drm_dev,
755 cmdlist->data[reg_pos + 1] = *addr;
756 buf_info->reg_types[i] = reg_type;
757 buf_info->handles[reg_type] = handle;
763 buf_info->map_nr = i;
767 static void g2d_unmap_cmdlist_gem(struct g2d_data *g2d,
768 struct g2d_cmdlist_node *node,
769 struct drm_file *filp)
771 struct exynos_drm_subdrv *subdrv = &g2d->subdrv;
772 struct g2d_buf_info *buf_info = &node->buf_info;
775 for (i = 0; i < buf_info->map_nr; i++) {
776 struct g2d_buf_desc *buf_desc;
777 enum g2d_reg_type reg_type;
778 unsigned long handle;
780 reg_type = buf_info->reg_types[i];
782 buf_desc = &buf_info->descs[reg_type];
783 handle = buf_info->handles[reg_type];
785 if (buf_info->types[reg_type] == BUF_TYPE_GEM)
786 exynos_drm_gem_put_dma_addr(subdrv->drm_dev, handle,
789 g2d_userptr_put_dma_addr(subdrv->drm_dev, handle,
792 buf_info->reg_types[i] = REG_TYPE_NONE;
793 buf_info->handles[reg_type] = 0;
794 buf_info->types[reg_type] = 0;
795 memset(buf_desc, 0x00, sizeof(*buf_desc));
798 buf_info->map_nr = 0;
801 static void g2d_dma_start(struct g2d_data *g2d,
802 struct g2d_runqueue_node *runqueue_node)
804 struct g2d_cmdlist_node *node =
805 list_first_entry(&runqueue_node->run_cmdlist,
806 struct g2d_cmdlist_node, list);
809 ret = pm_runtime_get_sync(g2d->dev);
813 writel_relaxed(node->dma_addr, g2d->regs + G2D_DMA_SFR_BASE_ADDR);
814 writel_relaxed(G2D_DMA_START, g2d->regs + G2D_DMA_COMMAND);
817 static struct g2d_runqueue_node *g2d_get_runqueue_node(struct g2d_data *g2d)
819 struct g2d_runqueue_node *runqueue_node;
821 if (list_empty(&g2d->runqueue))
824 runqueue_node = list_first_entry(&g2d->runqueue,
825 struct g2d_runqueue_node, list);
826 list_del_init(&runqueue_node->list);
827 return runqueue_node;
830 static void g2d_free_runqueue_node(struct g2d_data *g2d,
831 struct g2d_runqueue_node *runqueue_node)
833 struct g2d_cmdlist_node *node;
838 mutex_lock(&g2d->cmdlist_mutex);
840 * commands in run_cmdlist have been completed so unmap all gem
841 * objects in each command node so that they are unreferenced.
843 list_for_each_entry(node, &runqueue_node->run_cmdlist, list)
844 g2d_unmap_cmdlist_gem(g2d, node, runqueue_node->filp);
845 list_splice_tail_init(&runqueue_node->run_cmdlist, &g2d->free_cmdlist);
846 mutex_unlock(&g2d->cmdlist_mutex);
848 kmem_cache_free(g2d->runqueue_slab, runqueue_node);
851 static void g2d_exec_runqueue(struct g2d_data *g2d)
853 g2d->runqueue_node = g2d_get_runqueue_node(g2d);
854 if (g2d->runqueue_node)
855 g2d_dma_start(g2d, g2d->runqueue_node);
858 static void g2d_runqueue_worker(struct work_struct *work)
860 struct g2d_data *g2d = container_of(work, struct g2d_data,
863 mutex_lock(&g2d->runqueue_mutex);
864 pm_runtime_put_sync(g2d->dev);
866 complete(&g2d->runqueue_node->complete);
867 if (g2d->runqueue_node->async)
868 g2d_free_runqueue_node(g2d, g2d->runqueue_node);
871 g2d->runqueue_node = NULL;
873 g2d_exec_runqueue(g2d);
874 mutex_unlock(&g2d->runqueue_mutex);
877 static void g2d_finish_event(struct g2d_data *g2d, u32 cmdlist_no)
879 struct drm_device *drm_dev = g2d->subdrv.drm_dev;
880 struct g2d_runqueue_node *runqueue_node = g2d->runqueue_node;
881 struct drm_exynos_pending_g2d_event *e;
884 if (list_empty(&runqueue_node->event_list))
887 e = list_first_entry(&runqueue_node->event_list,
888 struct drm_exynos_pending_g2d_event, base.link);
890 do_gettimeofday(&now);
891 e->event.tv_sec = now.tv_sec;
892 e->event.tv_usec = now.tv_usec;
893 e->event.cmdlist_no = cmdlist_no;
895 drm_send_event(drm_dev, &e->base);
898 static irqreturn_t g2d_irq_handler(int irq, void *dev_id)
900 struct g2d_data *g2d = dev_id;
903 pending = readl_relaxed(g2d->regs + G2D_INTC_PEND);
905 writel_relaxed(pending, g2d->regs + G2D_INTC_PEND);
907 if (pending & G2D_INTP_GCMD_FIN) {
908 u32 cmdlist_no = readl_relaxed(g2d->regs + G2D_DMA_STATUS);
910 cmdlist_no = (cmdlist_no & G2D_DMA_LIST_DONE_COUNT) >>
911 G2D_DMA_LIST_DONE_COUNT_OFFSET;
913 g2d_finish_event(g2d, cmdlist_no);
915 writel_relaxed(0, g2d->regs + G2D_DMA_HOLD_CMD);
916 if (!(pending & G2D_INTP_ACMD_FIN)) {
917 writel_relaxed(G2D_DMA_CONTINUE,
918 g2d->regs + G2D_DMA_COMMAND);
922 if (pending & G2D_INTP_ACMD_FIN)
923 queue_work(g2d->g2d_workq, &g2d->runqueue_work);
928 static int g2d_check_reg_offset(struct device *dev,
929 struct g2d_cmdlist_node *node,
930 int nr, bool for_addr)
932 struct g2d_cmdlist *cmdlist = node->cmdlist;
937 for (i = 0; i < nr; i++) {
938 struct g2d_buf_info *buf_info = &node->buf_info;
939 struct g2d_buf_desc *buf_desc;
940 enum g2d_reg_type reg_type;
943 index = cmdlist->last - 2 * (i + 1);
945 reg_offset = cmdlist->data[index] & ~0xfffff000;
946 if (reg_offset < G2D_VALID_START || reg_offset > G2D_VALID_END)
951 switch (reg_offset) {
952 case G2D_SRC_BASE_ADDR:
953 case G2D_SRC_PLANE2_BASE_ADDR:
954 case G2D_DST_BASE_ADDR:
955 case G2D_DST_PLANE2_BASE_ADDR:
956 case G2D_PAT_BASE_ADDR:
957 case G2D_MSK_BASE_ADDR:
961 reg_type = g2d_get_reg_type(reg_offset);
963 /* check userptr buffer type. */
964 if ((cmdlist->data[index] & ~0x7fffffff) >> 31) {
965 buf_info->types[reg_type] = BUF_TYPE_USERPTR;
966 cmdlist->data[index] &= ~G2D_BUF_USERPTR;
968 buf_info->types[reg_type] = BUF_TYPE_GEM;
970 case G2D_SRC_STRIDE_REG:
971 case G2D_DST_STRIDE_REG:
975 reg_type = g2d_get_reg_type(reg_offset);
977 buf_desc = &buf_info->descs[reg_type];
978 buf_desc->stride = cmdlist->data[index + 1];
980 case G2D_SRC_COLOR_MODE:
981 case G2D_DST_COLOR_MODE:
985 reg_type = g2d_get_reg_type(reg_offset);
987 buf_desc = &buf_info->descs[reg_type];
988 value = cmdlist->data[index + 1];
990 buf_desc->format = value & 0xf;
992 case G2D_SRC_LEFT_TOP:
993 case G2D_DST_LEFT_TOP:
997 reg_type = g2d_get_reg_type(reg_offset);
999 buf_desc = &buf_info->descs[reg_type];
1000 value = cmdlist->data[index + 1];
1002 buf_desc->left_x = value & 0x1fff;
1003 buf_desc->top_y = (value & 0x1fff0000) >> 16;
1005 case G2D_SRC_RIGHT_BOTTOM:
1006 case G2D_DST_RIGHT_BOTTOM:
1010 reg_type = g2d_get_reg_type(reg_offset);
1012 buf_desc = &buf_info->descs[reg_type];
1013 value = cmdlist->data[index + 1];
1015 buf_desc->right_x = value & 0x1fff;
1016 buf_desc->bottom_y = (value & 0x1fff0000) >> 16;
1028 dev_err(dev, "Bad register offset: 0x%lx\n", cmdlist->data[index]);
1032 /* ioctl functions */
1033 int exynos_g2d_get_ver_ioctl(struct drm_device *drm_dev, void *data,
1034 struct drm_file *file)
1036 struct drm_exynos_file_private *file_priv = file->driver_priv;
1037 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1039 struct g2d_data *g2d;
1040 struct drm_exynos_g2d_get_ver *ver = data;
1045 dev = g2d_priv->dev;
1049 g2d = dev_get_drvdata(dev);
1053 ver->major = G2D_HW_MAJOR_VER;
1054 ver->minor = G2D_HW_MINOR_VER;
1059 int exynos_g2d_set_cmdlist_ioctl(struct drm_device *drm_dev, void *data,
1060 struct drm_file *file)
1062 struct drm_exynos_file_private *file_priv = file->driver_priv;
1063 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1065 struct g2d_data *g2d;
1066 struct drm_exynos_g2d_set_cmdlist *req = data;
1067 struct drm_exynos_g2d_cmd *cmd;
1068 struct drm_exynos_pending_g2d_event *e;
1069 struct g2d_cmdlist_node *node;
1070 struct g2d_cmdlist *cmdlist;
1077 dev = g2d_priv->dev;
1081 g2d = dev_get_drvdata(dev);
1085 node = g2d_get_cmdlist(g2d);
1091 if (req->event_type != G2D_EVENT_NOT) {
1092 e = kzalloc(sizeof(*node->event), GFP_KERNEL);
1098 e->event.base.type = DRM_EXYNOS_G2D_EVENT;
1099 e->event.base.length = sizeof(e->event);
1100 e->event.user_data = req->user_data;
1102 ret = drm_event_reserve_init(drm_dev, file, &e->base, &e->event.base);
1111 cmdlist = node->cmdlist;
1116 * If don't clear SFR registers, the cmdlist is affected by register
1117 * values of previous cmdlist. G2D hw executes SFR clear command and
1118 * a next command at the same time then the next command is ignored and
1119 * is executed rightly from next next command, so needs a dummy command
1120 * to next command of SFR clear command.
1122 cmdlist->data[cmdlist->last++] = G2D_SOFT_RESET;
1123 cmdlist->data[cmdlist->last++] = G2D_SFRCLEAR;
1124 cmdlist->data[cmdlist->last++] = G2D_SRC_BASE_ADDR;
1125 cmdlist->data[cmdlist->last++] = 0;
1128 * 'LIST_HOLD' command should be set to the DMA_HOLD_CMD_REG
1129 * and GCF bit should be set to INTEN register if user wants
1130 * G2D interrupt event once current command list execution is
1132 * Otherwise only ACF bit should be set to INTEN register so
1133 * that one interrupt is occurred after all command lists
1134 * have been completed.
1137 cmdlist->data[cmdlist->last++] = G2D_INTEN;
1138 cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF | G2D_INTEN_GCF;
1139 cmdlist->data[cmdlist->last++] = G2D_DMA_HOLD_CMD;
1140 cmdlist->data[cmdlist->last++] = G2D_LIST_HOLD;
1142 cmdlist->data[cmdlist->last++] = G2D_INTEN;
1143 cmdlist->data[cmdlist->last++] = G2D_INTEN_ACF;
1146 /* Check size of cmdlist: last 2 is about G2D_BITBLT_START */
1147 size = cmdlist->last + req->cmd_nr * 2 + req->cmd_buf_nr * 2 + 2;
1148 if (size > G2D_CMDLIST_DATA_NUM) {
1149 dev_err(dev, "cmdlist size is too big\n");
1151 goto err_free_event;
1154 cmd = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd;
1156 if (copy_from_user(cmdlist->data + cmdlist->last,
1158 sizeof(*cmd) * req->cmd_nr)) {
1160 goto err_free_event;
1162 cmdlist->last += req->cmd_nr * 2;
1164 ret = g2d_check_reg_offset(dev, node, req->cmd_nr, false);
1166 goto err_free_event;
1168 node->buf_info.map_nr = req->cmd_buf_nr;
1169 if (req->cmd_buf_nr) {
1170 struct drm_exynos_g2d_cmd *cmd_buf;
1172 cmd_buf = (struct drm_exynos_g2d_cmd *)(uint32_t)req->cmd_buf;
1174 if (copy_from_user(cmdlist->data + cmdlist->last,
1175 (void __user *)cmd_buf,
1176 sizeof(*cmd_buf) * req->cmd_buf_nr)) {
1178 goto err_free_event;
1180 cmdlist->last += req->cmd_buf_nr * 2;
1182 ret = g2d_check_reg_offset(dev, node, req->cmd_buf_nr, true);
1184 goto err_free_event;
1186 ret = g2d_map_cmdlist_gem(g2d, node, drm_dev, file);
1191 cmdlist->data[cmdlist->last++] = G2D_BITBLT_START;
1192 cmdlist->data[cmdlist->last++] = G2D_START_BITBLT;
1195 cmdlist->head = cmdlist->last / 2;
1198 cmdlist->data[cmdlist->last] = 0;
1200 g2d_add_cmdlist_to_inuse(g2d_priv, node);
1205 g2d_unmap_cmdlist_gem(g2d, node, file);
1208 drm_event_cancel_free(drm_dev, &node->event->base);
1210 g2d_put_cmdlist(g2d, node);
1214 int exynos_g2d_exec_ioctl(struct drm_device *drm_dev, void *data,
1215 struct drm_file *file)
1217 struct drm_exynos_file_private *file_priv = file->driver_priv;
1218 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1220 struct g2d_data *g2d;
1221 struct drm_exynos_g2d_exec *req = data;
1222 struct g2d_runqueue_node *runqueue_node;
1223 struct list_head *run_cmdlist;
1224 struct list_head *event_list;
1229 dev = g2d_priv->dev;
1233 g2d = dev_get_drvdata(dev);
1237 runqueue_node = kmem_cache_alloc(g2d->runqueue_slab, GFP_KERNEL);
1238 if (!runqueue_node) {
1239 dev_err(dev, "failed to allocate memory\n");
1242 run_cmdlist = &runqueue_node->run_cmdlist;
1243 event_list = &runqueue_node->event_list;
1244 INIT_LIST_HEAD(run_cmdlist);
1245 INIT_LIST_HEAD(event_list);
1246 init_completion(&runqueue_node->complete);
1247 runqueue_node->async = req->async;
1249 list_splice_init(&g2d_priv->inuse_cmdlist, run_cmdlist);
1250 list_splice_init(&g2d_priv->event_list, event_list);
1252 if (list_empty(run_cmdlist)) {
1253 dev_err(dev, "there is no inuse cmdlist\n");
1254 kmem_cache_free(g2d->runqueue_slab, runqueue_node);
1258 mutex_lock(&g2d->runqueue_mutex);
1259 runqueue_node->pid = current->pid;
1260 runqueue_node->filp = file;
1261 list_add_tail(&runqueue_node->list, &g2d->runqueue);
1262 if (!g2d->runqueue_node)
1263 g2d_exec_runqueue(g2d);
1264 mutex_unlock(&g2d->runqueue_mutex);
1266 if (runqueue_node->async)
1269 wait_for_completion(&runqueue_node->complete);
1270 g2d_free_runqueue_node(g2d, runqueue_node);
1276 static int g2d_subdrv_probe(struct drm_device *drm_dev, struct device *dev)
1278 struct g2d_data *g2d;
1281 g2d = dev_get_drvdata(dev);
1285 /* allocate dma-aware cmdlist buffer. */
1286 ret = g2d_init_cmdlist(g2d);
1288 dev_err(dev, "cmdlist init failed\n");
1292 ret = drm_iommu_attach_device(drm_dev, dev);
1294 dev_err(dev, "failed to enable iommu.\n");
1295 g2d_fini_cmdlist(g2d);
1302 static void g2d_subdrv_remove(struct drm_device *drm_dev, struct device *dev)
1304 drm_iommu_detach_device(drm_dev, dev);
1307 static int g2d_open(struct drm_device *drm_dev, struct device *dev,
1308 struct drm_file *file)
1310 struct drm_exynos_file_private *file_priv = file->driver_priv;
1311 struct exynos_drm_g2d_private *g2d_priv;
1313 g2d_priv = kzalloc(sizeof(*g2d_priv), GFP_KERNEL);
1317 g2d_priv->dev = dev;
1318 file_priv->g2d_priv = g2d_priv;
1320 INIT_LIST_HEAD(&g2d_priv->inuse_cmdlist);
1321 INIT_LIST_HEAD(&g2d_priv->event_list);
1322 INIT_LIST_HEAD(&g2d_priv->userptr_list);
1327 static void g2d_close(struct drm_device *drm_dev, struct device *dev,
1328 struct drm_file *file)
1330 struct drm_exynos_file_private *file_priv = file->driver_priv;
1331 struct exynos_drm_g2d_private *g2d_priv = file_priv->g2d_priv;
1332 struct g2d_data *g2d;
1333 struct g2d_cmdlist_node *node, *n;
1338 g2d = dev_get_drvdata(dev);
1342 mutex_lock(&g2d->cmdlist_mutex);
1343 list_for_each_entry_safe(node, n, &g2d_priv->inuse_cmdlist, list) {
1345 * unmap all gem objects not completed.
1347 * P.S. if current process was terminated forcely then
1348 * there may be some commands in inuse_cmdlist so unmap
1351 g2d_unmap_cmdlist_gem(g2d, node, file);
1352 list_move_tail(&node->list, &g2d->free_cmdlist);
1354 mutex_unlock(&g2d->cmdlist_mutex);
1356 /* release all g2d_userptr in pool. */
1357 g2d_userptr_free_all(drm_dev, g2d, file);
1359 kfree(file_priv->g2d_priv);
1362 static int g2d_probe(struct platform_device *pdev)
1364 struct device *dev = &pdev->dev;
1365 struct resource *res;
1366 struct g2d_data *g2d;
1367 struct exynos_drm_subdrv *subdrv;
1370 g2d = devm_kzalloc(dev, sizeof(*g2d), GFP_KERNEL);
1374 g2d->runqueue_slab = kmem_cache_create("g2d_runqueue_slab",
1375 sizeof(struct g2d_runqueue_node), 0, 0, NULL);
1376 if (!g2d->runqueue_slab)
1381 g2d->g2d_workq = create_singlethread_workqueue("g2d");
1382 if (!g2d->g2d_workq) {
1383 dev_err(dev, "failed to create workqueue\n");
1385 goto err_destroy_slab;
1388 INIT_WORK(&g2d->runqueue_work, g2d_runqueue_worker);
1389 INIT_LIST_HEAD(&g2d->free_cmdlist);
1390 INIT_LIST_HEAD(&g2d->runqueue);
1392 mutex_init(&g2d->cmdlist_mutex);
1393 mutex_init(&g2d->runqueue_mutex);
1395 g2d->gate_clk = devm_clk_get(dev, "fimg2d");
1396 if (IS_ERR(g2d->gate_clk)) {
1397 dev_err(dev, "failed to get gate clock\n");
1398 ret = PTR_ERR(g2d->gate_clk);
1399 goto err_destroy_workqueue;
1402 pm_runtime_enable(dev);
1404 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1406 g2d->regs = devm_ioremap_resource(dev, res);
1407 if (IS_ERR(g2d->regs)) {
1408 ret = PTR_ERR(g2d->regs);
1412 g2d->irq = platform_get_irq(pdev, 0);
1414 dev_err(dev, "failed to get irq\n");
1419 ret = devm_request_irq(dev, g2d->irq, g2d_irq_handler, 0,
1422 dev_err(dev, "irq request failed\n");
1426 g2d->max_pool = MAX_POOL;
1428 platform_set_drvdata(pdev, g2d);
1430 subdrv = &g2d->subdrv;
1432 subdrv->probe = g2d_subdrv_probe;
1433 subdrv->remove = g2d_subdrv_remove;
1434 subdrv->open = g2d_open;
1435 subdrv->close = g2d_close;
1437 ret = exynos_drm_subdrv_register(subdrv);
1439 dev_err(dev, "failed to register drm g2d device\n");
1443 dev_info(dev, "The exynos g2d(ver %d.%d) successfully probed\n",
1444 G2D_HW_MAJOR_VER, G2D_HW_MINOR_VER);
1449 pm_runtime_disable(dev);
1450 err_destroy_workqueue:
1451 destroy_workqueue(g2d->g2d_workq);
1453 kmem_cache_destroy(g2d->runqueue_slab);
1457 static int g2d_remove(struct platform_device *pdev)
1459 struct g2d_data *g2d = platform_get_drvdata(pdev);
1461 cancel_work_sync(&g2d->runqueue_work);
1462 exynos_drm_subdrv_unregister(&g2d->subdrv);
1464 while (g2d->runqueue_node) {
1465 g2d_free_runqueue_node(g2d, g2d->runqueue_node);
1466 g2d->runqueue_node = g2d_get_runqueue_node(g2d);
1469 pm_runtime_disable(&pdev->dev);
1471 g2d_fini_cmdlist(g2d);
1472 destroy_workqueue(g2d->g2d_workq);
1473 kmem_cache_destroy(g2d->runqueue_slab);
1478 #ifdef CONFIG_PM_SLEEP
1479 static int g2d_suspend(struct device *dev)
1481 struct g2d_data *g2d = dev_get_drvdata(dev);
1483 mutex_lock(&g2d->runqueue_mutex);
1484 g2d->suspended = true;
1485 mutex_unlock(&g2d->runqueue_mutex);
1487 while (g2d->runqueue_node)
1488 /* FIXME: good range? */
1489 usleep_range(500, 1000);
1491 flush_work(&g2d->runqueue_work);
1496 static int g2d_resume(struct device *dev)
1498 struct g2d_data *g2d = dev_get_drvdata(dev);
1500 g2d->suspended = false;
1501 g2d_exec_runqueue(g2d);
1508 static int g2d_runtime_suspend(struct device *dev)
1510 struct g2d_data *g2d = dev_get_drvdata(dev);
1512 clk_disable_unprepare(g2d->gate_clk);
1517 static int g2d_runtime_resume(struct device *dev)
1519 struct g2d_data *g2d = dev_get_drvdata(dev);
1522 ret = clk_prepare_enable(g2d->gate_clk);
1524 dev_warn(dev, "failed to enable clock.\n");
1530 static const struct dev_pm_ops g2d_pm_ops = {
1531 SET_SYSTEM_SLEEP_PM_OPS(g2d_suspend, g2d_resume)
1532 SET_RUNTIME_PM_OPS(g2d_runtime_suspend, g2d_runtime_resume, NULL)
1535 static const struct of_device_id exynos_g2d_match[] = {
1536 { .compatible = "samsung,exynos5250-g2d" },
1537 { .compatible = "samsung,exynos4212-g2d" },
1540 MODULE_DEVICE_TABLE(of, exynos_g2d_match);
1542 struct platform_driver g2d_driver = {
1544 .remove = g2d_remove,
1547 .owner = THIS_MODULE,
1549 .of_match_table = exynos_g2d_match,