2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
14 #include <drm/exynos_drm.h>
15 #include "exynos_drm_drv.h"
16 #include "exynos_drm_crtc.h"
17 #include "exynos_drm_fb.h"
18 #include "exynos_drm_gem.h"
19 #include "exynos_drm_plane.h"
21 #define to_exynos_plane(x) container_of(x, struct exynos_plane, base)
24 struct drm_plane base;
25 struct exynos_drm_overlay overlay;
29 static const uint32_t formats[] = {
37 * This function is to get X or Y size shown via screen. This needs length and
38 * start position of CRTC.
41 * CRTC ----------------
44 * There are six cases from a to f.
46 * <----- SCREEN ----->
48 * ----------|------------------|----------
52 * c --------------------------
57 static int exynos_plane_get_size(int start, unsigned length, unsigned last)
59 int end = start + length;
64 size = min_t(unsigned, end, last);
65 } else if (start <= last) {
66 size = min_t(unsigned, last - start, length);
72 int exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc,
73 struct drm_framebuffer *fb, int crtc_x, int crtc_y,
74 unsigned int crtc_w, unsigned int crtc_h,
75 uint32_t src_x, uint32_t src_y,
76 uint32_t src_w, uint32_t src_h)
78 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
79 struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
80 unsigned int actual_w;
81 unsigned int actual_h;
85 nr = exynos_drm_fb_get_buf_cnt(fb);
86 for (i = 0; i < nr; i++) {
87 struct exynos_drm_gem_buf *buffer = exynos_drm_fb_buffer(fb, i);
90 DRM_DEBUG_KMS("buffer is null\n");
94 overlay->dma_addr[i] = buffer->dma_addr;
96 DRM_DEBUG_KMS("buffer: %d, dma_addr = 0x%lx\n",
97 i, (unsigned long)overlay->dma_addr[i]);
100 actual_w = exynos_plane_get_size(crtc_x, crtc_w, crtc->mode.hdisplay);
101 actual_h = exynos_plane_get_size(crtc_y, crtc_h, crtc->mode.vdisplay);
115 /* set drm framebuffer data. */
116 overlay->fb_x = src_x;
117 overlay->fb_y = src_y;
118 overlay->fb_width = fb->width;
119 overlay->fb_height = fb->height;
120 overlay->src_width = src_w;
121 overlay->src_height = src_h;
122 overlay->bpp = fb->bits_per_pixel;
123 overlay->pitch = fb->pitches[0];
124 overlay->pixel_format = fb->pixel_format;
126 /* set overlay range to be displayed. */
127 overlay->crtc_x = crtc_x;
128 overlay->crtc_y = crtc_y;
129 overlay->crtc_width = actual_w;
130 overlay->crtc_height = actual_h;
132 /* set drm mode data. */
133 overlay->mode_width = crtc->mode.hdisplay;
134 overlay->mode_height = crtc->mode.vdisplay;
135 overlay->refresh = crtc->mode.vrefresh;
136 overlay->scan_flag = crtc->mode.flags;
138 DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)",
139 overlay->crtc_x, overlay->crtc_y,
140 overlay->crtc_width, overlay->crtc_height);
142 exynos_drm_crtc_plane_mode_set(crtc, overlay);
147 void exynos_plane_commit(struct drm_plane *plane)
149 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
150 struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
152 exynos_drm_crtc_plane_commit(plane->crtc, overlay->zpos);
155 void exynos_plane_dpms(struct drm_plane *plane, int mode)
157 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
158 struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
160 if (mode == DRM_MODE_DPMS_ON) {
161 if (exynos_plane->enabled)
164 exynos_drm_crtc_plane_enable(plane->crtc, overlay->zpos);
165 exynos_plane->enabled = true;
167 if (!exynos_plane->enabled)
170 exynos_drm_crtc_plane_disable(plane->crtc, overlay->zpos);
171 exynos_plane->enabled = false;
176 exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
177 struct drm_framebuffer *fb, int crtc_x, int crtc_y,
178 unsigned int crtc_w, unsigned int crtc_h,
179 uint32_t src_x, uint32_t src_y,
180 uint32_t src_w, uint32_t src_h)
184 ret = exynos_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y,
185 crtc_w, crtc_h, src_x >> 16, src_y >> 16,
186 src_w >> 16, src_h >> 16);
192 exynos_plane_commit(plane);
193 exynos_plane_dpms(plane, DRM_MODE_DPMS_ON);
198 static int exynos_disable_plane(struct drm_plane *plane)
200 exynos_plane_dpms(plane, DRM_MODE_DPMS_OFF);
205 static void exynos_plane_destroy(struct drm_plane *plane)
207 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
209 exynos_disable_plane(plane);
210 drm_plane_cleanup(plane);
214 static int exynos_plane_set_property(struct drm_plane *plane,
215 struct drm_property *property,
218 struct drm_device *dev = plane->dev;
219 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
220 struct exynos_drm_private *dev_priv = dev->dev_private;
222 if (property == dev_priv->plane_zpos_property) {
223 exynos_plane->overlay.zpos = val;
230 static struct drm_plane_funcs exynos_plane_funcs = {
231 .update_plane = exynos_update_plane,
232 .disable_plane = exynos_disable_plane,
233 .destroy = exynos_plane_destroy,
234 .set_property = exynos_plane_set_property,
237 static void exynos_plane_attach_zpos_property(struct drm_plane *plane)
239 struct drm_device *dev = plane->dev;
240 struct exynos_drm_private *dev_priv = dev->dev_private;
241 struct drm_property *prop;
243 prop = dev_priv->plane_zpos_property;
245 prop = drm_property_create_range(dev, 0, "zpos", 0,
250 dev_priv->plane_zpos_property = prop;
253 drm_object_attach_property(&plane->base, prop, 0);
256 struct drm_plane *exynos_plane_init(struct drm_device *dev,
257 unsigned long possible_crtcs, bool priv)
259 struct exynos_plane *exynos_plane;
262 exynos_plane = kzalloc(sizeof(struct exynos_plane), GFP_KERNEL);
266 err = drm_plane_init(dev, &exynos_plane->base, possible_crtcs,
267 &exynos_plane_funcs, formats, ARRAY_SIZE(formats),
270 DRM_ERROR("failed to initialize plane\n");
276 exynos_plane->overlay.zpos = DEFAULT_ZPOS;
278 exynos_plane_attach_zpos_property(&exynos_plane->base);
280 return &exynos_plane->base;