1 /**************************************************************************
2 * Copyright (c) 2007-2011, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 * Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
19 * develop this driver.
21 **************************************************************************/
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/errno.h>
26 #include <linux/string.h>
28 #include <linux/tty.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
32 #include <linux/init.h>
33 #include <linux/console.h>
37 #include <drm/drm_crtc.h>
41 #include "framebuffer.h"
44 * psb_spank - reset the 2D engine
45 * @dev_priv: our PSB DRM device
47 * Soft reset the graphics engine and then reload the necessary registers.
48 * We use this at initialisation time but it will become relevant for
51 void psb_spank(struct drm_psb_private *dev_priv)
53 PSB_WSGX32(_PSB_CS_RESET_BIF_RESET | _PSB_CS_RESET_DPM_RESET |
54 _PSB_CS_RESET_TA_RESET | _PSB_CS_RESET_USE_RESET |
55 _PSB_CS_RESET_ISP_RESET | _PSB_CS_RESET_TSP_RESET |
56 _PSB_CS_RESET_TWOD_RESET, PSB_CR_SOFT_RESET);
57 PSB_RSGX32(PSB_CR_SOFT_RESET);
61 PSB_WSGX32(0, PSB_CR_SOFT_RESET);
63 PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_CB_CTRL_CLEAR_FAULT,
66 (void) PSB_RSGX32(PSB_CR_BIF_CTRL);
69 PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_CB_CTRL_CLEAR_FAULT,
71 (void) PSB_RSGX32(PSB_CR_BIF_CTRL);
72 PSB_WSGX32(dev_priv->gtt.gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
76 * psb2_2d_wait_available - wait for FIFO room
77 * @dev_priv: our DRM device
78 * @size: size (in dwords) of the command we want to issue
80 * Wait until there is room to load the FIFO with our data. If the
81 * device is not responding then reset it
83 static int psb_2d_wait_available(struct drm_psb_private *dev_priv,
86 uint32_t avail = PSB_RSGX32(PSB_CR_2D_SOCIF);
87 unsigned long t = jiffies + HZ;
89 while (avail < size) {
90 avail = PSB_RSGX32(PSB_CR_2D_SOCIF);
91 if (time_after(jiffies, t)) {
100 * psb_2d_submit - submit a 2D command
101 * @dev_priv: our DRM device
102 * @cmdbuf: command to issue
103 * @size: length (in dwords)
105 * Issue one or more 2D commands to the accelerator. This needs to be
106 * serialized later when we add the GEM interfaces for acceleration
108 static int psbfb_2d_submit(struct drm_psb_private *dev_priv, uint32_t *cmdbuf,
113 unsigned submit_size;
116 spin_lock_irqsave(&dev_priv->lock_2d, flags);
118 submit_size = (size < 0x60) ? size : 0x60;
120 ret = psb_2d_wait_available(dev_priv, submit_size);
126 for (i = 0; i < submit_size; i += 4)
127 PSB_WSGX32(*cmdbuf++, PSB_SGX_2D_SLAVE_PORT + i);
129 (void)PSB_RSGX32(PSB_SGX_2D_SLAVE_PORT + i - 4);
131 spin_unlock_irqrestore(&dev_priv->lock_2d, flags);
137 * psb_accel_2d_copy_direction - compute blit order
138 * @xdir: X direction of move
139 * @ydir: Y direction of move
141 * Compute the correct order setings to ensure that an overlapping blit
142 * correctly copies all the pixels.
144 static u32 psb_accel_2d_copy_direction(int xdir, int ydir)
147 return (ydir < 0) ? PSB_2D_COPYORDER_BR2TL :
148 PSB_2D_COPYORDER_TR2BL;
150 return (ydir < 0) ? PSB_2D_COPYORDER_BL2TR :
151 PSB_2D_COPYORDER_TL2BR;
155 * psb_accel_2d_copy - accelerated 2D copy
156 * @dev_priv: our DRM device
157 * @src_offset in bytes
158 * @src_stride in bytes
159 * @src_format psb 2D format defines
160 * @dst_offset in bytes
161 * @dst_stride in bytes
162 * @dst_format psb 2D format defines
163 * @src_x offset in pixels
164 * @src_y offset in pixels
165 * @dst_x offset in pixels
166 * @dst_y offset in pixels
167 * @size_x of the copied area
168 * @size_y of the copied area
170 * Format and issue a 2D accelerated copy command.
172 static int psb_accel_2d_copy(struct drm_psb_private *dev_priv,
173 uint32_t src_offset, uint32_t src_stride,
174 uint32_t src_format, uint32_t dst_offset,
175 uint32_t dst_stride, uint32_t dst_format,
176 uint16_t src_x, uint16_t src_y,
177 uint16_t dst_x, uint16_t dst_y,
178 uint16_t size_x, uint16_t size_y)
188 psb_accel_2d_copy_direction(src_x - dst_x, src_y - dst_y);
190 if (direction == PSB_2D_COPYORDER_BR2TL ||
191 direction == PSB_2D_COPYORDER_TR2BL) {
195 if (direction == PSB_2D_COPYORDER_BR2TL ||
196 direction == PSB_2D_COPYORDER_BL2TR) {
204 PSB_2D_DSTCK_DISABLE |
205 PSB_2D_SRCCK_DISABLE |
206 PSB_2D_USE_PAT | PSB_2D_ROP3_SRCCOPY | direction;
208 *buf++ = PSB_2D_FENCE_BH;
210 PSB_2D_DST_SURF_BH | dst_format | (dst_stride <<
211 PSB_2D_DST_STRIDE_SHIFT);
214 PSB_2D_SRC_SURF_BH | src_format | (src_stride <<
215 PSB_2D_SRC_STRIDE_SHIFT);
218 PSB_2D_SRC_OFF_BH | (src_x << PSB_2D_SRCOFF_XSTART_SHIFT) |
219 (src_y << PSB_2D_SRCOFF_YSTART_SHIFT);
222 (dst_x << PSB_2D_DST_XSTART_SHIFT) | (dst_y <<
223 PSB_2D_DST_YSTART_SHIFT);
225 (size_x << PSB_2D_DST_XSIZE_SHIFT) | (size_y <<
226 PSB_2D_DST_YSIZE_SHIFT);
227 *buf++ = PSB_2D_FLUSH_BH;
229 return psbfb_2d_submit(dev_priv, buffer, buf - buffer);
233 * psbfb_copyarea_accel - copyarea acceleration for /dev/fb
234 * @info: our framebuffer
235 * @a: copyarea parameters from the framebuffer core
237 * Perform a 2D copy via the accelerator
239 static void psbfb_copyarea_accel(struct fb_info *info,
240 const struct fb_copyarea *a)
242 struct psb_fbdev *fbdev = info->par;
243 struct psb_framebuffer *psbfb = &fbdev->pfb;
244 struct drm_device *dev = psbfb->base.dev;
245 struct drm_framebuffer *fb = fbdev->psb_fb_helper.fb;
246 struct drm_psb_private *dev_priv = dev->dev_private;
255 offset = psbfb->gtt->offset;
256 stride = fb->pitches[0];
260 src_format = PSB_2D_SRC_332RGB;
261 dst_format = PSB_2D_DST_332RGB;
264 src_format = PSB_2D_SRC_555RGB;
265 dst_format = PSB_2D_DST_555RGB;
268 src_format = PSB_2D_SRC_565RGB;
269 dst_format = PSB_2D_DST_565RGB;
273 /* this is wrong but since we don't do blending its okay */
274 src_format = PSB_2D_SRC_8888ARGB;
275 dst_format = PSB_2D_DST_8888ARGB;
278 /* software fallback */
279 cfb_copyarea(info, a);
283 if (!gma_power_begin(dev, false)) {
284 cfb_copyarea(info, a);
287 psb_accel_2d_copy(dev_priv,
288 offset, stride, src_format,
289 offset, stride, dst_format,
290 a->sx, a->sy, a->dx, a->dy, a->width, a->height);
295 * psbfb_copyarea - 2D copy interface
296 * @info: our framebuffer
297 * @region: region to copy
299 * Copy an area of the framebuffer console either by the accelerator
300 * or directly using the cfb helpers according to the request
302 void psbfb_copyarea(struct fb_info *info,
303 const struct fb_copyarea *region)
305 if (unlikely(info->state != FBINFO_STATE_RUNNING))
308 /* Avoid the 8 pixel erratum */
309 if (region->width == 8 || region->height == 8 ||
310 (info->flags & FBINFO_HWACCEL_DISABLED))
311 return cfb_copyarea(info, region);
313 psbfb_copyarea_accel(info, region);
317 * psbfb_sync - synchronize 2D
318 * @info: our framebuffer
320 * Wait for the 2D engine to quiesce so that we can do CPU
321 * access to the framebuffer again
323 int psbfb_sync(struct fb_info *info)
325 struct psb_fbdev *fbdev = info->par;
326 struct psb_framebuffer *psbfb = &fbdev->pfb;
327 struct drm_device *dev = psbfb->base.dev;
328 struct drm_psb_private *dev_priv = dev->dev_private;
329 unsigned long _end = jiffies + DRM_HZ;
333 spin_lock_irqsave(&dev_priv->lock_2d, flags);
335 * First idle the 2D engine.
338 if ((PSB_RSGX32(PSB_CR_2D_SOCIF) == _PSB_C2_SOCIF_EMPTY) &&
339 ((PSB_RSGX32(PSB_CR_2D_BLIT_STATUS) & _PSB_C2B_STATUS_BUSY) == 0))
343 busy = (PSB_RSGX32(PSB_CR_2D_SOCIF) != _PSB_C2_SOCIF_EMPTY);
345 } while (busy && !time_after_eq(jiffies, _end));
348 busy = (PSB_RSGX32(PSB_CR_2D_SOCIF) != _PSB_C2_SOCIF_EMPTY);
353 busy = ((PSB_RSGX32(PSB_CR_2D_BLIT_STATUS) &
354 _PSB_C2B_STATUS_BUSY) != 0);
356 } while (busy && !time_after_eq(jiffies, _end));
358 busy = ((PSB_RSGX32(PSB_CR_2D_BLIT_STATUS) &
359 _PSB_C2B_STATUS_BUSY) != 0);
362 spin_unlock_irqrestore(&dev_priv->lock_2d, flags);
363 return (busy) ? -EBUSY : 0;