1 /**************************************************************************
2 * Copyright (c) 2011, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 **************************************************************************/
20 #include <linux/backlight.h>
26 #include "psb_intel_reg.h"
27 #include "intel_bios.h"
28 #include "cdv_device.h"
30 #define VGA_SR_INDEX 0x3c4
31 #define VGA_SR_DATA 0x3c5
33 static void cdv_disable_vga(struct drm_device *dev)
40 outb(1, VGA_SR_INDEX);
41 sr1 = inb(VGA_SR_DATA);
42 outb(sr1 | 1<<5, VGA_SR_DATA);
45 REG_WRITE(vga_reg, VGA_DISP_DISABLE);
49 static int cdv_output_init(struct drm_device *dev)
51 struct drm_psb_private *dev_priv = dev->dev_private;
54 cdv_intel_crt_init(dev, &dev_priv->mode_dev);
55 cdv_intel_lvds_init(dev, &dev_priv->mode_dev);
57 /* These bits indicate HDMI not SDVO on CDV, but we don't yet support
59 if (REG_READ(SDVOB) & SDVO_DETECTED)
60 cdv_hdmi_init(dev, &dev_priv->mode_dev, SDVOB);
61 if (REG_READ(SDVOC) & SDVO_DETECTED)
62 cdv_hdmi_init(dev, &dev_priv->mode_dev, SDVOC);
66 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
69 * Poulsbo Backlight Interfaces
72 #define BLC_PWM_PRECISION_FACTOR 100 /* 10000000 */
73 #define BLC_PWM_FREQ_CALC_CONSTANT 32
76 #define PSB_BLC_PWM_PRECISION_FACTOR 10
77 #define PSB_BLC_MAX_PWM_REG_FREQ 0xFFFE
78 #define PSB_BLC_MIN_PWM_REG_FREQ 0x2
80 #define PSB_BACKLIGHT_PWM_POLARITY_BIT_CLEAR (0xFFFE)
81 #define PSB_BACKLIGHT_PWM_CTL_SHIFT (16)
83 static int cdv_brightness;
84 static struct backlight_device *cdv_backlight_device;
86 static int cdv_get_brightness(struct backlight_device *bd)
88 /* return locally cached var instead of HW read (due to DPST etc.) */
89 /* FIXME: ideally return actual value in case firmware fiddled with
91 return cdv_brightness;
95 static int cdv_backlight_setup(struct drm_device *dev)
97 struct drm_psb_private *dev_priv = dev->dev_private;
98 unsigned long core_clock;
99 /* u32 bl_max_freq; */
100 /* unsigned long value; */
103 uint32_t blc_pwm_precision_factor;
105 /* get bl_max_freq and pol from dev_priv*/
106 if (!dev_priv->lvds_bl) {
107 dev_err(dev->dev, "Has no valid LVDS backlight info\n");
110 bl_max_freq = dev_priv->lvds_bl->freq;
111 blc_pwm_precision_factor = PSB_BLC_PWM_PRECISION_FACTOR;
113 core_clock = dev_priv->core_freq;
115 value = (core_clock * MHz) / BLC_PWM_FREQ_CALC_CONSTANT;
116 value *= blc_pwm_precision_factor;
117 value /= bl_max_freq;
118 value /= blc_pwm_precision_factor;
120 if (value > (unsigned long long)PSB_BLC_MAX_PWM_REG_FREQ ||
121 value < (unsigned long long)PSB_BLC_MIN_PWM_REG_FREQ)
129 static int cdv_set_brightness(struct backlight_device *bd)
131 int level = bd->props.brightness;
133 /* Percentage 1-100% being valid */
137 /*cdv_intel_lvds_set_brightness(dev, level); FIXME */
138 cdv_brightness = level;
142 static const struct backlight_ops cdv_ops = {
143 .get_brightness = cdv_get_brightness,
144 .update_status = cdv_set_brightness,
147 static int cdv_backlight_init(struct drm_device *dev)
149 struct drm_psb_private *dev_priv = dev->dev_private;
151 struct backlight_properties props;
153 memset(&props, 0, sizeof(struct backlight_properties));
154 props.max_brightness = 100;
155 props.type = BACKLIGHT_PLATFORM;
157 cdv_backlight_device = backlight_device_register("psb-bl",
158 NULL, (void *)dev, &cdv_ops, &props);
159 if (IS_ERR(cdv_backlight_device))
160 return PTR_ERR(cdv_backlight_device);
162 ret = cdv_backlight_setup(dev);
164 backlight_device_unregister(cdv_backlight_device);
165 cdv_backlight_device = NULL;
168 cdv_backlight_device->props.brightness = 100;
169 cdv_backlight_device->props.max_brightness = 100;
170 backlight_update_status(cdv_backlight_device);
171 dev_priv->backlight_device = cdv_backlight_device;
178 * Provide the Cedarview specific chip logic and low level methods
179 * for power management
181 * FIXME: we need to implement the apm/ospm base management bits
182 * for this and the MID devices.
185 static inline u32 CDV_MSG_READ32(uint port, uint offset)
187 int mcr = (0x10<<24) | (port << 16) | (offset << 8);
188 uint32_t ret_val = 0;
189 struct pci_dev *pci_root = pci_get_bus_and_slot(0, 0);
190 pci_write_config_dword(pci_root, 0xD0, mcr);
191 pci_read_config_dword(pci_root, 0xD4, &ret_val);
192 pci_dev_put(pci_root);
196 static inline void CDV_MSG_WRITE32(uint port, uint offset, u32 value)
198 int mcr = (0x11<<24) | (port << 16) | (offset << 8) | 0xF0;
199 struct pci_dev *pci_root = pci_get_bus_and_slot(0, 0);
200 pci_write_config_dword(pci_root, 0xD4, value);
201 pci_write_config_dword(pci_root, 0xD0, mcr);
202 pci_dev_put(pci_root);
205 #define PSB_APM_CMD 0x0
206 #define PSB_APM_STS 0x04
207 #define PSB_PM_SSC 0x20
208 #define PSB_PM_SSS 0x30
209 #define PSB_PWRGT_GFX_MASK 0x3
210 #define CDV_PWRGT_DISPLAY_CNTR 0x000fc00c
211 #define CDV_PWRGT_DISPLAY_STS 0x000fc00c
213 static void cdv_init_pm(struct drm_device *dev)
215 struct drm_psb_private *dev_priv = dev->dev_private;
219 dev_priv->apm_base = CDV_MSG_READ32(PSB_PUNIT_PORT,
221 dev_priv->ospm_base = CDV_MSG_READ32(PSB_PUNIT_PORT,
222 PSB_OSPMBA) & 0xFFFF;
224 /* Force power on for now */
225 pwr_cnt = inl(dev_priv->apm_base + PSB_APM_CMD);
226 pwr_cnt &= ~PSB_PWRGT_GFX_MASK;
228 outl(pwr_cnt, dev_priv->apm_base + PSB_APM_CMD);
229 for (i = 0; i < 5; i++) {
230 u32 pwr_sts = inl(dev_priv->apm_base + PSB_APM_STS);
231 if ((pwr_sts & PSB_PWRGT_GFX_MASK) == 0)
235 pwr_cnt = inl(dev_priv->ospm_base + PSB_PM_SSC);
236 pwr_cnt &= ~CDV_PWRGT_DISPLAY_CNTR;
237 outl(pwr_cnt, dev_priv->ospm_base + PSB_PM_SSC);
238 for (i = 0; i < 5; i++) {
239 u32 pwr_sts = inl(dev_priv->ospm_base + PSB_PM_SSS);
240 if ((pwr_sts & CDV_PWRGT_DISPLAY_STS) == 0)
247 * cdv_save_display_registers - save registers lost on suspend
248 * @dev: our DRM device
250 * Save the state we need in order to be able to restore the interface
251 * upon resume from suspend
255 static int cdv_save_display_registers(struct drm_device *dev)
261 * cdv_restore_display_registers - restore lost register state
262 * @dev: our DRM device
264 * Restore register state that was lost during suspend and resume.
268 static int cdv_restore_display_registers(struct drm_device *dev)
273 static int cdv_power_down(struct drm_device *dev)
278 static int cdv_power_up(struct drm_device *dev)
283 /* FIXME ? - shared with Poulsbo */
284 static void cdv_get_core_freq(struct drm_device *dev)
287 struct pci_dev *pci_root = pci_get_bus_and_slot(0, 0);
288 struct drm_psb_private *dev_priv = dev->dev_private;
290 pci_write_config_dword(pci_root, 0xD0, 0xD0050300);
291 pci_read_config_dword(pci_root, 0xD4, &clock);
292 pci_dev_put(pci_root);
294 switch (clock & 0x07) {
296 dev_priv->core_freq = 100;
299 dev_priv->core_freq = 133;
302 dev_priv->core_freq = 150;
305 dev_priv->core_freq = 178;
308 dev_priv->core_freq = 200;
313 dev_priv->core_freq = 266;
315 dev_priv->core_freq = 0;
319 static int cdv_chip_setup(struct drm_device *dev)
321 cdv_get_core_freq(dev);
322 gma_intel_opregion_init(dev);
323 psb_intel_init_bios(dev);
324 REG_WRITE(PORT_HOTPLUG_EN, 0);
325 REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT));
329 /* CDV is much like Poulsbo but has MID like SGX offsets and PM */
331 const struct psb_ops cdv_chip_ops = {
332 .name = "GMA3600/3650",
336 .sgx_offset = MRST_SGX_OFFSET,
337 .chip_setup = cdv_chip_setup,
339 .crtc_helper = &cdv_intel_helper_funcs,
340 .crtc_funcs = &cdv_intel_crtc_funcs,
342 .output_init = cdv_output_init,
344 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
345 .backlight_init = cdv_backlight_init,
348 .init_pm = cdv_init_pm,
349 .save_regs = cdv_save_display_registers,
350 .restore_regs = cdv_restore_display_registers,
351 .power_down = cdv_power_down,
352 .power_up = cdv_power_up,