2 * Copyright (c) 2007, Intel Corporation.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 * Authors: Thomas Hellstrom <thomas-at-tungstengraphics.com>
19 * Alan Cox <alan@linux.intel.com>
23 #include <linux/shmem_fs.h>
28 * GTT resource allocator - manage page mappings in GTT space
32 * psb_gtt_mask_pte - generate GTT pte entry
33 * @pfn: page number to encode
34 * @type: type of memory in the GTT
36 * Set the GTT entry for the appropriate memory type.
38 static inline uint32_t psb_gtt_mask_pte(uint32_t pfn, int type)
40 uint32_t mask = PSB_PTE_VALID;
42 if (type & PSB_MMU_CACHED_MEMORY)
43 mask |= PSB_PTE_CACHED;
44 if (type & PSB_MMU_RO_MEMORY)
46 if (type & PSB_MMU_WO_MEMORY)
49 return (pfn << PAGE_SHIFT) | mask;
53 * psb_gtt_entry - find the GTT entries for a gtt_range
54 * @dev: our DRM device
57 * Given a gtt_range object return the GTT offset of the page table
58 * entries for this gtt_range
60 u32 *psb_gtt_entry(struct drm_device *dev, struct gtt_range *r)
62 struct drm_psb_private *dev_priv = dev->dev_private;
65 offset = r->resource.start - dev_priv->gtt_mem->start;
67 return dev_priv->gtt_map + (offset >> PAGE_SHIFT);
71 * psb_gtt_insert - put an object into the GTT
72 * @dev: our DRM device
75 * Take our preallocated GTT range and insert the GEM object into
76 * the GTT. This is protected via the gtt mutex which the caller
79 static int psb_gtt_insert(struct drm_device *dev, struct gtt_range *r)
85 if (r->pages == NULL) {
90 WARN_ON(r->stolen); /* refcount these maybe ? */
92 gtt_slot = psb_gtt_entry(dev, r);
95 /* Make sure changes are visible to the GPU */
96 set_pages_array_uc(pages, r->npage);
98 /* Write our page entries into the GTT itself */
99 for (i = r->roll; i < r->npage; i++) {
100 pte = psb_gtt_mask_pte(page_to_pfn(r->pages[i]), 0);
101 iowrite32(pte, gtt_slot++);
103 for (i = 0; i < r->roll; i++) {
104 pte = psb_gtt_mask_pte(page_to_pfn(r->pages[i]), 0);
105 iowrite32(pte, gtt_slot++);
107 /* Make sure all the entries are set before we return */
108 ioread32(gtt_slot - 1);
114 * psb_gtt_remove - remove an object from the GTT
115 * @dev: our DRM device
118 * Remove a preallocated GTT range from the GTT. Overwrite all the
119 * page table entries with the dummy page. This is protected via the gtt
120 * mutex which the caller must hold.
122 static void psb_gtt_remove(struct drm_device *dev, struct gtt_range *r)
124 struct drm_psb_private *dev_priv = dev->dev_private;
130 gtt_slot = psb_gtt_entry(dev, r);
131 pte = psb_gtt_mask_pte(page_to_pfn(dev_priv->scratch_page), 0);
133 for (i = 0; i < r->npage; i++)
134 iowrite32(pte, gtt_slot++);
135 ioread32(gtt_slot - 1);
136 set_pages_array_wb(r->pages, r->npage);
140 * psb_gtt_roll - set scrolling position
141 * @dev: our DRM device
142 * @r: the gtt mapping we are using
145 * Roll an existing pinned mapping by moving the pages through the GTT.
146 * This allows us to implement hardware scrolling on the consoles without
149 void psb_gtt_roll(struct drm_device *dev, struct gtt_range *r, int roll)
154 if (roll >= r->npage) {
161 /* Not currently in the GTT - no worry we will write the mapping at
162 the right position when it gets pinned */
163 if (!r->stolen && !r->in_gart)
166 gtt_slot = psb_gtt_entry(dev, r);
168 for (i = r->roll; i < r->npage; i++) {
169 pte = psb_gtt_mask_pte(page_to_pfn(r->pages[i]), 0);
170 iowrite32(pte, gtt_slot++);
172 for (i = 0; i < r->roll; i++) {
173 pte = psb_gtt_mask_pte(page_to_pfn(r->pages[i]), 0);
174 iowrite32(pte, gtt_slot++);
176 ioread32(gtt_slot - 1);
180 * psb_gtt_attach_pages - attach and pin GEM pages
183 * Pin and build an in kernel list of the pages that back our GEM object.
184 * While we hold this the pages cannot be swapped out. This is protected
185 * via the gtt mutex which the caller must hold.
187 static int psb_gtt_attach_pages(struct gtt_range *gt)
190 struct address_space *mapping;
193 int pages = gt->gem.size / PAGE_SIZE;
197 /* This is the shared memory object that backs the GEM resource */
198 inode = gt->gem.filp->f_path.dentry->d_inode;
199 mapping = inode->i_mapping;
201 gt->pages = kmalloc(pages * sizeof(struct page *), GFP_KERNEL);
202 if (gt->pages == NULL)
206 for (i = 0; i < pages; i++) {
207 p = shmem_read_mapping_page(mapping, i);
216 page_cache_release(gt->pages[i]);
223 * psb_gtt_detach_pages - attach and pin GEM pages
226 * Undo the effect of psb_gtt_attach_pages. At this point the pages
227 * must have been removed from the GTT as they could now be paged out
228 * and move bus address. This is protected via the gtt mutex which the
231 static void psb_gtt_detach_pages(struct gtt_range *gt)
234 for (i = 0; i < gt->npage; i++) {
235 /* FIXME: do we need to force dirty */
236 set_page_dirty(gt->pages[i]);
237 page_cache_release(gt->pages[i]);
244 * psb_gtt_pin - pin pages into the GTT
247 * Pin a set of pages into the GTT. The pins are refcounted so that
248 * multiple pins need multiple unpins to undo.
250 * Non GEM backed objects treat this as a no-op as they are always GTT
253 int psb_gtt_pin(struct gtt_range *gt)
256 struct drm_device *dev = gt->gem.dev;
257 struct drm_psb_private *dev_priv = dev->dev_private;
259 mutex_lock(&dev_priv->gtt_mutex);
261 if (gt->in_gart == 0 && gt->stolen == 0) {
262 ret = psb_gtt_attach_pages(gt);
265 ret = psb_gtt_insert(dev, gt);
267 psb_gtt_detach_pages(gt);
273 mutex_unlock(&dev_priv->gtt_mutex);
278 * psb_gtt_unpin - Drop a GTT pin requirement
281 * Undoes the effect of psb_gtt_pin. On the last drop the GEM object
282 * will be removed from the GTT which will also drop the page references
283 * and allow the VM to clean up or page stuff.
285 * Non GEM backed objects treat this as a no-op as they are always GTT
288 void psb_gtt_unpin(struct gtt_range *gt)
290 struct drm_device *dev = gt->gem.dev;
291 struct drm_psb_private *dev_priv = dev->dev_private;
293 mutex_lock(&dev_priv->gtt_mutex);
295 WARN_ON(!gt->in_gart);
298 if (gt->in_gart == 0 && gt->stolen == 0) {
299 psb_gtt_remove(dev, gt);
300 psb_gtt_detach_pages(gt);
302 mutex_unlock(&dev_priv->gtt_mutex);
306 * GTT resource allocator - allocate and manage GTT address space
310 * psb_gtt_alloc_range - allocate GTT address space
311 * @dev: Our DRM device
312 * @len: length (bytes) of address space required
313 * @name: resource name
314 * @backed: resource should be backed by stolen pages
316 * Ask the kernel core to find us a suitable range of addresses
317 * to use for a GTT mapping.
319 * Returns a gtt_range structure describing the object, or NULL on
320 * error. On successful return the resource is both allocated and marked
323 struct gtt_range *psb_gtt_alloc_range(struct drm_device *dev, int len,
324 const char *name, int backed)
326 struct drm_psb_private *dev_priv = dev->dev_private;
327 struct gtt_range *gt;
328 struct resource *r = dev_priv->gtt_mem;
330 unsigned long start, end;
333 /* The start of the GTT is the stolen pages */
335 end = r->start + dev_priv->gtt.stolen_size - 1;
337 /* The rest we will use for GEM backed objects */
338 start = r->start + dev_priv->gtt.stolen_size;
342 gt = kzalloc(sizeof(struct gtt_range), GFP_KERNEL);
345 gt->resource.name = name;
347 gt->in_gart = backed;
349 /* Ensure this is set for non GEM objects */
351 ret = allocate_resource(dev_priv->gtt_mem, >->resource,
352 len, start, end, PAGE_SIZE, NULL, NULL);
354 gt->offset = gt->resource.start - r->start;
362 * psb_gtt_free_range - release GTT address space
363 * @dev: our DRM device
364 * @gt: a mapping created with psb_gtt_alloc_range
366 * Release a resource that was allocated with psb_gtt_alloc_range. If the
367 * object has been pinned by mmap users we clean this up here currently.
369 void psb_gtt_free_range(struct drm_device *dev, struct gtt_range *gt)
371 /* Undo the mmap pin if we are destroying the object */
376 WARN_ON(gt->in_gart && !gt->stolen);
377 release_resource(>->resource);
381 void psb_gtt_alloc(struct drm_device *dev)
383 struct drm_psb_private *dev_priv = dev->dev_private;
384 init_rwsem(&dev_priv->gtt.sem);
387 void psb_gtt_takedown(struct drm_device *dev)
389 struct drm_psb_private *dev_priv = dev->dev_private;
391 if (dev_priv->gtt_map) {
392 iounmap(dev_priv->gtt_map);
393 dev_priv->gtt_map = NULL;
395 if (dev_priv->gtt_initialized) {
396 pci_write_config_word(dev->pdev, PSB_GMCH_CTRL,
397 dev_priv->gmch_ctrl);
398 PSB_WVDC32(dev_priv->pge_ctl, PSB_PGETBL_CTL);
399 (void) PSB_RVDC32(PSB_PGETBL_CTL);
401 if (dev_priv->vram_addr)
402 iounmap(dev_priv->gtt_map);
405 int psb_gtt_init(struct drm_device *dev, int resume)
407 struct drm_psb_private *dev_priv = dev->dev_private;
409 unsigned long stolen_size, vram_stolen_size;
410 unsigned i, num_pages;
413 uint32_t dvmt_mode = 0;
419 mutex_init(&dev_priv->gtt_mutex);
425 pci_read_config_word(dev->pdev, PSB_GMCH_CTRL, &dev_priv->gmch_ctrl);
426 pci_write_config_word(dev->pdev, PSB_GMCH_CTRL,
427 dev_priv->gmch_ctrl | _PSB_GMCH_ENABLED);
429 dev_priv->pge_ctl = PSB_RVDC32(PSB_PGETBL_CTL);
430 PSB_WVDC32(dev_priv->pge_ctl | _PSB_PGETBL_ENABLED, PSB_PGETBL_CTL);
431 (void) PSB_RVDC32(PSB_PGETBL_CTL);
433 /* The root resource we allocate address space from */
434 dev_priv->gtt_initialized = 1;
436 pg->gtt_phys_start = dev_priv->pge_ctl & PAGE_MASK;
439 * The video mmu has a hw bug when accessing 0x0D0000000.
440 * Make gatt start at 0x0e000,0000. This doesn't actually
441 * matter for us but may do if the video acceleration ever
444 pg->mmu_gatt_start = 0xE0000000;
446 pg->gtt_start = pci_resource_start(dev->pdev, PSB_GTT_RESOURCE);
447 gtt_pages = pci_resource_len(dev->pdev, PSB_GTT_RESOURCE)
449 /* Some CDV firmware doesn't report this currently. In which case the
450 system has 64 gtt pages */
451 if (pg->gtt_start == 0 || gtt_pages == 0) {
452 dev_err(dev->dev, "GTT PCI BAR not initialized.\n");
454 pg->gtt_start = dev_priv->pge_ctl;
457 pg->gatt_start = pci_resource_start(dev->pdev, PSB_GATT_RESOURCE);
458 pg->gatt_pages = pci_resource_len(dev->pdev, PSB_GATT_RESOURCE)
460 dev_priv->gtt_mem = &dev->pdev->resource[PSB_GATT_RESOURCE];
462 if (pg->gatt_pages == 0 || pg->gatt_start == 0) {
463 static struct resource fudge; /* Preferably peppermint */
464 /* This can occur on CDV SDV systems. Fudge it in this case.
465 We really don't care what imaginary space is being allocated
467 dev_err(dev->dev, "GATT PCI BAR not initialized.\n");
468 pg->gatt_start = 0x40000000;
469 pg->gatt_pages = (128 * 1024 * 1024) >> PAGE_SHIFT;
470 /* This is a little confusing but in fact the GTT is providing
471 a view from the GPU into memory and not vice versa. As such
472 this is really allocating space that is not the same as the
473 CPU address space on CDV */
474 fudge.start = 0x40000000;
475 fudge.end = 0x40000000 + 128 * 1024 * 1024 - 1;
476 fudge.name = "fudge";
477 fudge.flags = IORESOURCE_MEM;
478 dev_priv->gtt_mem = &fudge;
481 pci_read_config_dword(dev->pdev, PSB_BSM, &dev_priv->stolen_base);
482 vram_stolen_size = pg->gtt_phys_start - dev_priv->stolen_base
485 stolen_size = vram_stolen_size;
487 printk(KERN_INFO "Stolen memory information\n");
488 printk(KERN_INFO " base in RAM: 0x%x\n", dev_priv->stolen_base);
489 printk(KERN_INFO " size: %luK, calculated by (GTT RAM base) - (Stolen base), seems wrong\n",
490 vram_stolen_size/1024);
491 dvmt_mode = (dev_priv->gmch_ctrl >> 4) & 0x7;
492 printk(KERN_INFO " the correct size should be: %dM(dvmt mode=%d)\n",
493 (dvmt_mode == 1) ? 1 : (2 << (dvmt_mode - 1)), dvmt_mode);
495 if (resume && (gtt_pages != pg->gtt_pages) &&
496 (stolen_size != pg->stolen_size)) {
497 dev_err(dev->dev, "GTT resume error.\n");
502 pg->gtt_pages = gtt_pages;
503 pg->stolen_size = stolen_size;
504 dev_priv->vram_stolen_size = vram_stolen_size;
507 * Map the GTT and the stolen memory area
509 dev_priv->gtt_map = ioremap_nocache(pg->gtt_phys_start,
510 gtt_pages << PAGE_SHIFT);
511 if (!dev_priv->gtt_map) {
512 dev_err(dev->dev, "Failure to map gtt.\n");
517 dev_priv->vram_addr = ioremap_wc(dev_priv->stolen_base, stolen_size);
518 if (!dev_priv->vram_addr) {
519 dev_err(dev->dev, "Failure to map stolen base.\n");
525 * Insert vram stolen pages into the GTT
528 pfn_base = dev_priv->stolen_base >> PAGE_SHIFT;
529 vram_pages = num_pages = vram_stolen_size >> PAGE_SHIFT;
530 printk(KERN_INFO"Set up %d stolen pages starting at 0x%08x, GTT offset %dK\n",
531 num_pages, pfn_base << PAGE_SHIFT, 0);
532 for (i = 0; i < num_pages; ++i) {
533 pte = psb_gtt_mask_pte(pfn_base + i, 0);
534 iowrite32(pte, dev_priv->gtt_map + i);
538 * Init rest of GTT to the scratch page to avoid accidents or scribbles
541 pfn_base = page_to_pfn(dev_priv->scratch_page);
542 pte = psb_gtt_mask_pte(pfn_base, 0);
543 for (; i < gtt_pages; ++i)
544 iowrite32(pte, dev_priv->gtt_map + i);
546 (void) ioread32(dev_priv->gtt_map + i - 1);
550 psb_gtt_takedown(dev);