drivers/gpu/drm/i915/gvt/kvmgt.c

   1 /*
   2  * KVMGT - the implementation of Intel mediated pass-through framework for KVM
   3  *
   4  * Copyright(c) 2014-2016 Intel Corporation. All rights reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Kevin Tian <kevin.tian@intel.com>
  27  *    Jike Song <jike.song@intel.com>
  28  *    Xiaoguang Chen <xiaoguang.chen@intel.com>
  29  */
  30
  31 #include <linux/init.h>
  32 #include <linux/device.h>
  33 #include <linux/mm.h>
  34 #include <linux/mmu_context.h>
  35 #include <linux/types.h>
  36 #include <linux/list.h>
  37 #include <linux/rbtree.h>
  38 #include <linux/spinlock.h>
  39 #include <linux/eventfd.h>
  40 #include <linux/uuid.h>
  41 #include <linux/kvm_host.h>
  42 #include <linux/vfio.h>
  43 #include <linux/mdev.h>
  44
  45 #include "i915_drv.h"
  46 #include "gvt.h"
  47
  48 static const struct intel_gvt_ops *intel_gvt_ops;
  49
  50 /* helper macros copied from vfio-pci */
  51 #define VFIO_PCI_OFFSET_SHIFT   40
  52 #define VFIO_PCI_OFFSET_TO_INDEX(off)   (off >> VFIO_PCI_OFFSET_SHIFT)
  53 #define VFIO_PCI_INDEX_TO_OFFSET(index) ((u64)(index) << VFIO_PCI_OFFSET_SHIFT)
  54 #define VFIO_PCI_OFFSET_MASK    (((u64)(1) << VFIO_PCI_OFFSET_SHIFT) - 1)
  55
  56 struct vfio_region {
  57         u32                             type;
  58         u32                             subtype;
  59         size_t                          size;
  60         u32                             flags;
  61 };
  62
  63 struct kvmgt_pgfn {
  64         gfn_t gfn;
  65         struct hlist_node hnode;
  66 };
  67
  68 struct kvmgt_guest_info {
  69         struct kvm *kvm;
  70         struct intel_vgpu *vgpu;
  71         struct kvm_page_track_notifier_node track_node;
  72 #define NR_BKT (1 << 18)
  73         struct hlist_head ptable[NR_BKT];
  74 #undef NR_BKT
  75 };
  76
  77 struct gvt_dma {
  78         struct rb_node node;
  79         gfn_t gfn;
  80         unsigned long iova;
  81 };
  82
  83 static inline bool handle_valid(unsigned long handle)
  84 {
  85         return !!(handle & ~0xff);
  86 }
  87
  88 static int kvmgt_guest_init(struct mdev_device *mdev);
  89 static void intel_vgpu_release_work(struct work_struct *work);
  90 static bool kvmgt_guest_exit(struct kvmgt_guest_info *info);
  91
  92 static int gvt_dma_map_iova(struct intel_vgpu *vgpu, kvm_pfn_t pfn,
  93                 unsigned long *iova)
  94 {
  95         struct page *page;
  96         struct device *dev = &vgpu->gvt->dev_priv->drm.pdev->dev;
  97         dma_addr_t daddr;
  98
  99         if (unlikely(!pfn_valid(pfn)))
 100                 return -EFAULT;
 101
 102         page = pfn_to_page(pfn);
 103         daddr = dma_map_page(dev, page, 0, PAGE_SIZE,
 104                         PCI_DMA_BIDIRECTIONAL);
 105         if (dma_mapping_error(dev, daddr))
 106                 return -ENOMEM;
 107
 108         *iova = (unsigned long)(daddr >> PAGE_SHIFT);
 109         return 0;
 110 }
 111
 112 static void gvt_dma_unmap_iova(struct intel_vgpu *vgpu, unsigned long iova)
 113 {
 114         struct device *dev = &vgpu->gvt->dev_priv->drm.pdev->dev;
 115         dma_addr_t daddr;
 116
 117         daddr = (dma_addr_t)(iova << PAGE_SHIFT);
 118         dma_unmap_page(dev, daddr, PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
 119 }
 120
 121 static struct gvt_dma *__gvt_cache_find(struct intel_vgpu *vgpu, gfn_t gfn)
 122 {
 123         struct rb_node *node = vgpu->vdev.cache.rb_node;
 124         struct gvt_dma *ret = NULL;
 125
 126         while (node) {
 127                 struct gvt_dma *itr = rb_entry(node, struct gvt_dma, node);
 128
 129                 if (gfn < itr->gfn)
 130                         node = node->rb_left;
 131                 else if (gfn > itr->gfn)
 132                         node = node->rb_right;
 133                 else {
 134                         ret = itr;
 135                         goto out;
 136                 }
 137         }
 138
 139 out:
 140         return ret;
 141 }
 142
 143 static unsigned long gvt_cache_find(struct intel_vgpu *vgpu, gfn_t gfn)
 144 {
 145         struct gvt_dma *entry;
 146         unsigned long iova;
 147
 148         mutex_lock(&vgpu->vdev.cache_lock);
 149
 150         entry = __gvt_cache_find(vgpu, gfn);
 151         iova = (entry == NULL) ? INTEL_GVT_INVALID_ADDR : entry->iova;
 152
 153         mutex_unlock(&vgpu->vdev.cache_lock);
 154         return iova;
 155 }
 156
 157 static void gvt_cache_add(struct intel_vgpu *vgpu, gfn_t gfn,
 158                 unsigned long iova)
 159 {
 160         struct gvt_dma *new, *itr;
 161         struct rb_node **link = &vgpu->vdev.cache.rb_node, *parent = NULL;
 162
 163         new = kzalloc(sizeof(struct gvt_dma), GFP_KERNEL);
 164         if (!new)
 165                 return;
 166
 167         new->gfn = gfn;
 168         new->iova = iova;
 169
 170         mutex_lock(&vgpu->vdev.cache_lock);
 171         while (*link) {
 172                 parent = *link;
 173                 itr = rb_entry(parent, struct gvt_dma, node);
 174
 175                 if (gfn == itr->gfn)
 176                         goto out;
 177                 else if (gfn < itr->gfn)
 178                         link = &parent->rb_left;
 179                 else
 180                         link = &parent->rb_right;
 181         }
 182
 183         rb_link_node(&new->node, parent, link);
 184         rb_insert_color(&new->node, &vgpu->vdev.cache);
 185         mutex_unlock(&vgpu->vdev.cache_lock);
 186         return;
 187
 188 out:
 189         mutex_unlock(&vgpu->vdev.cache_lock);
 190         kfree(new);
 191 }
 192
 193 static void __gvt_cache_remove_entry(struct intel_vgpu *vgpu,
 194                                 struct gvt_dma *entry)
 195 {
 196         rb_erase(&entry->node, &vgpu->vdev.cache);
 197         kfree(entry);
 198 }
 199
 200 static void gvt_cache_remove(struct intel_vgpu *vgpu, gfn_t gfn)
 201 {
 202         struct device *dev = mdev_dev(vgpu->vdev.mdev);
 203         struct gvt_dma *this;
 204         unsigned long g1;
 205         int rc;
 206
 207         mutex_lock(&vgpu->vdev.cache_lock);
 208         this  = __gvt_cache_find(vgpu, gfn);
 209         if (!this) {
 210                 mutex_unlock(&vgpu->vdev.cache_lock);
 211                 return;
 212         }
 213
 214         g1 = gfn;
 215         gvt_dma_unmap_iova(vgpu, this->iova);
 216         rc = vfio_unpin_pages(dev, &g1, 1);
 217         WARN_ON(rc != 1);
 218         __gvt_cache_remove_entry(vgpu, this);
 219         mutex_unlock(&vgpu->vdev.cache_lock);
 220 }
 221
 222 static void gvt_cache_init(struct intel_vgpu *vgpu)
 223 {
 224         vgpu->vdev.cache = RB_ROOT;
 225         mutex_init(&vgpu->vdev.cache_lock);
 226 }
 227
 228 static void gvt_cache_destroy(struct intel_vgpu *vgpu)
 229 {
 230         struct gvt_dma *dma;
 231         struct rb_node *node = NULL;
 232         struct device *dev = mdev_dev(vgpu->vdev.mdev);
 233         unsigned long gfn;
 234
 235         mutex_lock(&vgpu->vdev.cache_lock);
 236         while ((node = rb_first(&vgpu->vdev.cache))) {
 237                 dma = rb_entry(node, struct gvt_dma, node);
 238                 gvt_dma_unmap_iova(vgpu, dma->iova);
 239                 gfn = dma->gfn;
 240
 241                 vfio_unpin_pages(dev, &gfn, 1);
 242                 __gvt_cache_remove_entry(vgpu, dma);
 243         }
 244         mutex_unlock(&vgpu->vdev.cache_lock);
 245 }
 246
 247 static struct intel_vgpu_type *intel_gvt_find_vgpu_type(struct intel_gvt *gvt,
 248                 const char *name)
 249 {
 250         int i;
 251         struct intel_vgpu_type *t;
 252         const char *driver_name = dev_driver_string(
 253                         &gvt->dev_priv->drm.pdev->dev);
 254
 255         for (i = 0; i < gvt->num_types; i++) {
 256                 t = &gvt->types[i];
 257                 if (!strncmp(t->name, name + strlen(driver_name) + 1,
 258                         sizeof(t->name)))
 259                         return t;
 260         }
 261
 262         return NULL;
 263 }
 264
 265 static ssize_t available_instances_show(struct kobject *kobj,
 266                                         struct device *dev, char *buf)
 267 {
 268         struct intel_vgpu_type *type;
 269         unsigned int num = 0;
 270         void *gvt = kdev_to_i915(dev)->gvt;
 271
 272         type = intel_gvt_find_vgpu_type(gvt, kobject_name(kobj));
 273         if (!type)
 274                 num = 0;
 275         else
 276                 num = type->avail_instance;
 277
 278         return sprintf(buf, "%u\n", num);
 279 }
 280
 281 static ssize_t device_api_show(struct kobject *kobj, struct device *dev,
 282                 char *buf)
 283 {
 284         return sprintf(buf, "%s\n", VFIO_DEVICE_API_PCI_STRING);
 285 }
 286
 287 static ssize_t description_show(struct kobject *kobj, struct device *dev,
 288                 char *buf)
 289 {
 290         struct intel_vgpu_type *type;
 291         void *gvt = kdev_to_i915(dev)->gvt;
 292
 293         type = intel_gvt_find_vgpu_type(gvt, kobject_name(kobj));
 294         if (!type)
 295                 return 0;
 296
 297         return sprintf(buf, "low_gm_size: %dMB\nhigh_gm_size: %dMB\n"
 298                        "fence: %d\nresolution: %s\n"
 299                        "weight: %d\n",
 300                        BYTES_TO_MB(type->low_gm_size),
 301                        BYTES_TO_MB(type->high_gm_size),
 302                        type->fence, vgpu_edid_str(type->resolution),
 303                        type->weight);
 304 }
 305
 306 static MDEV_TYPE_ATTR_RO(available_instances);
 307 static MDEV_TYPE_ATTR_RO(device_api);
 308 static MDEV_TYPE_ATTR_RO(description);
 309
 310 static struct attribute *type_attrs[] = {
 311         &mdev_type_attr_available_instances.attr,
 312         &mdev_type_attr_device_api.attr,
 313         &mdev_type_attr_description.attr,
 314         NULL,
 315 };
 316
 317 static struct attribute_group *intel_vgpu_type_groups[] = {
 318         [0 ... NR_MAX_INTEL_VGPU_TYPES - 1] = NULL,
 319 };
 320
 321 static bool intel_gvt_init_vgpu_type_groups(struct intel_gvt *gvt)
 322 {
 323         int i, j;
 324         struct intel_vgpu_type *type;
 325         struct attribute_group *group;
 326
 327         for (i = 0; i < gvt->num_types; i++) {
 328                 type = &gvt->types[i];
 329
 330                 group = kzalloc(sizeof(struct attribute_group), GFP_KERNEL);
 331                 if (WARN_ON(!group))
 332                         goto unwind;
 333
 334                 group->name = type->name;
 335                 group->attrs = type_attrs;
 336                 intel_vgpu_type_groups[i] = group;
 337         }
 338
 339         return true;
 340
 341 unwind:
 342         for (j = 0; j < i; j++) {
 343                 group = intel_vgpu_type_groups[j];
 344                 kfree(group);
 345         }
 346
 347         return false;
 348 }
 349
 350 static void intel_gvt_cleanup_vgpu_type_groups(struct intel_gvt *gvt)
 351 {
 352         int i;
 353         struct attribute_group *group;
 354
 355         for (i = 0; i < gvt->num_types; i++) {
 356                 group = intel_vgpu_type_groups[i];
 357                 kfree(group);
 358         }
 359 }
 360
 361 static void kvmgt_protect_table_init(struct kvmgt_guest_info *info)
 362 {
 363         hash_init(info->ptable);
 364 }
 365
 366 static void kvmgt_protect_table_destroy(struct kvmgt_guest_info *info)
 367 {
 368         struct kvmgt_pgfn *p;
 369         struct hlist_node *tmp;
 370         int i;
 371
 372         hash_for_each_safe(info->ptable, i, tmp, p, hnode) {
 373                 hash_del(&p->hnode);
 374                 kfree(p);
 375         }
 376 }
 377
 378 static struct kvmgt_pgfn *
 379 __kvmgt_protect_table_find(struct kvmgt_guest_info *info, gfn_t gfn)
 380 {
 381         struct kvmgt_pgfn *p, *res = NULL;
 382
 383         hash_for_each_possible(info->ptable, p, hnode, gfn) {
 384                 if (gfn == p->gfn) {
 385                         res = p;
 386                         break;
 387                 }
 388         }
 389
 390         return res;
 391 }
 392
 393 static bool kvmgt_gfn_is_write_protected(struct kvmgt_guest_info *info,
 394                                 gfn_t gfn)
 395 {
 396         struct kvmgt_pgfn *p;
 397
 398         p = __kvmgt_protect_table_find(info, gfn);
 399         return !!p;
 400 }
 401
 402 static void kvmgt_protect_table_add(struct kvmgt_guest_info *info, gfn_t gfn)
 403 {
 404         struct kvmgt_pgfn *p;
 405
 406         if (kvmgt_gfn_is_write_protected(info, gfn))
 407                 return;
 408
 409         p = kzalloc(sizeof(struct kvmgt_pgfn), GFP_ATOMIC);
 410         if (WARN(!p, "gfn: 0x%llx\n", gfn))
 411                 return;
 412
 413         p->gfn = gfn;
 414         hash_add(info->ptable, &p->hnode, gfn);
 415 }
 416
 417 static void kvmgt_protect_table_del(struct kvmgt_guest_info *info,
 418                                 gfn_t gfn)
 419 {
 420         struct kvmgt_pgfn *p;
 421
 422         p = __kvmgt_protect_table_find(info, gfn);
 423         if (p) {
 424                 hash_del(&p->hnode);
 425                 kfree(p);
 426         }
 427 }
 428
 429 static int intel_vgpu_create(struct kobject *kobj, struct mdev_device *mdev)
 430 {
 431         struct intel_vgpu *vgpu = NULL;
 432         struct intel_vgpu_type *type;
 433         struct device *pdev;
 434         void *gvt;
 435         int ret;
 436
 437         pdev = mdev_parent_dev(mdev);
 438         gvt = kdev_to_i915(pdev)->gvt;
 439
 440         type = intel_gvt_find_vgpu_type(gvt, kobject_name(kobj));
 441         if (!type) {
 442                 gvt_vgpu_err("failed to find type %s to create\n",
 443                                                 kobject_name(kobj));
 444                 ret = -EINVAL;
 445                 goto out;
 446         }
 447
 448         vgpu = intel_gvt_ops->vgpu_create(gvt, type);
 449         if (IS_ERR_OR_NULL(vgpu)) {
 450                 ret = vgpu == NULL ? -EFAULT : PTR_ERR(vgpu);
 451                 gvt_vgpu_err("failed to create intel vgpu: %d\n", ret);
 452                 goto out;
 453         }
 454
 455         INIT_WORK(&vgpu->vdev.release_work, intel_vgpu_release_work);
 456
 457         vgpu->vdev.mdev = mdev;
 458         mdev_set_drvdata(mdev, vgpu);
 459
 460         gvt_dbg_core("intel_vgpu_create succeeded for mdev: %s\n",
 461                      dev_name(mdev_dev(mdev)));
 462         ret = 0;
 463
 464 out:
 465         return ret;
 466 }
 467
 468 static int intel_vgpu_remove(struct mdev_device *mdev)
 469 {
 470         struct intel_vgpu *vgpu = mdev_get_drvdata(mdev);
 471
 472         if (handle_valid(vgpu->handle))
 473                 return -EBUSY;
 474
 475         intel_gvt_ops->vgpu_destroy(vgpu);
 476         return 0;
 477 }
 478
 479 static int intel_vgpu_iommu_notifier(struct notifier_block *nb,
 480                                      unsigned long action, void *data)
 481 {
 482         struct intel_vgpu *vgpu = container_of(nb,
 483                                         struct intel_vgpu,
 484                                         vdev.iommu_notifier);
 485
 486         if (action == VFIO_IOMMU_NOTIFY_DMA_UNMAP) {
 487                 struct vfio_iommu_type1_dma_unmap *unmap = data;
 488                 unsigned long gfn, end_gfn;
 489
 490                 gfn = unmap->iova >> PAGE_SHIFT;
 491                 end_gfn = gfn + unmap->size / PAGE_SIZE;
 492
 493                 while (gfn < end_gfn)
 494                         gvt_cache_remove(vgpu, gfn++);
 495         }
 496
 497         return NOTIFY_OK;
 498 }
 499
 500 static int intel_vgpu_group_notifier(struct notifier_block *nb,
 501                                      unsigned long action, void *data)
 502 {
 503         struct intel_vgpu *vgpu = container_of(nb,
 504                                         struct intel_vgpu,
 505                                         vdev.group_notifier);
 506
 507         /* the only action we care about */
 508         if (action == VFIO_GROUP_NOTIFY_SET_KVM) {
 509                 vgpu->vdev.kvm = data;
 510
 511                 if (!data)
 512                         schedule_work(&vgpu->vdev.release_work);
 513         }
 514
 515         return NOTIFY_OK;
 516 }
 517
 518 static int intel_vgpu_open(struct mdev_device *mdev)
 519 {
 520         struct intel_vgpu *vgpu = mdev_get_drvdata(mdev);
 521         unsigned long events;
 522         int ret;
 523
 524         vgpu->vdev.iommu_notifier.notifier_call = intel_vgpu_iommu_notifier;
 525         vgpu->vdev.group_notifier.notifier_call = intel_vgpu_group_notifier;
 526
 527         events = VFIO_IOMMU_NOTIFY_DMA_UNMAP;
 528         ret = vfio_register_notifier(mdev_dev(mdev), VFIO_IOMMU_NOTIFY, &events,
 529                                 &vgpu->vdev.iommu_notifier);
 530         if (ret != 0) {
 531                 gvt_vgpu_err("vfio_register_notifier for iommu failed: %d\n",
 532                         ret);
 533                 goto out;
 534         }
 535
 536         events = VFIO_GROUP_NOTIFY_SET_KVM;
 537         ret = vfio_register_notifier(mdev_dev(mdev), VFIO_GROUP_NOTIFY, &events,
 538                                 &vgpu->vdev.group_notifier);
 539         if (ret != 0) {
 540                 gvt_vgpu_err("vfio_register_notifier for group failed: %d\n",
 541                         ret);
 542                 goto undo_iommu;
 543         }
 544
 545         ret = kvmgt_guest_init(mdev);
 546         if (ret)
 547                 goto undo_group;
 548
 549         atomic_set(&vgpu->vdev.released, 0);
 550         return ret;
 551
 552 undo_group:
 553         vfio_unregister_notifier(mdev_dev(mdev), VFIO_GROUP_NOTIFY,
 554                                         &vgpu->vdev.group_notifier);
 555
 556 undo_iommu:
 557         vfio_unregister_notifier(mdev_dev(mdev), VFIO_IOMMU_NOTIFY,
 558                                         &vgpu->vdev.iommu_notifier);
 559 out:
 560         return ret;
 561 }
 562
 563 static void __intel_vgpu_release(struct intel_vgpu *vgpu)
 564 {
 565         struct kvmgt_guest_info *info;
 566         int ret;
 567
 568         if (!handle_valid(vgpu->handle))
 569                 return;
 570
 571         if (atomic_cmpxchg(&vgpu->vdev.released, 0, 1))
 572                 return;
 573
 574         ret = vfio_unregister_notifier(mdev_dev(vgpu->vdev.mdev), VFIO_IOMMU_NOTIFY,
 575                                         &vgpu->vdev.iommu_notifier);
 576         WARN(ret, "vfio_unregister_notifier for iommu failed: %d\n", ret);
 577
 578         ret = vfio_unregister_notifier(mdev_dev(vgpu->vdev.mdev), VFIO_GROUP_NOTIFY,
 579                                         &vgpu->vdev.group_notifier);
 580         WARN(ret, "vfio_unregister_notifier for group failed: %d\n", ret);
 581
 582         info = (struct kvmgt_guest_info *)vgpu->handle;
 583         kvmgt_guest_exit(info);
 584
 585         vgpu->vdev.kvm = NULL;
 586         vgpu->handle = 0;
 587 }
 588
 589 static void intel_vgpu_release(struct mdev_device *mdev)
 590 {
 591         struct intel_vgpu *vgpu = mdev_get_drvdata(mdev);
 592
 593         __intel_vgpu_release(vgpu);
 594 }
 595
 596 static void intel_vgpu_release_work(struct work_struct *work)
 597 {
 598         struct intel_vgpu *vgpu = container_of(work, struct intel_vgpu,
 599                                         vdev.release_work);
 600
 601         __intel_vgpu_release(vgpu);
 602 }
 603
 604 static uint64_t intel_vgpu_get_bar0_addr(struct intel_vgpu *vgpu)
 605 {
 606         u32 start_lo, start_hi;
 607         u32 mem_type;
 608         int pos = PCI_BASE_ADDRESS_0;
 609
 610         start_lo = (*(u32 *)(vgpu->cfg_space.virtual_cfg_space + pos)) &
 611                         PCI_BASE_ADDRESS_MEM_MASK;
 612         mem_type = (*(u32 *)(vgpu->cfg_space.virtual_cfg_space + pos)) &
 613                         PCI_BASE_ADDRESS_MEM_TYPE_MASK;
 614
 615         switch (mem_type) {
 616         case PCI_BASE_ADDRESS_MEM_TYPE_64:
 617                 start_hi = (*(u32 *)(vgpu->cfg_space.virtual_cfg_space
 618                                                 + pos + 4));
 619                 break;
 620         case PCI_BASE_ADDRESS_MEM_TYPE_32:
 621         case PCI_BASE_ADDRESS_MEM_TYPE_1M:
 622                 /* 1M mem BAR treated as 32-bit BAR */
 623         default:
 624                 /* mem unknown type treated as 32-bit BAR */
 625                 start_hi = 0;
 626                 break;
 627         }
 628
 629         return ((u64)start_hi << 32) | start_lo;
 630 }
 631
 632 static ssize_t intel_vgpu_rw(struct mdev_device *mdev, char *buf,
 633                         size_t count, loff_t *ppos, bool is_write)
 634 {
 635         struct intel_vgpu *vgpu = mdev_get_drvdata(mdev);
 636         unsigned int index = VFIO_PCI_OFFSET_TO_INDEX(*ppos);
 637         uint64_t pos = *ppos & VFIO_PCI_OFFSET_MASK;
 638         int ret = -EINVAL;
 639
 640
 641         if (index >= VFIO_PCI_NUM_REGIONS) {
 642                 gvt_vgpu_err("invalid index: %u\n", index);
 643                 return -EINVAL;
 644         }
 645
 646         switch (index) {
 647         case VFIO_PCI_CONFIG_REGION_INDEX:
 648                 if (is_write)
 649                         ret = intel_gvt_ops->emulate_cfg_write(vgpu, pos,
 650                                                 buf, count);
 651                 else
 652                         ret = intel_gvt_ops->emulate_cfg_read(vgpu, pos,
 653                                                 buf, count);
 654                 break;
 655         case VFIO_PCI_BAR0_REGION_INDEX:
 656         case VFIO_PCI_BAR1_REGION_INDEX:
 657                 if (is_write) {
 658                         uint64_t bar0_start = intel_vgpu_get_bar0_addr(vgpu);
 659
 660                         ret = intel_gvt_ops->emulate_mmio_write(vgpu,
 661                                                 bar0_start + pos, buf, count);
 662                 } else {
 663                         uint64_t bar0_start = intel_vgpu_get_bar0_addr(vgpu);
 664
 665                         ret = intel_gvt_ops->emulate_mmio_read(vgpu,
 666                                                 bar0_start + pos, buf, count);
 667                 }
 668                 break;
 669         case VFIO_PCI_BAR2_REGION_INDEX:
 670         case VFIO_PCI_BAR3_REGION_INDEX:
 671         case VFIO_PCI_BAR4_REGION_INDEX:
 672         case VFIO_PCI_BAR5_REGION_INDEX:
 673         case VFIO_PCI_VGA_REGION_INDEX:
 674         case VFIO_PCI_ROM_REGION_INDEX:
 675         default:
 676                 gvt_vgpu_err("unsupported region: %u\n", index);
 677         }
 678
 679         return ret == 0 ? count : ret;
 680 }
 681
 682 static ssize_t intel_vgpu_read(struct mdev_device *mdev, char __user *buf,
 683                         size_t count, loff_t *ppos)
 684 {
 685         unsigned int done = 0;
 686         int ret;
 687
 688         while (count) {
 689                 size_t filled;
 690
 691                 if (count >= 4 && !(*ppos % 4)) {
 692                         u32 val;
 693
 694                         ret = intel_vgpu_rw(mdev, (char *)&val, sizeof(val),
 695                                         ppos, false);
 696                         if (ret <= 0)
 697                                 goto read_err;
 698
 699                         if (copy_to_user(buf, &val, sizeof(val)))
 700                                 goto read_err;
 701
 702                         filled = 4;
 703                 } else if (count >= 2 && !(*ppos % 2)) {
 704                         u16 val;
 705
 706                         ret = intel_vgpu_rw(mdev, (char *)&val, sizeof(val),
 707                                         ppos, false);
 708                         if (ret <= 0)
 709                                 goto read_err;
 710
 711                         if (copy_to_user(buf, &val, sizeof(val)))
 712                                 goto read_err;
 713
 714                         filled = 2;
 715                 } else {
 716                         u8 val;
 717
 718                         ret = intel_vgpu_rw(mdev, &val, sizeof(val), ppos,
 719                                         false);
 720                         if (ret <= 0)
 721                                 goto read_err;
 722
 723                         if (copy_to_user(buf, &val, sizeof(val)))
 724                                 goto read_err;
 725
 726                         filled = 1;
 727                 }
 728
 729                 count -= filled;
 730                 done += filled;
 731                 *ppos += filled;
 732                 buf += filled;
 733         }
 734
 735         return done;
 736
 737 read_err:
 738         return -EFAULT;
 739 }
 740
 741 static ssize_t intel_vgpu_write(struct mdev_device *mdev,
 742                                 const char __user *buf,
 743                                 size_t count, loff_t *ppos)
 744 {
 745         unsigned int done = 0;
 746         int ret;
 747
 748         while (count) {
 749                 size_t filled;
 750
 751                 if (count >= 4 && !(*ppos % 4)) {
 752                         u32 val;
 753
 754                         if (copy_from_user(&val, buf, sizeof(val)))
 755                                 goto write_err;
 756
 757                         ret = intel_vgpu_rw(mdev, (char *)&val, sizeof(val),
 758                                         ppos, true);
 759                         if (ret <= 0)
 760                                 goto write_err;
 761
 762                         filled = 4;
 763                 } else if (count >= 2 && !(*ppos % 2)) {
 764                         u16 val;
 765
 766                         if (copy_from_user(&val, buf, sizeof(val)))
 767                                 goto write_err;
 768
 769                         ret = intel_vgpu_rw(mdev, (char *)&val,
 770                                         sizeof(val), ppos, true);
 771                         if (ret <= 0)
 772                                 goto write_err;
 773
 774                         filled = 2;
 775                 } else {
 776                         u8 val;
 777
 778                         if (copy_from_user(&val, buf, sizeof(val)))
 779                                 goto write_err;
 780
 781                         ret = intel_vgpu_rw(mdev, &val, sizeof(val),
 782                                         ppos, true);
 783                         if (ret <= 0)
 784                                 goto write_err;
 785
 786                         filled = 1;
 787                 }
 788
 789                 count -= filled;
 790                 done += filled;
 791                 *ppos += filled;
 792                 buf += filled;
 793         }
 794
 795         return done;
 796 write_err:
 797         return -EFAULT;
 798 }
 799
 800 static int intel_vgpu_mmap(struct mdev_device *mdev, struct vm_area_struct *vma)
 801 {
 802         unsigned int index;
 803         u64 virtaddr;
 804         unsigned long req_size, pgoff = 0;
 805         pgprot_t pg_prot;
 806         struct intel_vgpu *vgpu = mdev_get_drvdata(mdev);
 807
 808         index = vma->vm_pgoff >> (VFIO_PCI_OFFSET_SHIFT - PAGE_SHIFT);
 809         if (index >= VFIO_PCI_ROM_REGION_INDEX)
 810                 return -EINVAL;
 811
 812         if (vma->vm_end < vma->vm_start)
 813                 return -EINVAL;
 814         if ((vma->vm_flags & VM_SHARED) == 0)
 815                 return -EINVAL;
 816         if (index != VFIO_PCI_BAR2_REGION_INDEX)
 817                 return -EINVAL;
 818
 819         pg_prot = vma->vm_page_prot;
 820         virtaddr = vma->vm_start;
 821         req_size = vma->vm_end - vma->vm_start;
 822         pgoff = vgpu_aperture_pa_base(vgpu) >> PAGE_SHIFT;
 823
 824         return remap_pfn_range(vma, virtaddr, pgoff, req_size, pg_prot);
 825 }
 826
 827 static int intel_vgpu_get_irq_count(struct intel_vgpu *vgpu, int type)
 828 {
 829         if (type == VFIO_PCI_INTX_IRQ_INDEX || type == VFIO_PCI_MSI_IRQ_INDEX)
 830                 return 1;
 831
 832         return 0;
 833 }
 834
 835 static int intel_vgpu_set_intx_mask(struct intel_vgpu *vgpu,
 836                         unsigned int index, unsigned int start,
 837                         unsigned int count, uint32_t flags,
 838                         void *data)
 839 {
 840         return 0;
 841 }
 842
 843 static int intel_vgpu_set_intx_unmask(struct intel_vgpu *vgpu,
 844                         unsigned int index, unsigned int start,
 845                         unsigned int count, uint32_t flags, void *data)
 846 {
 847         return 0;
 848 }
 849
 850 static int intel_vgpu_set_intx_trigger(struct intel_vgpu *vgpu,
 851                 unsigned int index, unsigned int start, unsigned int count,
 852                 uint32_t flags, void *data)
 853 {
 854         return 0;
 855 }
 856
 857 static int intel_vgpu_set_msi_trigger(struct intel_vgpu *vgpu,
 858                 unsigned int index, unsigned int start, unsigned int count,
 859                 uint32_t flags, void *data)
 860 {
 861         struct eventfd_ctx *trigger;
 862
 863         if (flags & VFIO_IRQ_SET_DATA_EVENTFD) {
 864                 int fd = *(int *)data;
 865
 866                 trigger = eventfd_ctx_fdget(fd);
 867                 if (IS_ERR(trigger)) {
 868                         gvt_vgpu_err("eventfd_ctx_fdget failed\n");
 869                         return PTR_ERR(trigger);
 870                 }
 871                 vgpu->vdev.msi_trigger = trigger;
 872         }
 873
 874         return 0;
 875 }
 876
 877 static int intel_vgpu_set_irqs(struct intel_vgpu *vgpu, uint32_t flags,
 878                 unsigned int index, unsigned int start, unsigned int count,
 879                 void *data)
 880 {
 881         int (*func)(struct intel_vgpu *vgpu, unsigned int index,
 882                         unsigned int start, unsigned int count, uint32_t flags,
 883                         void *data) = NULL;
 884
 885         switch (index) {
 886         case VFIO_PCI_INTX_IRQ_INDEX:
 887                 switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
 888                 case VFIO_IRQ_SET_ACTION_MASK:
 889                         func = intel_vgpu_set_intx_mask;
 890                         break;
 891                 case VFIO_IRQ_SET_ACTION_UNMASK:
 892                         func = intel_vgpu_set_intx_unmask;
 893                         break;
 894                 case VFIO_IRQ_SET_ACTION_TRIGGER:
 895                         func = intel_vgpu_set_intx_trigger;
 896                         break;
 897                 }
 898                 break;
 899         case VFIO_PCI_MSI_IRQ_INDEX:
 900                 switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
 901                 case VFIO_IRQ_SET_ACTION_MASK:
 902                 case VFIO_IRQ_SET_ACTION_UNMASK:
 903                         /* XXX Need masking support exported */
 904                         break;
 905                 case VFIO_IRQ_SET_ACTION_TRIGGER:
 906                         func = intel_vgpu_set_msi_trigger;
 907                         break;
 908                 }
 909                 break;
 910         }
 911
 912         if (!func)
 913                 return -ENOTTY;
 914
 915         return func(vgpu, index, start, count, flags, data);
 916 }
 917
 918 static long intel_vgpu_ioctl(struct mdev_device *mdev, unsigned int cmd,
 919                              unsigned long arg)
 920 {
 921         struct intel_vgpu *vgpu = mdev_get_drvdata(mdev);
 922         unsigned long minsz;
 923
 924         gvt_dbg_core("vgpu%d ioctl, cmd: %d\n", vgpu->id, cmd);
 925
 926         if (cmd == VFIO_DEVICE_GET_INFO) {
 927                 struct vfio_device_info info;
 928
 929                 minsz = offsetofend(struct vfio_device_info, num_irqs);
 930
 931                 if (copy_from_user(&info, (void __user *)arg, minsz))
 932                         return -EFAULT;
 933
 934                 if (info.argsz < minsz)
 935                         return -EINVAL;
 936
 937                 info.flags = VFIO_DEVICE_FLAGS_PCI;
 938                 info.flags |= VFIO_DEVICE_FLAGS_RESET;
 939                 info.num_regions = VFIO_PCI_NUM_REGIONS;
 940                 info.num_irqs = VFIO_PCI_NUM_IRQS;
 941
 942                 return copy_to_user((void __user *)arg, &info, minsz) ?
 943                         -EFAULT : 0;
 944
 945         } else if (cmd == VFIO_DEVICE_GET_REGION_INFO) {
 946                 struct vfio_region_info info;
 947                 struct vfio_info_cap caps = { .buf = NULL, .size = 0 };
 948                 int i, ret;
 949                 struct vfio_region_info_cap_sparse_mmap *sparse = NULL;
 950                 size_t size;
 951                 int nr_areas = 1;
 952                 int cap_type_id;
 953
 954                 minsz = offsetofend(struct vfio_region_info, offset);
 955
 956                 if (copy_from_user(&info, (void __user *)arg, minsz))
 957                         return -EFAULT;
 958
 959                 if (info.argsz < minsz)
 960                         return -EINVAL;
 961
 962                 switch (info.index) {
 963                 case VFIO_PCI_CONFIG_REGION_INDEX:
 964                         info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
 965                         info.size = INTEL_GVT_MAX_CFG_SPACE_SZ;
 966                         info.flags = VFIO_REGION_INFO_FLAG_READ |
 967                                      VFIO_REGION_INFO_FLAG_WRITE;
 968                         break;
 969                 case VFIO_PCI_BAR0_REGION_INDEX:
 970                         info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
 971                         info.size = vgpu->cfg_space.bar[info.index].size;
 972                         if (!info.size) {
 973                                 info.flags = 0;
 974                                 break;
 975                         }
 976
 977                         info.flags = VFIO_REGION_INFO_FLAG_READ |
 978                                      VFIO_REGION_INFO_FLAG_WRITE;
 979                         break;
 980                 case VFIO_PCI_BAR1_REGION_INDEX:
 981                         info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
 982                         info.size = 0;
 983                         info.flags = 0;
 984                         break;
 985                 case VFIO_PCI_BAR2_REGION_INDEX:
 986                         info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
 987                         info.flags = VFIO_REGION_INFO_FLAG_CAPS |
 988                                         VFIO_REGION_INFO_FLAG_MMAP |
 989                                         VFIO_REGION_INFO_FLAG_READ |
 990                                         VFIO_REGION_INFO_FLAG_WRITE;
 991                         info.size = gvt_aperture_sz(vgpu->gvt);
 992
 993                         size = sizeof(*sparse) +
 994                                         (nr_areas * sizeof(*sparse->areas));
 995                         sparse = kzalloc(size, GFP_KERNEL);
 996                         if (!sparse)
 997                                 return -ENOMEM;
 998
 999                         sparse->nr_areas = nr_areas;
1000                         cap_type_id = VFIO_REGION_INFO_CAP_SPARSE_MMAP;
1001                         sparse->areas[0].offset =
1002                                         PAGE_ALIGN(vgpu_aperture_offset(vgpu));
1003                         sparse->areas[0].size = vgpu_aperture_sz(vgpu);
1004                         break;
1005
1006                 case VFIO_PCI_BAR3_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:
1007                         info.offset = VFIO_PCI_INDEX_TO_OFFSET(info.index);
1008                         info.size = 0;
1009
1010                         info.flags = 0;
1011                         gvt_dbg_core("get region info bar:%d\n", info.index);
1012                         break;
1013
1014                 case VFIO_PCI_ROM_REGION_INDEX:
1015                 case VFIO_PCI_VGA_REGION_INDEX:
1016                         gvt_dbg_core("get region info index:%d\n", info.index);
1017                         break;
1018                 default:
1019                         {
1020                                 struct vfio_region_info_cap_type cap_type;
1021
1022                                 if (info.index >= VFIO_PCI_NUM_REGIONS +
1023                                                 vgpu->vdev.num_regions)
1024                                         return -EINVAL;
1025
1026                                 i = info.index - VFIO_PCI_NUM_REGIONS;
1027
1028                                 info.offset =
1029                                         VFIO_PCI_INDEX_TO_OFFSET(info.index);
1030                                 info.size = vgpu->vdev.region[i].size;
1031                                 info.flags = vgpu->vdev.region[i].flags;
1032
1033                                 cap_type.type = vgpu->vdev.region[i].type;
1034                                 cap_type.subtype = vgpu->vdev.region[i].subtype;
1035
1036                                 ret = vfio_info_add_capability(&caps,
1037                                                 VFIO_REGION_INFO_CAP_TYPE,
1038                                                 &cap_type);
1039                                 if (ret)
1040                                         return ret;
1041                         }
1042                 }
1043
1044                 if ((info.flags & VFIO_REGION_INFO_FLAG_CAPS) && sparse) {
1045                         switch (cap_type_id) {
1046                         case VFIO_REGION_INFO_CAP_SPARSE_MMAP:
1047                                 ret = vfio_info_add_capability(&caps,
1048                                         VFIO_REGION_INFO_CAP_SPARSE_MMAP,
1049                                         sparse);
1050                                 kfree(sparse);
1051                                 if (ret)
1052                                         return ret;
1053                                 break;
1054                         default:
1055                                 return -EINVAL;
1056                         }
1057                 }
1058
1059                 if (caps.size) {
1060                         if (info.argsz < sizeof(info) + caps.size) {
1061                                 info.argsz = sizeof(info) + caps.size;
1062                                 info.cap_offset = 0;
1063                         } else {
1064                                 vfio_info_cap_shift(&caps, sizeof(info));
1065                                 if (copy_to_user((void __user *)arg +
1066                                                   sizeof(info), caps.buf,
1067                                                   caps.size)) {
1068                                         kfree(caps.buf);
1069                                         return -EFAULT;
1070                                 }
1071                                 info.cap_offset = sizeof(info);
1072                         }
1073
1074                         kfree(caps.buf);
1075                 }
1076
1077                 return copy_to_user((void __user *)arg, &info, minsz) ?
1078                         -EFAULT : 0;
1079         } else if (cmd == VFIO_DEVICE_GET_IRQ_INFO) {
1080                 struct vfio_irq_info info;
1081
1082                 minsz = offsetofend(struct vfio_irq_info, count);
1083
1084                 if (copy_from_user(&info, (void __user *)arg, minsz))
1085                         return -EFAULT;
1086
1087                 if (info.argsz < minsz || info.index >= VFIO_PCI_NUM_IRQS)
1088                         return -EINVAL;
1089
1090                 switch (info.index) {
1091                 case VFIO_PCI_INTX_IRQ_INDEX:
1092                 case VFIO_PCI_MSI_IRQ_INDEX:
1093                         break;
1094                 default:
1095                         return -EINVAL;
1096                 }
1097
1098                 info.flags = VFIO_IRQ_INFO_EVENTFD;
1099
1100                 info.count = intel_vgpu_get_irq_count(vgpu, info.index);
1101
1102                 if (info.index == VFIO_PCI_INTX_IRQ_INDEX)
1103                         info.flags |= (VFIO_IRQ_INFO_MASKABLE |
1104                                        VFIO_IRQ_INFO_AUTOMASKED);
1105                 else
1106                         info.flags |= VFIO_IRQ_INFO_NORESIZE;
1107
1108                 return copy_to_user((void __user *)arg, &info, minsz) ?
1109                         -EFAULT : 0;
1110         } else if (cmd == VFIO_DEVICE_SET_IRQS) {
1111                 struct vfio_irq_set hdr;
1112                 u8 *data = NULL;
1113                 int ret = 0;
1114                 size_t data_size = 0;
1115
1116                 minsz = offsetofend(struct vfio_irq_set, count);
1117
1118                 if (copy_from_user(&hdr, (void __user *)arg, minsz))
1119                         return -EFAULT;
1120
1121                 if (!(hdr.flags & VFIO_IRQ_SET_DATA_NONE)) {
1122                         int max = intel_vgpu_get_irq_count(vgpu, hdr.index);
1123
1124                         ret = vfio_set_irqs_validate_and_prepare(&hdr, max,
1125                                                 VFIO_PCI_NUM_IRQS, &data_size);
1126                         if (ret) {
1127                                 gvt_vgpu_err("intel:vfio_set_irqs_validate_and_prepare failed\n");
1128                                 return -EINVAL;
1129                         }
1130                         if (data_size) {
1131                                 data = memdup_user((void __user *)(arg + minsz),
1132                                                    data_size);
1133                                 if (IS_ERR(data))
1134                                         return PTR_ERR(data);
1135                         }
1136                 }
1137
1138                 ret = intel_vgpu_set_irqs(vgpu, hdr.flags, hdr.index,
1139                                         hdr.start, hdr.count, data);
1140                 kfree(data);
1141
1142                 return ret;
1143         } else if (cmd == VFIO_DEVICE_RESET) {
1144                 intel_gvt_ops->vgpu_reset(vgpu);
1145                 return 0;
1146         }
1147
1148         return 0;
1149 }
1150
1151 static ssize_t
1152 vgpu_id_show(struct device *dev, struct device_attribute *attr,
1153              char *buf)
1154 {
1155         struct mdev_device *mdev = mdev_from_dev(dev);
1156
1157         if (mdev) {
1158                 struct intel_vgpu *vgpu = (struct intel_vgpu *)
1159                         mdev_get_drvdata(mdev);
1160                 return sprintf(buf, "%d\n", vgpu->id);
1161         }
1162         return sprintf(buf, "\n");
1163 }
1164
1165 static DEVICE_ATTR_RO(vgpu_id);
1166
1167 static struct attribute *intel_vgpu_attrs[] = {
1168         &dev_attr_vgpu_id.attr,
1169         NULL
1170 };
1171
1172 static const struct attribute_group intel_vgpu_group = {
1173         .name = "intel_vgpu",
1174         .attrs = intel_vgpu_attrs,
1175 };
1176
1177 static const struct attribute_group *intel_vgpu_groups[] = {
1178         &intel_vgpu_group,
1179         NULL,
1180 };
1181
1182 static const struct mdev_parent_ops intel_vgpu_ops = {
1183         .supported_type_groups  = intel_vgpu_type_groups,
1184         .mdev_attr_groups       = intel_vgpu_groups,
1185         .create                 = intel_vgpu_create,
1186         .remove                 = intel_vgpu_remove,
1187
1188         .open                   = intel_vgpu_open,
1189         .release                = intel_vgpu_release,
1190
1191         .read                   = intel_vgpu_read,
1192         .write                  = intel_vgpu_write,
1193         .mmap                   = intel_vgpu_mmap,
1194         .ioctl                  = intel_vgpu_ioctl,
1195 };
1196
1197 static int kvmgt_host_init(struct device *dev, void *gvt, const void *ops)
1198 {
1199         if (!intel_gvt_init_vgpu_type_groups(gvt))
1200                 return -EFAULT;
1201
1202         intel_gvt_ops = ops;
1203
1204         return mdev_register_device(dev, &intel_vgpu_ops);
1205 }
1206
1207 static void kvmgt_host_exit(struct device *dev, void *gvt)
1208 {
1209         intel_gvt_cleanup_vgpu_type_groups(gvt);
1210         mdev_unregister_device(dev);
1211 }
1212
1213 static int kvmgt_write_protect_add(unsigned long handle, u64 gfn)
1214 {
1215         struct kvmgt_guest_info *info;
1216         struct kvm *kvm;
1217         struct kvm_memory_slot *slot;
1218         int idx;
1219
1220         if (!handle_valid(handle))
1221                 return -ESRCH;
1222
1223         info = (struct kvmgt_guest_info *)handle;
1224         kvm = info->kvm;
1225
1226         idx = srcu_read_lock(&kvm->srcu);
1227         slot = gfn_to_memslot(kvm, gfn);
1228         if (!slot) {
1229                 srcu_read_unlock(&kvm->srcu, idx);
1230                 return -EINVAL;
1231         }
1232
1233         spin_lock(&kvm->mmu_lock);
1234
1235         if (kvmgt_gfn_is_write_protected(info, gfn))
1236                 goto out;
1237
1238         kvm_slot_page_track_add_page(kvm, slot, gfn, KVM_PAGE_TRACK_WRITE);
1239         kvmgt_protect_table_add(info, gfn);
1240
1241 out:
1242         spin_unlock(&kvm->mmu_lock);
1243         srcu_read_unlock(&kvm->srcu, idx);
1244         return 0;
1245 }
1246
1247 static int kvmgt_write_protect_remove(unsigned long handle, u64 gfn)
1248 {
1249         struct kvmgt_guest_info *info;
1250         struct kvm *kvm;
1251         struct kvm_memory_slot *slot;
1252         int idx;
1253
1254         if (!handle_valid(handle))
1255                 return 0;
1256
1257         info = (struct kvmgt_guest_info *)handle;
1258         kvm = info->kvm;
1259
1260         idx = srcu_read_lock(&kvm->srcu);
1261         slot = gfn_to_memslot(kvm, gfn);
1262         if (!slot) {
1263                 srcu_read_unlock(&kvm->srcu, idx);
1264                 return -EINVAL;
1265         }
1266
1267         spin_lock(&kvm->mmu_lock);
1268
1269         if (!kvmgt_gfn_is_write_protected(info, gfn))
1270                 goto out;
1271
1272         kvm_slot_page_track_remove_page(kvm, slot, gfn, KVM_PAGE_TRACK_WRITE);
1273         kvmgt_protect_table_del(info, gfn);
1274
1275 out:
1276         spin_unlock(&kvm->mmu_lock);
1277         srcu_read_unlock(&kvm->srcu, idx);
1278         return 0;
1279 }
1280
1281 static void kvmgt_page_track_write(struct kvm_vcpu *vcpu, gpa_t gpa,
1282                 const u8 *val, int len,
1283                 struct kvm_page_track_notifier_node *node)
1284 {
1285         struct kvmgt_guest_info *info = container_of(node,
1286                                         struct kvmgt_guest_info, track_node);
1287
1288         if (kvmgt_gfn_is_write_protected(info, gpa_to_gfn(gpa)))
1289                 intel_gvt_ops->emulate_mmio_write(info->vgpu, gpa,
1290                                         (void *)val, len);
1291 }
1292
1293 static void kvmgt_page_track_flush_slot(struct kvm *kvm,
1294                 struct kvm_memory_slot *slot,
1295                 struct kvm_page_track_notifier_node *node)
1296 {
1297         int i;
1298         gfn_t gfn;
1299         struct kvmgt_guest_info *info = container_of(node,
1300                                         struct kvmgt_guest_info, track_node);
1301
1302         spin_lock(&kvm->mmu_lock);
1303         for (i = 0; i < slot->npages; i++) {
1304                 gfn = slot->base_gfn + i;
1305                 if (kvmgt_gfn_is_write_protected(info, gfn)) {
1306                         kvm_slot_page_track_remove_page(kvm, slot, gfn,
1307                                                 KVM_PAGE_TRACK_WRITE);
1308                         kvmgt_protect_table_del(info, gfn);
1309                 }
1310         }
1311         spin_unlock(&kvm->mmu_lock);
1312 }
1313
1314 static bool __kvmgt_vgpu_exist(struct intel_vgpu *vgpu, struct kvm *kvm)
1315 {
1316         struct intel_vgpu *itr;
1317         struct kvmgt_guest_info *info;
1318         int id;
1319         bool ret = false;
1320
1321         mutex_lock(&vgpu->gvt->lock);
1322         for_each_active_vgpu(vgpu->gvt, itr, id) {
1323                 if (!handle_valid(itr->handle))
1324                         continue;
1325
1326                 info = (struct kvmgt_guest_info *)itr->handle;
1327                 if (kvm && kvm == info->kvm) {
1328                         ret = true;
1329                         goto out;
1330                 }
1331         }
1332 out:
1333         mutex_unlock(&vgpu->gvt->lock);
1334         return ret;
1335 }
1336
1337 static int kvmgt_guest_init(struct mdev_device *mdev)
1338 {
1339         struct kvmgt_guest_info *info;
1340         struct intel_vgpu *vgpu;
1341         struct kvm *kvm;
1342
1343         vgpu = mdev_get_drvdata(mdev);
1344         if (handle_valid(vgpu->handle))
1345                 return -EEXIST;
1346
1347         kvm = vgpu->vdev.kvm;
1348         if (!kvm || kvm->mm != current->mm) {
1349                 gvt_vgpu_err("KVM is required to use Intel vGPU\n");
1350                 return -ESRCH;
1351         }
1352
1353         if (__kvmgt_vgpu_exist(vgpu, kvm))
1354                 return -EEXIST;
1355
1356         info = vzalloc(sizeof(struct kvmgt_guest_info));
1357         if (!info)
1358                 return -ENOMEM;
1359
1360         vgpu->handle = (unsigned long)info;
1361         info->vgpu = vgpu;
1362         info->kvm = kvm;
1363         kvm_get_kvm(info->kvm);
1364
1365         kvmgt_protect_table_init(info);
1366         gvt_cache_init(vgpu);
1367
1368         info->track_node.track_write = kvmgt_page_track_write;
1369         info->track_node.track_flush_slot = kvmgt_page_track_flush_slot;
1370         kvm_page_track_register_notifier(kvm, &info->track_node);
1371
1372         return 0;
1373 }
1374
1375 static bool kvmgt_guest_exit(struct kvmgt_guest_info *info)
1376 {
1377         kvm_page_track_unregister_notifier(info->kvm, &info->track_node);
1378         kvm_put_kvm(info->kvm);
1379         kvmgt_protect_table_destroy(info);
1380         gvt_cache_destroy(info->vgpu);
1381         vfree(info);
1382
1383         return true;
1384 }
1385
1386 static int kvmgt_attach_vgpu(void *vgpu, unsigned long *handle)
1387 {
1388         /* nothing to do here */
1389         return 0;
1390 }
1391
1392 static void kvmgt_detach_vgpu(unsigned long handle)
1393 {
1394         /* nothing to do here */
1395 }
1396
1397 static int kvmgt_inject_msi(unsigned long handle, u32 addr, u16 data)
1398 {
1399         struct kvmgt_guest_info *info;
1400         struct intel_vgpu *vgpu;
1401
1402         if (!handle_valid(handle))
1403                 return -ESRCH;
1404
1405         info = (struct kvmgt_guest_info *)handle;
1406         vgpu = info->vgpu;
1407
1408         if (eventfd_signal(vgpu->vdev.msi_trigger, 1) == 1)
1409                 return 0;
1410
1411         return -EFAULT;
1412 }
1413
1414 static unsigned long kvmgt_gfn_to_pfn(unsigned long handle, unsigned long gfn)
1415 {
1416         unsigned long iova, pfn;
1417         struct kvmgt_guest_info *info;
1418         struct device *dev;
1419         struct intel_vgpu *vgpu;
1420         int rc;
1421
1422         if (!handle_valid(handle))
1423                 return INTEL_GVT_INVALID_ADDR;
1424
1425         info = (struct kvmgt_guest_info *)handle;
1426         vgpu = info->vgpu;
1427         iova = gvt_cache_find(info->vgpu, gfn);
1428         if (iova != INTEL_GVT_INVALID_ADDR)
1429                 return iova;
1430
1431         pfn = INTEL_GVT_INVALID_ADDR;
1432         dev = mdev_dev(info->vgpu->vdev.mdev);
1433         rc = vfio_pin_pages(dev, &gfn, 1, IOMMU_READ | IOMMU_WRITE, &pfn);
1434         if (rc != 1) {
1435                 gvt_vgpu_err("vfio_pin_pages failed for gfn 0x%lx: %d\n",
1436                         gfn, rc);
1437                 return INTEL_GVT_INVALID_ADDR;
1438         }
1439         /* transfer to host iova for GFX to use DMA */
1440         rc = gvt_dma_map_iova(info->vgpu, pfn, &iova);
1441         if (rc) {
1442                 gvt_vgpu_err("gvt_dma_map_iova failed for gfn: 0x%lx\n", gfn);
1443                 vfio_unpin_pages(dev, &gfn, 1);
1444                 return INTEL_GVT_INVALID_ADDR;
1445         }
1446
1447         gvt_cache_add(info->vgpu, gfn, iova);
1448         return iova;
1449 }
1450
1451 static int kvmgt_rw_gpa(unsigned long handle, unsigned long gpa,
1452                         void *buf, unsigned long len, bool write)
1453 {
1454         struct kvmgt_guest_info *info;
1455         struct kvm *kvm;
1456         int idx, ret;
1457         bool kthread = current->mm == NULL;
1458
1459         if (!handle_valid(handle))
1460                 return -ESRCH;
1461
1462         info = (struct kvmgt_guest_info *)handle;
1463         kvm = info->kvm;
1464
1465         if (kthread)
1466                 use_mm(kvm->mm);
1467
1468         idx = srcu_read_lock(&kvm->srcu);
1469         ret = write ? kvm_write_guest(kvm, gpa, buf, len) :
1470                       kvm_read_guest(kvm, gpa, buf, len);
1471         srcu_read_unlock(&kvm->srcu, idx);
1472
1473         if (kthread)
1474                 unuse_mm(kvm->mm);
1475
1476         return ret;
1477 }
1478
1479 static int kvmgt_read_gpa(unsigned long handle, unsigned long gpa,
1480                         void *buf, unsigned long len)
1481 {
1482         return kvmgt_rw_gpa(handle, gpa, buf, len, false);
1483 }
1484
1485 static int kvmgt_write_gpa(unsigned long handle, unsigned long gpa,
1486                         void *buf, unsigned long len)
1487 {
1488         return kvmgt_rw_gpa(handle, gpa, buf, len, true);
1489 }
1490
1491 static unsigned long kvmgt_virt_to_pfn(void *addr)
1492 {
1493         return PFN_DOWN(__pa(addr));
1494 }
1495
1496 struct intel_gvt_mpt kvmgt_mpt = {
1497         .host_init = kvmgt_host_init,
1498         .host_exit = kvmgt_host_exit,
1499         .attach_vgpu = kvmgt_attach_vgpu,
1500         .detach_vgpu = kvmgt_detach_vgpu,
1501         .inject_msi = kvmgt_inject_msi,
1502         .from_virt_to_mfn = kvmgt_virt_to_pfn,
1503         .set_wp_page = kvmgt_write_protect_add,
1504         .unset_wp_page = kvmgt_write_protect_remove,
1505         .read_gpa = kvmgt_read_gpa,
1506         .write_gpa = kvmgt_write_gpa,
1507         .gfn_to_mfn = kvmgt_gfn_to_pfn,
1508 };
1509 EXPORT_SYMBOL_GPL(kvmgt_mpt);
1510
1511 static int __init kvmgt_init(void)
1512 {
1513         return 0;
1514 }
1515
1516 static void __exit kvmgt_exit(void)
1517 {
1518 }
1519
1520 module_init(kvmgt_init);
1521 module_exit(kvmgt_exit);
1522
1523 MODULE_LICENSE("GPL and additional rights");
1524 MODULE_AUTHOR("Intel Corporation");