2 * Copyright © 2008 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
29 #include <linux/seq_file.h>
30 #include <linux/debugfs.h>
31 #include <linux/slab.h>
32 #include <linux/export.h>
35 #include "intel_drv.h"
36 #include "intel_ringbuffer.h"
40 #define DRM_I915_RING_DEBUG 1
43 #if defined(CONFIG_DEBUG_FS)
52 static const char *yesno(int v)
54 return v ? "yes" : "no";
57 static int i915_capabilities(struct seq_file *m, void *data)
59 struct drm_info_node *node = (struct drm_info_node *) m->private;
60 struct drm_device *dev = node->minor->dev;
61 const struct intel_device_info *info = INTEL_INFO(dev);
63 seq_printf(m, "gen: %d\n", info->gen);
64 seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
65 #define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
79 B(cursor_needs_physical);
81 B(overlay_needs_physical);
91 static const char *get_pin_flag(struct drm_i915_gem_object *obj)
93 if (obj->user_pin_count > 0)
95 else if (obj->pin_count > 0)
101 static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
103 switch (obj->tiling_mode) {
105 case I915_TILING_NONE: return " ";
106 case I915_TILING_X: return "X";
107 case I915_TILING_Y: return "Y";
111 static const char *cache_level_str(int type)
114 case I915_CACHE_NONE: return " uncached";
115 case I915_CACHE_LLC: return " snooped (LLC)";
116 case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
122 describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
124 seq_printf(m, "%p: %s%s %8zdKiB %04x %04x %d %d%s%s%s",
127 get_tiling_flag(obj),
128 obj->base.size / 1024,
129 obj->base.read_domains,
130 obj->base.write_domain,
131 obj->last_rendering_seqno,
132 obj->last_fenced_seqno,
133 cache_level_str(obj->cache_level),
134 obj->dirty ? " dirty" : "",
135 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
137 seq_printf(m, " (name: %d)", obj->base.name);
138 if (obj->fence_reg != I915_FENCE_REG_NONE)
139 seq_printf(m, " (fence: %d)", obj->fence_reg);
140 if (obj->gtt_space != NULL)
141 seq_printf(m, " (gtt offset: %08x, size: %08x)",
142 obj->gtt_offset, (unsigned int)obj->gtt_space->size);
143 if (obj->pin_mappable || obj->fault_mappable) {
145 if (obj->pin_mappable)
147 if (obj->fault_mappable)
150 seq_printf(m, " (%s mappable)", s);
152 if (obj->ring != NULL)
153 seq_printf(m, " (%s)", obj->ring->name);
156 static int i915_gem_object_list_info(struct seq_file *m, void *data)
158 struct drm_info_node *node = (struct drm_info_node *) m->private;
159 uintptr_t list = (uintptr_t) node->info_ent->data;
160 struct list_head *head;
161 struct drm_device *dev = node->minor->dev;
162 drm_i915_private_t *dev_priv = dev->dev_private;
163 struct drm_i915_gem_object *obj;
164 size_t total_obj_size, total_gtt_size;
167 ret = mutex_lock_interruptible(&dev->struct_mutex);
173 seq_printf(m, "Active:\n");
174 head = &dev_priv->mm.active_list;
177 seq_printf(m, "Inactive:\n");
178 head = &dev_priv->mm.inactive_list;
181 seq_printf(m, "Flushing:\n");
182 head = &dev_priv->mm.flushing_list;
185 mutex_unlock(&dev->struct_mutex);
189 total_obj_size = total_gtt_size = count = 0;
190 list_for_each_entry(obj, head, mm_list) {
192 describe_obj(m, obj);
194 total_obj_size += obj->base.size;
195 total_gtt_size += obj->gtt_space->size;
198 mutex_unlock(&dev->struct_mutex);
200 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
201 count, total_obj_size, total_gtt_size);
205 #define count_objects(list, member) do { \
206 list_for_each_entry(obj, list, member) { \
207 size += obj->gtt_space->size; \
209 if (obj->map_and_fenceable) { \
210 mappable_size += obj->gtt_space->size; \
216 static int i915_gem_object_info(struct seq_file *m, void* data)
218 struct drm_info_node *node = (struct drm_info_node *) m->private;
219 struct drm_device *dev = node->minor->dev;
220 struct drm_i915_private *dev_priv = dev->dev_private;
221 u32 count, mappable_count;
222 size_t size, mappable_size;
223 struct drm_i915_gem_object *obj;
226 ret = mutex_lock_interruptible(&dev->struct_mutex);
230 seq_printf(m, "%u objects, %zu bytes\n",
231 dev_priv->mm.object_count,
232 dev_priv->mm.object_memory);
234 size = count = mappable_size = mappable_count = 0;
235 count_objects(&dev_priv->mm.gtt_list, gtt_list);
236 seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
237 count, mappable_count, size, mappable_size);
239 size = count = mappable_size = mappable_count = 0;
240 count_objects(&dev_priv->mm.active_list, mm_list);
241 count_objects(&dev_priv->mm.flushing_list, mm_list);
242 seq_printf(m, " %u [%u] active objects, %zu [%zu] bytes\n",
243 count, mappable_count, size, mappable_size);
245 size = count = mappable_size = mappable_count = 0;
246 count_objects(&dev_priv->mm.inactive_list, mm_list);
247 seq_printf(m, " %u [%u] inactive objects, %zu [%zu] bytes\n",
248 count, mappable_count, size, mappable_size);
250 size = count = mappable_size = mappable_count = 0;
251 list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
252 if (obj->fault_mappable) {
253 size += obj->gtt_space->size;
256 if (obj->pin_mappable) {
257 mappable_size += obj->gtt_space->size;
261 seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
262 mappable_count, mappable_size);
263 seq_printf(m, "%u fault mappable objects, %zu bytes\n",
266 seq_printf(m, "%zu [%zu] gtt total\n",
267 dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
269 mutex_unlock(&dev->struct_mutex);
274 static int i915_gem_gtt_info(struct seq_file *m, void* data)
276 struct drm_info_node *node = (struct drm_info_node *) m->private;
277 struct drm_device *dev = node->minor->dev;
278 uintptr_t list = (uintptr_t) node->info_ent->data;
279 struct drm_i915_private *dev_priv = dev->dev_private;
280 struct drm_i915_gem_object *obj;
281 size_t total_obj_size, total_gtt_size;
284 ret = mutex_lock_interruptible(&dev->struct_mutex);
288 total_obj_size = total_gtt_size = count = 0;
289 list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
290 if (list == PINNED_LIST && obj->pin_count == 0)
294 describe_obj(m, obj);
296 total_obj_size += obj->base.size;
297 total_gtt_size += obj->gtt_space->size;
301 mutex_unlock(&dev->struct_mutex);
303 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
304 count, total_obj_size, total_gtt_size);
309 static int i915_gem_pageflip_info(struct seq_file *m, void *data)
311 struct drm_info_node *node = (struct drm_info_node *) m->private;
312 struct drm_device *dev = node->minor->dev;
314 struct intel_crtc *crtc;
316 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
317 const char pipe = pipe_name(crtc->pipe);
318 const char plane = plane_name(crtc->plane);
319 struct intel_unpin_work *work;
321 spin_lock_irqsave(&dev->event_lock, flags);
322 work = crtc->unpin_work;
324 seq_printf(m, "No flip due on pipe %c (plane %c)\n",
327 if (!work->pending) {
328 seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
331 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
334 if (work->enable_stall_check)
335 seq_printf(m, "Stall check enabled, ");
337 seq_printf(m, "Stall check waiting for page flip ioctl, ");
338 seq_printf(m, "%d prepares\n", work->pending);
340 if (work->old_fb_obj) {
341 struct drm_i915_gem_object *obj = work->old_fb_obj;
343 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
345 if (work->pending_flip_obj) {
346 struct drm_i915_gem_object *obj = work->pending_flip_obj;
348 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
351 spin_unlock_irqrestore(&dev->event_lock, flags);
357 static int i915_gem_request_info(struct seq_file *m, void *data)
359 struct drm_info_node *node = (struct drm_info_node *) m->private;
360 struct drm_device *dev = node->minor->dev;
361 drm_i915_private_t *dev_priv = dev->dev_private;
362 struct drm_i915_gem_request *gem_request;
365 ret = mutex_lock_interruptible(&dev->struct_mutex);
370 if (!list_empty(&dev_priv->ring[RCS].request_list)) {
371 seq_printf(m, "Render requests:\n");
372 list_for_each_entry(gem_request,
373 &dev_priv->ring[RCS].request_list,
375 seq_printf(m, " %d @ %d\n",
377 (int) (jiffies - gem_request->emitted_jiffies));
381 if (!list_empty(&dev_priv->ring[VCS].request_list)) {
382 seq_printf(m, "BSD requests:\n");
383 list_for_each_entry(gem_request,
384 &dev_priv->ring[VCS].request_list,
386 seq_printf(m, " %d @ %d\n",
388 (int) (jiffies - gem_request->emitted_jiffies));
392 if (!list_empty(&dev_priv->ring[BCS].request_list)) {
393 seq_printf(m, "BLT requests:\n");
394 list_for_each_entry(gem_request,
395 &dev_priv->ring[BCS].request_list,
397 seq_printf(m, " %d @ %d\n",
399 (int) (jiffies - gem_request->emitted_jiffies));
403 mutex_unlock(&dev->struct_mutex);
406 seq_printf(m, "No requests\n");
411 static void i915_ring_seqno_info(struct seq_file *m,
412 struct intel_ring_buffer *ring)
414 if (ring->get_seqno) {
415 seq_printf(m, "Current sequence (%s): %d\n",
416 ring->name, ring->get_seqno(ring));
420 static int i915_gem_seqno_info(struct seq_file *m, void *data)
422 struct drm_info_node *node = (struct drm_info_node *) m->private;
423 struct drm_device *dev = node->minor->dev;
424 drm_i915_private_t *dev_priv = dev->dev_private;
427 ret = mutex_lock_interruptible(&dev->struct_mutex);
431 for (i = 0; i < I915_NUM_RINGS; i++)
432 i915_ring_seqno_info(m, &dev_priv->ring[i]);
434 mutex_unlock(&dev->struct_mutex);
440 static int i915_interrupt_info(struct seq_file *m, void *data)
442 struct drm_info_node *node = (struct drm_info_node *) m->private;
443 struct drm_device *dev = node->minor->dev;
444 drm_i915_private_t *dev_priv = dev->dev_private;
447 ret = mutex_lock_interruptible(&dev->struct_mutex);
451 if (IS_VALLEYVIEW(dev)) {
452 seq_printf(m, "Display IER:\t%08x\n",
454 seq_printf(m, "Display IIR:\t%08x\n",
456 seq_printf(m, "Display IIR_RW:\t%08x\n",
457 I915_READ(VLV_IIR_RW));
458 seq_printf(m, "Display IMR:\t%08x\n",
461 seq_printf(m, "Pipe %c stat:\t%08x\n",
463 I915_READ(PIPESTAT(pipe)));
465 seq_printf(m, "Master IER:\t%08x\n",
466 I915_READ(VLV_MASTER_IER));
468 seq_printf(m, "Render IER:\t%08x\n",
470 seq_printf(m, "Render IIR:\t%08x\n",
472 seq_printf(m, "Render IMR:\t%08x\n",
475 seq_printf(m, "PM IER:\t\t%08x\n",
476 I915_READ(GEN6_PMIER));
477 seq_printf(m, "PM IIR:\t\t%08x\n",
478 I915_READ(GEN6_PMIIR));
479 seq_printf(m, "PM IMR:\t\t%08x\n",
480 I915_READ(GEN6_PMIMR));
482 seq_printf(m, "Port hotplug:\t%08x\n",
483 I915_READ(PORT_HOTPLUG_EN));
484 seq_printf(m, "DPFLIPSTAT:\t%08x\n",
485 I915_READ(VLV_DPFLIPSTAT));
486 seq_printf(m, "DPINVGTT:\t%08x\n",
487 I915_READ(DPINVGTT));
489 } else if (!HAS_PCH_SPLIT(dev)) {
490 seq_printf(m, "Interrupt enable: %08x\n",
492 seq_printf(m, "Interrupt identity: %08x\n",
494 seq_printf(m, "Interrupt mask: %08x\n",
497 seq_printf(m, "Pipe %c stat: %08x\n",
499 I915_READ(PIPESTAT(pipe)));
501 seq_printf(m, "North Display Interrupt enable: %08x\n",
503 seq_printf(m, "North Display Interrupt identity: %08x\n",
505 seq_printf(m, "North Display Interrupt mask: %08x\n",
507 seq_printf(m, "South Display Interrupt enable: %08x\n",
509 seq_printf(m, "South Display Interrupt identity: %08x\n",
511 seq_printf(m, "South Display Interrupt mask: %08x\n",
513 seq_printf(m, "Graphics Interrupt enable: %08x\n",
515 seq_printf(m, "Graphics Interrupt identity: %08x\n",
517 seq_printf(m, "Graphics Interrupt mask: %08x\n",
520 seq_printf(m, "Interrupts received: %d\n",
521 atomic_read(&dev_priv->irq_received));
522 for (i = 0; i < I915_NUM_RINGS; i++) {
523 if (IS_GEN6(dev) || IS_GEN7(dev)) {
524 seq_printf(m, "Graphics Interrupt mask (%s): %08x\n",
525 dev_priv->ring[i].name,
526 I915_READ_IMR(&dev_priv->ring[i]));
528 i915_ring_seqno_info(m, &dev_priv->ring[i]);
530 mutex_unlock(&dev->struct_mutex);
535 static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
537 struct drm_info_node *node = (struct drm_info_node *) m->private;
538 struct drm_device *dev = node->minor->dev;
539 drm_i915_private_t *dev_priv = dev->dev_private;
542 ret = mutex_lock_interruptible(&dev->struct_mutex);
546 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
547 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
548 for (i = 0; i < dev_priv->num_fence_regs; i++) {
549 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
551 seq_printf(m, "Fenced object[%2d] = ", i);
553 seq_printf(m, "unused");
555 describe_obj(m, obj);
559 mutex_unlock(&dev->struct_mutex);
563 static int i915_hws_info(struct seq_file *m, void *data)
565 struct drm_info_node *node = (struct drm_info_node *) m->private;
566 struct drm_device *dev = node->minor->dev;
567 drm_i915_private_t *dev_priv = dev->dev_private;
568 struct intel_ring_buffer *ring;
569 const volatile u32 __iomem *hws;
572 ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
573 hws = (volatile u32 __iomem *)ring->status_page.page_addr;
577 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
578 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
580 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
585 static const char *ring_str(int ring)
588 case RCS: return "render";
589 case VCS: return "bsd";
590 case BCS: return "blt";
595 static const char *pin_flag(int pinned)
605 static const char *tiling_flag(int tiling)
609 case I915_TILING_NONE: return "";
610 case I915_TILING_X: return " X";
611 case I915_TILING_Y: return " Y";
615 static const char *dirty_flag(int dirty)
617 return dirty ? " dirty" : "";
620 static const char *purgeable_flag(int purgeable)
622 return purgeable ? " purgeable" : "";
625 static void print_error_buffers(struct seq_file *m,
627 struct drm_i915_error_buffer *err,
630 seq_printf(m, "%s [%d]:\n", name, count);
633 seq_printf(m, " %08x %8u %04x %04x %08x%s%s%s%s%s%s%s",
639 pin_flag(err->pinned),
640 tiling_flag(err->tiling),
641 dirty_flag(err->dirty),
642 purgeable_flag(err->purgeable),
643 err->ring != -1 ? " " : "",
645 cache_level_str(err->cache_level));
648 seq_printf(m, " (name: %d)", err->name);
649 if (err->fence_reg != I915_FENCE_REG_NONE)
650 seq_printf(m, " (fence: %d)", err->fence_reg);
657 static void i915_ring_error_state(struct seq_file *m,
658 struct drm_device *dev,
659 struct drm_i915_error_state *error,
662 BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
663 seq_printf(m, "%s command stream:\n", ring_str(ring));
664 seq_printf(m, " HEAD: 0x%08x\n", error->head[ring]);
665 seq_printf(m, " TAIL: 0x%08x\n", error->tail[ring]);
666 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]);
667 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]);
668 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]);
669 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone[ring]);
670 if (ring == RCS && INTEL_INFO(dev)->gen >= 4) {
671 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
672 seq_printf(m, " BBADDR: 0x%08llx\n", error->bbaddr);
674 if (INTEL_INFO(dev)->gen >= 4)
675 seq_printf(m, " INSTPS: 0x%08x\n", error->instps[ring]);
676 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm[ring]);
677 seq_printf(m, " FADDR: 0x%08x\n", error->faddr[ring]);
678 if (INTEL_INFO(dev)->gen >= 6) {
679 seq_printf(m, " FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
680 seq_printf(m, " SYNC_0: 0x%08x\n",
681 error->semaphore_mboxes[ring][0]);
682 seq_printf(m, " SYNC_1: 0x%08x\n",
683 error->semaphore_mboxes[ring][1]);
685 seq_printf(m, " seqno: 0x%08x\n", error->seqno[ring]);
686 seq_printf(m, " waiting: %s\n", yesno(error->waiting[ring]));
687 seq_printf(m, " ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
688 seq_printf(m, " ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
691 struct i915_error_state_file_priv {
692 struct drm_device *dev;
693 struct drm_i915_error_state *error;
696 static int i915_error_state(struct seq_file *m, void *unused)
698 struct i915_error_state_file_priv *error_priv = m->private;
699 struct drm_device *dev = error_priv->dev;
700 drm_i915_private_t *dev_priv = dev->dev_private;
701 struct drm_i915_error_state *error = error_priv->error;
702 struct intel_ring_buffer *ring;
703 int i, j, page, offset, elt;
706 seq_printf(m, "no error state collected\n");
710 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
711 error->time.tv_usec);
712 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
713 seq_printf(m, "EIR: 0x%08x\n", error->eir);
714 seq_printf(m, "IER: 0x%08x\n", error->ier);
715 seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
716 seq_printf(m, "CCID: 0x%08x\n", error->ccid);
718 for (i = 0; i < dev_priv->num_fence_regs; i++)
719 seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]);
721 if (INTEL_INFO(dev)->gen >= 6) {
722 seq_printf(m, "ERROR: 0x%08x\n", error->error);
723 seq_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
726 for_each_ring(ring, dev_priv, i)
727 i915_ring_error_state(m, dev, error, i);
729 if (error->active_bo)
730 print_error_buffers(m, "Active",
732 error->active_bo_count);
734 if (error->pinned_bo)
735 print_error_buffers(m, "Pinned",
737 error->pinned_bo_count);
739 for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
740 struct drm_i915_error_object *obj;
742 if ((obj = error->ring[i].batchbuffer)) {
743 seq_printf(m, "%s --- gtt_offset = 0x%08x\n",
744 dev_priv->ring[i].name,
747 for (page = 0; page < obj->page_count; page++) {
748 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
749 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
755 if (error->ring[i].num_requests) {
756 seq_printf(m, "%s --- %d requests\n",
757 dev_priv->ring[i].name,
758 error->ring[i].num_requests);
759 for (j = 0; j < error->ring[i].num_requests; j++) {
760 seq_printf(m, " seqno 0x%08x, emitted %ld, tail 0x%08x\n",
761 error->ring[i].requests[j].seqno,
762 error->ring[i].requests[j].jiffies,
763 error->ring[i].requests[j].tail);
767 if ((obj = error->ring[i].ringbuffer)) {
768 seq_printf(m, "%s --- ringbuffer = 0x%08x\n",
769 dev_priv->ring[i].name,
772 for (page = 0; page < obj->page_count; page++) {
773 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
774 seq_printf(m, "%08x : %08x\n",
776 obj->pages[page][elt]);
784 intel_overlay_print_error_state(m, error->overlay);
787 intel_display_print_error_state(m, dev, error->display);
793 i915_error_state_write(struct file *filp,
794 const char __user *ubuf,
798 struct seq_file *m = filp->private_data;
799 struct i915_error_state_file_priv *error_priv = m->private;
800 struct drm_device *dev = error_priv->dev;
802 DRM_DEBUG_DRIVER("Resetting error state\n");
804 mutex_lock(&dev->struct_mutex);
805 i915_destroy_error_state(dev);
806 mutex_unlock(&dev->struct_mutex);
811 static int i915_error_state_open(struct inode *inode, struct file *file)
813 struct drm_device *dev = inode->i_private;
814 drm_i915_private_t *dev_priv = dev->dev_private;
815 struct i915_error_state_file_priv *error_priv;
818 error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);
822 error_priv->dev = dev;
824 spin_lock_irqsave(&dev_priv->error_lock, flags);
825 error_priv->error = dev_priv->first_error;
826 if (error_priv->error)
827 kref_get(&error_priv->error->ref);
828 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
830 return single_open(file, i915_error_state, error_priv);
833 static int i915_error_state_release(struct inode *inode, struct file *file)
835 struct seq_file *m = file->private_data;
836 struct i915_error_state_file_priv *error_priv = m->private;
838 if (error_priv->error)
839 kref_put(&error_priv->error->ref, i915_error_state_free);
842 return single_release(inode, file);
845 static const struct file_operations i915_error_state_fops = {
846 .owner = THIS_MODULE,
847 .open = i915_error_state_open,
849 .write = i915_error_state_write,
850 .llseek = default_llseek,
851 .release = i915_error_state_release,
854 static int i915_rstdby_delays(struct seq_file *m, void *unused)
856 struct drm_info_node *node = (struct drm_info_node *) m->private;
857 struct drm_device *dev = node->minor->dev;
858 drm_i915_private_t *dev_priv = dev->dev_private;
862 ret = mutex_lock_interruptible(&dev->struct_mutex);
866 crstanddelay = I915_READ16(CRSTANDVID);
868 mutex_unlock(&dev->struct_mutex);
870 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
875 static int i915_cur_delayinfo(struct seq_file *m, void *unused)
877 struct drm_info_node *node = (struct drm_info_node *) m->private;
878 struct drm_device *dev = node->minor->dev;
879 drm_i915_private_t *dev_priv = dev->dev_private;
883 u16 rgvswctl = I915_READ16(MEMSWCTL);
884 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
886 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
887 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
888 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
890 seq_printf(m, "Current P-state: %d\n",
891 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
892 } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
893 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
894 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
895 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
897 u32 rpupei, rpcurup, rpprevup;
898 u32 rpdownei, rpcurdown, rpprevdown;
901 /* RPSTAT1 is in the GT power well */
902 ret = mutex_lock_interruptible(&dev->struct_mutex);
906 gen6_gt_force_wake_get(dev_priv);
908 rpstat = I915_READ(GEN6_RPSTAT1);
909 rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
910 rpcurup = I915_READ(GEN6_RP_CUR_UP);
911 rpprevup = I915_READ(GEN6_RP_PREV_UP);
912 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
913 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
914 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
916 gen6_gt_force_wake_put(dev_priv);
917 mutex_unlock(&dev->struct_mutex);
919 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
920 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
921 seq_printf(m, "Render p-state ratio: %d\n",
922 (gt_perf_status & 0xff00) >> 8);
923 seq_printf(m, "Render p-state VID: %d\n",
924 gt_perf_status & 0xff);
925 seq_printf(m, "Render p-state limit: %d\n",
926 rp_state_limits & 0xff);
927 seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >>
928 GEN6_CAGF_SHIFT) * 50);
929 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
931 seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
932 GEN6_CURBSYTAVG_MASK);
933 seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
934 GEN6_CURBSYTAVG_MASK);
935 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
937 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
938 GEN6_CURBSYTAVG_MASK);
939 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
940 GEN6_CURBSYTAVG_MASK);
942 max_freq = (rp_state_cap & 0xff0000) >> 16;
943 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
946 max_freq = (rp_state_cap & 0xff00) >> 8;
947 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
950 max_freq = rp_state_cap & 0xff;
951 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
954 seq_printf(m, "no P-state info available\n");
960 static int i915_delayfreq_table(struct seq_file *m, void *unused)
962 struct drm_info_node *node = (struct drm_info_node *) m->private;
963 struct drm_device *dev = node->minor->dev;
964 drm_i915_private_t *dev_priv = dev->dev_private;
968 ret = mutex_lock_interruptible(&dev->struct_mutex);
972 for (i = 0; i < 16; i++) {
973 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
974 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
975 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
978 mutex_unlock(&dev->struct_mutex);
983 static inline int MAP_TO_MV(int map)
985 return 1250 - (map * 25);
988 static int i915_inttoext_table(struct seq_file *m, void *unused)
990 struct drm_info_node *node = (struct drm_info_node *) m->private;
991 struct drm_device *dev = node->minor->dev;
992 drm_i915_private_t *dev_priv = dev->dev_private;
996 ret = mutex_lock_interruptible(&dev->struct_mutex);
1000 for (i = 1; i <= 32; i++) {
1001 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
1002 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
1005 mutex_unlock(&dev->struct_mutex);
1010 static int ironlake_drpc_info(struct seq_file *m)
1012 struct drm_info_node *node = (struct drm_info_node *) m->private;
1013 struct drm_device *dev = node->minor->dev;
1014 drm_i915_private_t *dev_priv = dev->dev_private;
1015 u32 rgvmodectl, rstdbyctl;
1019 ret = mutex_lock_interruptible(&dev->struct_mutex);
1023 rgvmodectl = I915_READ(MEMMODECTL);
1024 rstdbyctl = I915_READ(RSTDBYCTL);
1025 crstandvid = I915_READ16(CRSTANDVID);
1027 mutex_unlock(&dev->struct_mutex);
1029 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
1031 seq_printf(m, "Boost freq: %d\n",
1032 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
1033 MEMMODE_BOOST_FREQ_SHIFT);
1034 seq_printf(m, "HW control enabled: %s\n",
1035 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
1036 seq_printf(m, "SW control enabled: %s\n",
1037 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
1038 seq_printf(m, "Gated voltage change: %s\n",
1039 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
1040 seq_printf(m, "Starting frequency: P%d\n",
1041 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
1042 seq_printf(m, "Max P-state: P%d\n",
1043 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
1044 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
1045 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
1046 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
1047 seq_printf(m, "Render standby enabled: %s\n",
1048 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
1049 seq_printf(m, "Current RS state: ");
1050 switch (rstdbyctl & RSX_STATUS_MASK) {
1052 seq_printf(m, "on\n");
1054 case RSX_STATUS_RC1:
1055 seq_printf(m, "RC1\n");
1057 case RSX_STATUS_RC1E:
1058 seq_printf(m, "RC1E\n");
1060 case RSX_STATUS_RS1:
1061 seq_printf(m, "RS1\n");
1063 case RSX_STATUS_RS2:
1064 seq_printf(m, "RS2 (RC6)\n");
1066 case RSX_STATUS_RS3:
1067 seq_printf(m, "RC3 (RC6+)\n");
1070 seq_printf(m, "unknown\n");
1077 static int gen6_drpc_info(struct seq_file *m)
1080 struct drm_info_node *node = (struct drm_info_node *) m->private;
1081 struct drm_device *dev = node->minor->dev;
1082 struct drm_i915_private *dev_priv = dev->dev_private;
1083 u32 rpmodectl1, gt_core_status, rcctl1;
1084 unsigned forcewake_count;
1088 ret = mutex_lock_interruptible(&dev->struct_mutex);
1092 spin_lock_irq(&dev_priv->gt_lock);
1093 forcewake_count = dev_priv->forcewake_count;
1094 spin_unlock_irq(&dev_priv->gt_lock);
1096 if (forcewake_count) {
1097 seq_printf(m, "RC information inaccurate because somebody "
1098 "holds a forcewake reference \n");
1100 /* NB: we cannot use forcewake, else we read the wrong values */
1101 while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
1103 seq_printf(m, "RC information accurate: %s\n", yesno(count < 51));
1106 gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
1107 trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);
1109 rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
1110 rcctl1 = I915_READ(GEN6_RC_CONTROL);
1111 mutex_unlock(&dev->struct_mutex);
1113 seq_printf(m, "Video Turbo Mode: %s\n",
1114 yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
1115 seq_printf(m, "HW control enabled: %s\n",
1116 yesno(rpmodectl1 & GEN6_RP_ENABLE));
1117 seq_printf(m, "SW control enabled: %s\n",
1118 yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
1119 GEN6_RP_MEDIA_SW_MODE));
1120 seq_printf(m, "RC1e Enabled: %s\n",
1121 yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
1122 seq_printf(m, "RC6 Enabled: %s\n",
1123 yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
1124 seq_printf(m, "Deep RC6 Enabled: %s\n",
1125 yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
1126 seq_printf(m, "Deepest RC6 Enabled: %s\n",
1127 yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));
1128 seq_printf(m, "Current RC state: ");
1129 switch (gt_core_status & GEN6_RCn_MASK) {
1131 if (gt_core_status & GEN6_CORE_CPD_STATE_MASK)
1132 seq_printf(m, "Core Power Down\n");
1134 seq_printf(m, "on\n");
1137 seq_printf(m, "RC3\n");
1140 seq_printf(m, "RC6\n");
1143 seq_printf(m, "RC7\n");
1146 seq_printf(m, "Unknown\n");
1150 seq_printf(m, "Core Power Down: %s\n",
1151 yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
1153 /* Not exactly sure what this is */
1154 seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1155 I915_READ(GEN6_GT_GFX_RC6_LOCKED));
1156 seq_printf(m, "RC6 residency since boot: %u\n",
1157 I915_READ(GEN6_GT_GFX_RC6));
1158 seq_printf(m, "RC6+ residency since boot: %u\n",
1159 I915_READ(GEN6_GT_GFX_RC6p));
1160 seq_printf(m, "RC6++ residency since boot: %u\n",
1161 I915_READ(GEN6_GT_GFX_RC6pp));
1166 static int i915_drpc_info(struct seq_file *m, void *unused)
1168 struct drm_info_node *node = (struct drm_info_node *) m->private;
1169 struct drm_device *dev = node->minor->dev;
1171 if (IS_GEN6(dev) || IS_GEN7(dev))
1172 return gen6_drpc_info(m);
1174 return ironlake_drpc_info(m);
1177 static int i915_fbc_status(struct seq_file *m, void *unused)
1179 struct drm_info_node *node = (struct drm_info_node *) m->private;
1180 struct drm_device *dev = node->minor->dev;
1181 drm_i915_private_t *dev_priv = dev->dev_private;
1183 if (!I915_HAS_FBC(dev)) {
1184 seq_printf(m, "FBC unsupported on this chipset\n");
1188 if (intel_fbc_enabled(dev)) {
1189 seq_printf(m, "FBC enabled\n");
1191 seq_printf(m, "FBC disabled: ");
1192 switch (dev_priv->no_fbc_reason) {
1194 seq_printf(m, "no outputs");
1196 case FBC_STOLEN_TOO_SMALL:
1197 seq_printf(m, "not enough stolen memory");
1199 case FBC_UNSUPPORTED_MODE:
1200 seq_printf(m, "mode not supported");
1202 case FBC_MODE_TOO_LARGE:
1203 seq_printf(m, "mode too large");
1206 seq_printf(m, "FBC unsupported on plane");
1209 seq_printf(m, "scanout buffer not tiled");
1211 case FBC_MULTIPLE_PIPES:
1212 seq_printf(m, "multiple pipes are enabled");
1214 case FBC_MODULE_PARAM:
1215 seq_printf(m, "disabled per module param (default off)");
1218 seq_printf(m, "unknown reason");
1220 seq_printf(m, "\n");
1225 static int i915_sr_status(struct seq_file *m, void *unused)
1227 struct drm_info_node *node = (struct drm_info_node *) m->private;
1228 struct drm_device *dev = node->minor->dev;
1229 drm_i915_private_t *dev_priv = dev->dev_private;
1230 bool sr_enabled = false;
1232 if (HAS_PCH_SPLIT(dev))
1233 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
1234 else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
1235 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
1236 else if (IS_I915GM(dev))
1237 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
1238 else if (IS_PINEVIEW(dev))
1239 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
1241 seq_printf(m, "self-refresh: %s\n",
1242 sr_enabled ? "enabled" : "disabled");
1247 static int i915_emon_status(struct seq_file *m, void *unused)
1249 struct drm_info_node *node = (struct drm_info_node *) m->private;
1250 struct drm_device *dev = node->minor->dev;
1251 drm_i915_private_t *dev_priv = dev->dev_private;
1252 unsigned long temp, chipset, gfx;
1258 ret = mutex_lock_interruptible(&dev->struct_mutex);
1262 temp = i915_mch_val(dev_priv);
1263 chipset = i915_chipset_val(dev_priv);
1264 gfx = i915_gfx_val(dev_priv);
1265 mutex_unlock(&dev->struct_mutex);
1267 seq_printf(m, "GMCH temp: %ld\n", temp);
1268 seq_printf(m, "Chipset power: %ld\n", chipset);
1269 seq_printf(m, "GFX power: %ld\n", gfx);
1270 seq_printf(m, "Total power: %ld\n", chipset + gfx);
1275 static int i915_ring_freq_table(struct seq_file *m, void *unused)
1277 struct drm_info_node *node = (struct drm_info_node *) m->private;
1278 struct drm_device *dev = node->minor->dev;
1279 drm_i915_private_t *dev_priv = dev->dev_private;
1281 int gpu_freq, ia_freq;
1283 if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
1284 seq_printf(m, "unsupported on this chipset\n");
1288 ret = mutex_lock_interruptible(&dev->struct_mutex);
1292 seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n");
1294 for (gpu_freq = dev_priv->min_delay; gpu_freq <= dev_priv->max_delay;
1296 I915_WRITE(GEN6_PCODE_DATA, gpu_freq);
1297 I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY |
1298 GEN6_PCODE_READ_MIN_FREQ_TABLE);
1299 if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &
1300 GEN6_PCODE_READY) == 0, 10)) {
1301 DRM_ERROR("pcode read of freq table timed out\n");
1304 ia_freq = I915_READ(GEN6_PCODE_DATA);
1305 seq_printf(m, "%d\t\t%d\n", gpu_freq * 50, ia_freq * 100);
1308 mutex_unlock(&dev->struct_mutex);
1313 static int i915_gfxec(struct seq_file *m, void *unused)
1315 struct drm_info_node *node = (struct drm_info_node *) m->private;
1316 struct drm_device *dev = node->minor->dev;
1317 drm_i915_private_t *dev_priv = dev->dev_private;
1320 ret = mutex_lock_interruptible(&dev->struct_mutex);
1324 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1326 mutex_unlock(&dev->struct_mutex);
1331 static int i915_opregion(struct seq_file *m, void *unused)
1333 struct drm_info_node *node = (struct drm_info_node *) m->private;
1334 struct drm_device *dev = node->minor->dev;
1335 drm_i915_private_t *dev_priv = dev->dev_private;
1336 struct intel_opregion *opregion = &dev_priv->opregion;
1337 void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL);
1343 ret = mutex_lock_interruptible(&dev->struct_mutex);
1347 if (opregion->header) {
1348 memcpy_fromio(data, opregion->header, OPREGION_SIZE);
1349 seq_write(m, data, OPREGION_SIZE);
1352 mutex_unlock(&dev->struct_mutex);
1359 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1361 struct drm_info_node *node = (struct drm_info_node *) m->private;
1362 struct drm_device *dev = node->minor->dev;
1363 drm_i915_private_t *dev_priv = dev->dev_private;
1364 struct intel_fbdev *ifbdev;
1365 struct intel_framebuffer *fb;
1368 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1372 ifbdev = dev_priv->fbdev;
1373 fb = to_intel_framebuffer(ifbdev->helper.fb);
1375 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
1379 fb->base.bits_per_pixel);
1380 describe_obj(m, fb->obj);
1381 seq_printf(m, "\n");
1383 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1384 if (&fb->base == ifbdev->helper.fb)
1387 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
1391 fb->base.bits_per_pixel);
1392 describe_obj(m, fb->obj);
1393 seq_printf(m, "\n");
1396 mutex_unlock(&dev->mode_config.mutex);
1401 static int i915_context_status(struct seq_file *m, void *unused)
1403 struct drm_info_node *node = (struct drm_info_node *) m->private;
1404 struct drm_device *dev = node->minor->dev;
1405 drm_i915_private_t *dev_priv = dev->dev_private;
1408 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1412 if (dev_priv->pwrctx) {
1413 seq_printf(m, "power context ");
1414 describe_obj(m, dev_priv->pwrctx);
1415 seq_printf(m, "\n");
1418 if (dev_priv->renderctx) {
1419 seq_printf(m, "render context ");
1420 describe_obj(m, dev_priv->renderctx);
1421 seq_printf(m, "\n");
1424 mutex_unlock(&dev->mode_config.mutex);
1429 static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
1431 struct drm_info_node *node = (struct drm_info_node *) m->private;
1432 struct drm_device *dev = node->minor->dev;
1433 struct drm_i915_private *dev_priv = dev->dev_private;
1434 unsigned forcewake_count;
1436 spin_lock_irq(&dev_priv->gt_lock);
1437 forcewake_count = dev_priv->forcewake_count;
1438 spin_unlock_irq(&dev_priv->gt_lock);
1440 seq_printf(m, "forcewake count = %u\n", forcewake_count);
1445 static const char *swizzle_string(unsigned swizzle)
1448 case I915_BIT_6_SWIZZLE_NONE:
1450 case I915_BIT_6_SWIZZLE_9:
1452 case I915_BIT_6_SWIZZLE_9_10:
1453 return "bit9/bit10";
1454 case I915_BIT_6_SWIZZLE_9_11:
1455 return "bit9/bit11";
1456 case I915_BIT_6_SWIZZLE_9_10_11:
1457 return "bit9/bit10/bit11";
1458 case I915_BIT_6_SWIZZLE_9_17:
1459 return "bit9/bit17";
1460 case I915_BIT_6_SWIZZLE_9_10_17:
1461 return "bit9/bit10/bit17";
1462 case I915_BIT_6_SWIZZLE_UNKNOWN:
1469 static int i915_swizzle_info(struct seq_file *m, void *data)
1471 struct drm_info_node *node = (struct drm_info_node *) m->private;
1472 struct drm_device *dev = node->minor->dev;
1473 struct drm_i915_private *dev_priv = dev->dev_private;
1475 mutex_lock(&dev->struct_mutex);
1476 seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
1477 swizzle_string(dev_priv->mm.bit_6_swizzle_x));
1478 seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
1479 swizzle_string(dev_priv->mm.bit_6_swizzle_y));
1481 if (IS_GEN3(dev) || IS_GEN4(dev)) {
1482 seq_printf(m, "DDC = 0x%08x\n",
1484 seq_printf(m, "C0DRB3 = 0x%04x\n",
1485 I915_READ16(C0DRB3));
1486 seq_printf(m, "C1DRB3 = 0x%04x\n",
1487 I915_READ16(C1DRB3));
1488 } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
1489 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
1490 I915_READ(MAD_DIMM_C0));
1491 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
1492 I915_READ(MAD_DIMM_C1));
1493 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n",
1494 I915_READ(MAD_DIMM_C2));
1495 seq_printf(m, "TILECTL = 0x%08x\n",
1496 I915_READ(TILECTL));
1497 seq_printf(m, "ARB_MODE = 0x%08x\n",
1498 I915_READ(ARB_MODE));
1499 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n",
1500 I915_READ(DISP_ARB_CTL));
1502 mutex_unlock(&dev->struct_mutex);
1507 static int i915_ppgtt_info(struct seq_file *m, void *data)
1509 struct drm_info_node *node = (struct drm_info_node *) m->private;
1510 struct drm_device *dev = node->minor->dev;
1511 struct drm_i915_private *dev_priv = dev->dev_private;
1512 struct intel_ring_buffer *ring;
1516 ret = mutex_lock_interruptible(&dev->struct_mutex);
1519 if (INTEL_INFO(dev)->gen == 6)
1520 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));
1522 for (i = 0; i < I915_NUM_RINGS; i++) {
1523 ring = &dev_priv->ring[i];
1525 seq_printf(m, "%s\n", ring->name);
1526 if (INTEL_INFO(dev)->gen == 7)
1527 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring)));
1528 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring)));
1529 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring)));
1530 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring)));
1532 if (dev_priv->mm.aliasing_ppgtt) {
1533 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
1535 seq_printf(m, "aliasing PPGTT:\n");
1536 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset);
1538 seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
1539 mutex_unlock(&dev->struct_mutex);
1544 static int i915_dpio_info(struct seq_file *m, void *data)
1546 struct drm_info_node *node = (struct drm_info_node *) m->private;
1547 struct drm_device *dev = node->minor->dev;
1548 struct drm_i915_private *dev_priv = dev->dev_private;
1552 if (!IS_VALLEYVIEW(dev)) {
1553 seq_printf(m, "unsupported\n");
1557 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1561 seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));
1563 seq_printf(m, "DPIO_DIV_A: 0x%08x\n",
1564 intel_dpio_read(dev_priv, _DPIO_DIV_A));
1565 seq_printf(m, "DPIO_DIV_B: 0x%08x\n",
1566 intel_dpio_read(dev_priv, _DPIO_DIV_B));
1568 seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",
1569 intel_dpio_read(dev_priv, _DPIO_REFSFR_A));
1570 seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",
1571 intel_dpio_read(dev_priv, _DPIO_REFSFR_B));
1573 seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",
1574 intel_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
1575 seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
1576 intel_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
1578 seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",
1579 intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
1580 seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",
1581 intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));
1583 seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1584 intel_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
1586 mutex_unlock(&dev->mode_config.mutex);
1592 i915_wedged_read(struct file *filp,
1597 struct drm_device *dev = filp->private_data;
1598 drm_i915_private_t *dev_priv = dev->dev_private;
1602 len = snprintf(buf, sizeof(buf),
1604 atomic_read(&dev_priv->mm.wedged));
1606 if (len > sizeof(buf))
1609 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1613 i915_wedged_write(struct file *filp,
1614 const char __user *ubuf,
1618 struct drm_device *dev = filp->private_data;
1623 if (cnt > sizeof(buf) - 1)
1626 if (copy_from_user(buf, ubuf, cnt))
1630 val = simple_strtoul(buf, NULL, 0);
1633 DRM_INFO("Manually setting wedged to %d\n", val);
1634 i915_handle_error(dev, val);
1639 static const struct file_operations i915_wedged_fops = {
1640 .owner = THIS_MODULE,
1641 .open = simple_open,
1642 .read = i915_wedged_read,
1643 .write = i915_wedged_write,
1644 .llseek = default_llseek,
1648 i915_ring_stop_read(struct file *filp,
1653 struct drm_device *dev = filp->private_data;
1654 drm_i915_private_t *dev_priv = dev->dev_private;
1658 len = snprintf(buf, sizeof(buf),
1659 "0x%08x\n", dev_priv->stop_rings);
1661 if (len > sizeof(buf))
1664 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1668 i915_ring_stop_write(struct file *filp,
1669 const char __user *ubuf,
1673 struct drm_device *dev = filp->private_data;
1674 struct drm_i915_private *dev_priv = dev->dev_private;
1679 if (cnt > sizeof(buf) - 1)
1682 if (copy_from_user(buf, ubuf, cnt))
1686 val = simple_strtoul(buf, NULL, 0);
1689 DRM_DEBUG_DRIVER("Stopping rings 0x%08x\n", val);
1691 mutex_lock(&dev->struct_mutex);
1692 dev_priv->stop_rings = val;
1693 mutex_unlock(&dev->struct_mutex);
1698 static const struct file_operations i915_ring_stop_fops = {
1699 .owner = THIS_MODULE,
1700 .open = simple_open,
1701 .read = i915_ring_stop_read,
1702 .write = i915_ring_stop_write,
1703 .llseek = default_llseek,
1707 i915_max_freq_read(struct file *filp,
1712 struct drm_device *dev = filp->private_data;
1713 drm_i915_private_t *dev_priv = dev->dev_private;
1717 len = snprintf(buf, sizeof(buf),
1718 "max freq: %d\n", dev_priv->max_delay * 50);
1720 if (len > sizeof(buf))
1723 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1727 i915_max_freq_write(struct file *filp,
1728 const char __user *ubuf,
1732 struct drm_device *dev = filp->private_data;
1733 struct drm_i915_private *dev_priv = dev->dev_private;
1738 if (cnt > sizeof(buf) - 1)
1741 if (copy_from_user(buf, ubuf, cnt))
1745 val = simple_strtoul(buf, NULL, 0);
1748 DRM_DEBUG_DRIVER("Manually setting max freq to %d\n", val);
1751 * Turbo will still be enabled, but won't go above the set value.
1753 dev_priv->max_delay = val / 50;
1755 gen6_set_rps(dev, val / 50);
1760 static const struct file_operations i915_max_freq_fops = {
1761 .owner = THIS_MODULE,
1762 .open = simple_open,
1763 .read = i915_max_freq_read,
1764 .write = i915_max_freq_write,
1765 .llseek = default_llseek,
1769 i915_min_freq_read(struct file *filp, char __user *ubuf, size_t max,
1772 struct drm_device *dev = filp->private_data;
1773 drm_i915_private_t *dev_priv = dev->dev_private;
1777 len = snprintf(buf, sizeof(buf),
1778 "min freq: %d\n", dev_priv->min_delay * 50);
1780 if (len > sizeof(buf))
1783 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1787 i915_min_freq_write(struct file *filp, const char __user *ubuf, size_t cnt,
1790 struct drm_device *dev = filp->private_data;
1791 struct drm_i915_private *dev_priv = dev->dev_private;
1796 if (cnt > sizeof(buf) - 1)
1799 if (copy_from_user(buf, ubuf, cnt))
1803 val = simple_strtoul(buf, NULL, 0);
1806 DRM_DEBUG_DRIVER("Manually setting min freq to %d\n", val);
1809 * Turbo will still be enabled, but won't go below the set value.
1811 dev_priv->min_delay = val / 50;
1813 gen6_set_rps(dev, val / 50);
1818 static const struct file_operations i915_min_freq_fops = {
1819 .owner = THIS_MODULE,
1820 .open = simple_open,
1821 .read = i915_min_freq_read,
1822 .write = i915_min_freq_write,
1823 .llseek = default_llseek,
1827 i915_cache_sharing_read(struct file *filp,
1832 struct drm_device *dev = filp->private_data;
1833 drm_i915_private_t *dev_priv = dev->dev_private;
1838 mutex_lock(&dev_priv->dev->struct_mutex);
1839 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1840 mutex_unlock(&dev_priv->dev->struct_mutex);
1842 len = snprintf(buf, sizeof(buf),
1843 "%d\n", (snpcr & GEN6_MBC_SNPCR_MASK) >>
1844 GEN6_MBC_SNPCR_SHIFT);
1846 if (len > sizeof(buf))
1849 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1853 i915_cache_sharing_write(struct file *filp,
1854 const char __user *ubuf,
1858 struct drm_device *dev = filp->private_data;
1859 struct drm_i915_private *dev_priv = dev->dev_private;
1865 if (cnt > sizeof(buf) - 1)
1868 if (copy_from_user(buf, ubuf, cnt))
1872 val = simple_strtoul(buf, NULL, 0);
1875 if (val < 0 || val > 3)
1878 DRM_DEBUG_DRIVER("Manually setting uncore sharing to %d\n", val);
1880 /* Update the cache sharing policy here as well */
1881 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1882 snpcr &= ~GEN6_MBC_SNPCR_MASK;
1883 snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
1884 I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);
1889 static const struct file_operations i915_cache_sharing_fops = {
1890 .owner = THIS_MODULE,
1891 .open = simple_open,
1892 .read = i915_cache_sharing_read,
1893 .write = i915_cache_sharing_write,
1894 .llseek = default_llseek,
1897 /* As the drm_debugfs_init() routines are called before dev->dev_private is
1898 * allocated we need to hook into the minor for release. */
1900 drm_add_fake_info_node(struct drm_minor *minor,
1904 struct drm_info_node *node;
1906 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
1908 debugfs_remove(ent);
1912 node->minor = minor;
1914 node->info_ent = (void *) key;
1916 mutex_lock(&minor->debugfs_lock);
1917 list_add(&node->list, &minor->debugfs_list);
1918 mutex_unlock(&minor->debugfs_lock);
1923 static int i915_forcewake_open(struct inode *inode, struct file *file)
1925 struct drm_device *dev = inode->i_private;
1926 struct drm_i915_private *dev_priv = dev->dev_private;
1929 if (INTEL_INFO(dev)->gen < 6)
1932 ret = mutex_lock_interruptible(&dev->struct_mutex);
1935 gen6_gt_force_wake_get(dev_priv);
1936 mutex_unlock(&dev->struct_mutex);
1941 static int i915_forcewake_release(struct inode *inode, struct file *file)
1943 struct drm_device *dev = inode->i_private;
1944 struct drm_i915_private *dev_priv = dev->dev_private;
1946 if (INTEL_INFO(dev)->gen < 6)
1950 * It's bad that we can potentially hang userspace if struct_mutex gets
1951 * forever stuck. However, if we cannot acquire this lock it means that
1952 * almost certainly the driver has hung, is not unload-able. Therefore
1953 * hanging here is probably a minor inconvenience not to be seen my
1954 * almost every user.
1956 mutex_lock(&dev->struct_mutex);
1957 gen6_gt_force_wake_put(dev_priv);
1958 mutex_unlock(&dev->struct_mutex);
1963 static const struct file_operations i915_forcewake_fops = {
1964 .owner = THIS_MODULE,
1965 .open = i915_forcewake_open,
1966 .release = i915_forcewake_release,
1969 static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
1971 struct drm_device *dev = minor->dev;
1974 ent = debugfs_create_file("i915_forcewake_user",
1977 &i915_forcewake_fops);
1979 return PTR_ERR(ent);
1981 return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
1984 static int i915_debugfs_create(struct dentry *root,
1985 struct drm_minor *minor,
1987 const struct file_operations *fops)
1989 struct drm_device *dev = minor->dev;
1992 ent = debugfs_create_file(name,
1997 return PTR_ERR(ent);
1999 return drm_add_fake_info_node(minor, ent, fops);
2002 static struct drm_info_list i915_debugfs_list[] = {
2003 {"i915_capabilities", i915_capabilities, 0},
2004 {"i915_gem_objects", i915_gem_object_info, 0},
2005 {"i915_gem_gtt", i915_gem_gtt_info, 0},
2006 {"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST},
2007 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
2008 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
2009 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
2010 {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
2011 {"i915_gem_request", i915_gem_request_info, 0},
2012 {"i915_gem_seqno", i915_gem_seqno_info, 0},
2013 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2014 {"i915_gem_interrupt", i915_interrupt_info, 0},
2015 {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
2016 {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
2017 {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
2018 {"i915_rstdby_delays", i915_rstdby_delays, 0},
2019 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
2020 {"i915_delayfreq_table", i915_delayfreq_table, 0},
2021 {"i915_inttoext_table", i915_inttoext_table, 0},
2022 {"i915_drpc_info", i915_drpc_info, 0},
2023 {"i915_emon_status", i915_emon_status, 0},
2024 {"i915_ring_freq_table", i915_ring_freq_table, 0},
2025 {"i915_gfxec", i915_gfxec, 0},
2026 {"i915_fbc_status", i915_fbc_status, 0},
2027 {"i915_sr_status", i915_sr_status, 0},
2028 {"i915_opregion", i915_opregion, 0},
2029 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
2030 {"i915_context_status", i915_context_status, 0},
2031 {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
2032 {"i915_swizzle_info", i915_swizzle_info, 0},
2033 {"i915_ppgtt_info", i915_ppgtt_info, 0},
2034 {"i915_dpio", i915_dpio_info, 0},
2036 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2038 int i915_debugfs_init(struct drm_minor *minor)
2042 ret = i915_debugfs_create(minor->debugfs_root, minor,
2048 ret = i915_forcewake_create(minor->debugfs_root, minor);
2052 ret = i915_debugfs_create(minor->debugfs_root, minor,
2054 &i915_max_freq_fops);
2058 ret = i915_debugfs_create(minor->debugfs_root, minor,
2060 &i915_min_freq_fops);
2064 ret = i915_debugfs_create(minor->debugfs_root, minor,
2065 "i915_cache_sharing",
2066 &i915_cache_sharing_fops);
2069 ret = i915_debugfs_create(minor->debugfs_root, minor,
2071 &i915_ring_stop_fops);
2075 ret = i915_debugfs_create(minor->debugfs_root, minor,
2077 &i915_error_state_fops);
2081 return drm_debugfs_create_files(i915_debugfs_list,
2082 I915_DEBUGFS_ENTRIES,
2083 minor->debugfs_root, minor);
2086 void i915_debugfs_cleanup(struct drm_minor *minor)
2088 drm_debugfs_remove_files(i915_debugfs_list,
2089 I915_DEBUGFS_ENTRIES, minor);
2090 drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
2092 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
2094 drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
2096 drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops,
2098 drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
2100 drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops,
2102 drm_debugfs_remove_files((struct drm_info_list *) &i915_error_state_fops,
2106 #endif /* CONFIG_DEBUG_FS */