drivers/gpu/drm/i915/i915_debugfs.c

   1 /*
   2  * Copyright © 2008 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *    Keith Packard <keithp@keithp.com>
  26  *
  27  */
  28
  29 #include <linux/seq_file.h>
  30 #include <linux/debugfs.h>
  31 #include <linux/slab.h>
  32 #include <linux/export.h>
  33 #include <generated/utsrelease.h>
  34 #include <drm/drmP.h>
  35 #include "intel_drv.h"
  36 #include "intel_ringbuffer.h"
  37 #include <drm/i915_drm.h>
  38 #include "i915_drv.h"
  39
  40 #define DRM_I915_RING_DEBUG 1
  41
  42
  43 #if defined(CONFIG_DEBUG_FS)
  44
  45 enum {
  46         ACTIVE_LIST,
  47         INACTIVE_LIST,
  48         PINNED_LIST,
  49 };
  50
  51 static const char *yesno(int v)
  52 {
  53         return v ? "yes" : "no";
  54 }
  55
  56 static int i915_capabilities(struct seq_file *m, void *data)
  57 {
  58         struct drm_info_node *node = (struct drm_info_node *) m->private;
  59         struct drm_device *dev = node->minor->dev;
  60         const struct intel_device_info *info = INTEL_INFO(dev);
  61
  62         seq_printf(m, "gen: %d\n", info->gen);
  63         seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
  64 #define PRINT_FLAG(x)  seq_printf(m, #x ": %s\n", yesno(info->x))
  65 #define SEP_SEMICOLON ;
  66         DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG, SEP_SEMICOLON);
  67 #undef PRINT_FLAG
  68 #undef SEP_SEMICOLON
  69
  70         return 0;
  71 }
  72
  73 static const char *get_pin_flag(struct drm_i915_gem_object *obj)
  74 {
  75         if (obj->user_pin_count > 0)
  76                 return "P";
  77         else if (obj->pin_count > 0)
  78                 return "p";
  79         else
  80                 return " ";
  81 }
  82
  83 static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
  84 {
  85         switch (obj->tiling_mode) {
  86         default:
  87         case I915_TILING_NONE: return " ";
  88         case I915_TILING_X: return "X";
  89         case I915_TILING_Y: return "Y";
  90         }
  91 }
  92
  93 static const char *cache_level_str(int type)
  94 {
  95         switch (type) {
  96         case I915_CACHE_NONE: return " uncached";
  97         case I915_CACHE_LLC: return " snooped (LLC)";
  98         case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
  99         default: return "";
 100         }
 101 }
 102
 103 static void
 104 describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
 105 {
 106         seq_printf(m, "%pK: %s%s %8zdKiB %02x %02x %d %d %d%s%s%s",
 107                    &obj->base,
 108                    get_pin_flag(obj),
 109                    get_tiling_flag(obj),
 110                    obj->base.size / 1024,
 111                    obj->base.read_domains,
 112                    obj->base.write_domain,
 113                    obj->last_read_seqno,
 114                    obj->last_write_seqno,
 115                    obj->last_fenced_seqno,
 116                    cache_level_str(obj->cache_level),
 117                    obj->dirty ? " dirty" : "",
 118                    obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
 119         if (obj->base.name)
 120                 seq_printf(m, " (name: %d)", obj->base.name);
 121         if (obj->pin_count)
 122                 seq_printf(m, " (pinned x %d)", obj->pin_count);
 123         if (obj->fence_reg != I915_FENCE_REG_NONE)
 124                 seq_printf(m, " (fence: %d)", obj->fence_reg);
 125         if (obj->gtt_space != NULL)
 126                 seq_printf(m, " (gtt offset: %08x, size: %08x)",
 127                            obj->gtt_offset, (unsigned int)obj->gtt_space->size);
 128         if (obj->stolen)
 129                 seq_printf(m, " (stolen: %08lx)", obj->stolen->start);
 130         if (obj->pin_mappable || obj->fault_mappable) {
 131                 char s[3], *t = s;
 132                 if (obj->pin_mappable)
 133                         *t++ = 'p';
 134                 if (obj->fault_mappable)
 135                         *t++ = 'f';
 136                 *t = '\0';
 137                 seq_printf(m, " (%s mappable)", s);
 138         }
 139         if (obj->ring != NULL)
 140                 seq_printf(m, " (%s)", obj->ring->name);
 141 }
 142
 143 static int i915_gem_object_list_info(struct seq_file *m, void *data)
 144 {
 145         struct drm_info_node *node = (struct drm_info_node *) m->private;
 146         uintptr_t list = (uintptr_t) node->info_ent->data;
 147         struct list_head *head;
 148         struct drm_device *dev = node->minor->dev;
 149         drm_i915_private_t *dev_priv = dev->dev_private;
 150         struct drm_i915_gem_object *obj;
 151         size_t total_obj_size, total_gtt_size;
 152         int count, ret;
 153
 154         ret = mutex_lock_interruptible(&dev->struct_mutex);
 155         if (ret)
 156                 return ret;
 157
 158         switch (list) {
 159         case ACTIVE_LIST:
 160                 seq_printf(m, "Active:\n");
 161                 head = &dev_priv->mm.active_list;
 162                 break;
 163         case INACTIVE_LIST:
 164                 seq_printf(m, "Inactive:\n");
 165                 head = &dev_priv->mm.inactive_list;
 166                 break;
 167         default:
 168                 mutex_unlock(&dev->struct_mutex);
 169                 return -EINVAL;
 170         }
 171
 172         total_obj_size = total_gtt_size = count = 0;
 173         list_for_each_entry(obj, head, mm_list) {
 174                 seq_printf(m, "   ");
 175                 describe_obj(m, obj);
 176                 seq_printf(m, "\n");
 177                 total_obj_size += obj->base.size;
 178                 total_gtt_size += obj->gtt_space->size;
 179                 count++;
 180         }
 181         mutex_unlock(&dev->struct_mutex);
 182
 183         seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
 184                    count, total_obj_size, total_gtt_size);
 185         return 0;
 186 }
 187
 188 #define count_objects(list, member) do { \
 189         list_for_each_entry(obj, list, member) { \
 190                 size += obj->gtt_space->size; \
 191                 ++count; \
 192                 if (obj->map_and_fenceable) { \
 193                         mappable_size += obj->gtt_space->size; \
 194                         ++mappable_count; \
 195                 } \
 196         } \
 197 } while (0)
 198
 199 struct file_stats {
 200         int count;
 201         size_t total, active, inactive, unbound;
 202 };
 203
 204 static int per_file_stats(int id, void *ptr, void *data)
 205 {
 206         struct drm_i915_gem_object *obj = ptr;
 207         struct file_stats *stats = data;
 208
 209         stats->count++;
 210         stats->total += obj->base.size;
 211
 212         if (obj->gtt_space) {
 213                 if (!list_empty(&obj->ring_list))
 214                         stats->active += obj->base.size;
 215                 else
 216                         stats->inactive += obj->base.size;
 217         } else {
 218                 if (!list_empty(&obj->global_list))
 219                         stats->unbound += obj->base.size;
 220         }
 221
 222         return 0;
 223 }
 224
 225 static int i915_gem_object_info(struct seq_file *m, void* data)
 226 {
 227         struct drm_info_node *node = (struct drm_info_node *) m->private;
 228         struct drm_device *dev = node->minor->dev;
 229         struct drm_i915_private *dev_priv = dev->dev_private;
 230         u32 count, mappable_count, purgeable_count;
 231         size_t size, mappable_size, purgeable_size;
 232         struct drm_i915_gem_object *obj;
 233         struct drm_file *file;
 234         int ret;
 235
 236         ret = mutex_lock_interruptible(&dev->struct_mutex);
 237         if (ret)
 238                 return ret;
 239
 240         seq_printf(m, "%u objects, %zu bytes\n",
 241                    dev_priv->mm.object_count,
 242                    dev_priv->mm.object_memory);
 243
 244         size = count = mappable_size = mappable_count = 0;
 245         count_objects(&dev_priv->mm.bound_list, global_list);
 246         seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
 247                    count, mappable_count, size, mappable_size);
 248
 249         size = count = mappable_size = mappable_count = 0;
 250         count_objects(&dev_priv->mm.active_list, mm_list);
 251         seq_printf(m, "  %u [%u] active objects, %zu [%zu] bytes\n",
 252                    count, mappable_count, size, mappable_size);
 253
 254         size = count = mappable_size = mappable_count = 0;
 255         count_objects(&dev_priv->mm.inactive_list, mm_list);
 256         seq_printf(m, "  %u [%u] inactive objects, %zu [%zu] bytes\n",
 257                    count, mappable_count, size, mappable_size);
 258
 259         size = count = purgeable_size = purgeable_count = 0;
 260         list_for_each_entry(obj, &dev_priv->mm.unbound_list, global_list) {
 261                 size += obj->base.size, ++count;
 262                 if (obj->madv == I915_MADV_DONTNEED)
 263                         purgeable_size += obj->base.size, ++purgeable_count;
 264         }
 265         seq_printf(m, "%u unbound objects, %zu bytes\n", count, size);
 266
 267         size = count = mappable_size = mappable_count = 0;
 268         list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
 269                 if (obj->fault_mappable) {
 270                         size += obj->gtt_space->size;
 271                         ++count;
 272                 }
 273                 if (obj->pin_mappable) {
 274                         mappable_size += obj->gtt_space->size;
 275                         ++mappable_count;
 276                 }
 277                 if (obj->madv == I915_MADV_DONTNEED) {
 278                         purgeable_size += obj->base.size;
 279                         ++purgeable_count;
 280                 }
 281         }
 282         seq_printf(m, "%u purgeable objects, %zu bytes\n",
 283                    purgeable_count, purgeable_size);
 284         seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
 285                    mappable_count, mappable_size);
 286         seq_printf(m, "%u fault mappable objects, %zu bytes\n",
 287                    count, size);
 288
 289         seq_printf(m, "%zu [%lu] gtt total\n",
 290                    dev_priv->gtt.total,
 291                    dev_priv->gtt.mappable_end - dev_priv->gtt.start);
 292
 293         seq_printf(m, "\n");
 294         list_for_each_entry_reverse(file, &dev->filelist, lhead) {
 295                 struct file_stats stats;
 296
 297                 memset(&stats, 0, sizeof(stats));
 298                 idr_for_each(&file->object_idr, per_file_stats, &stats);
 299                 seq_printf(m, "%s: %u objects, %zu bytes (%zu active, %zu inactive, %zu unbound)\n",
 300                            get_pid_task(file->pid, PIDTYPE_PID)->comm,
 301                            stats.count,
 302                            stats.total,
 303                            stats.active,
 304                            stats.inactive,
 305                            stats.unbound);
 306         }
 307
 308         mutex_unlock(&dev->struct_mutex);
 309
 310         return 0;
 311 }
 312
 313 static int i915_gem_gtt_info(struct seq_file *m, void* data)
 314 {
 315         struct drm_info_node *node = (struct drm_info_node *) m->private;
 316         struct drm_device *dev = node->minor->dev;
 317         uintptr_t list = (uintptr_t) node->info_ent->data;
 318         struct drm_i915_private *dev_priv = dev->dev_private;
 319         struct drm_i915_gem_object *obj;
 320         size_t total_obj_size, total_gtt_size;
 321         int count, ret;
 322
 323         ret = mutex_lock_interruptible(&dev->struct_mutex);
 324         if (ret)
 325                 return ret;
 326
 327         total_obj_size = total_gtt_size = count = 0;
 328         list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
 329                 if (list == PINNED_LIST && obj->pin_count == 0)
 330                         continue;
 331
 332                 seq_printf(m, "   ");
 333                 describe_obj(m, obj);
 334                 seq_printf(m, "\n");
 335                 total_obj_size += obj->base.size;
 336                 total_gtt_size += obj->gtt_space->size;
 337                 count++;
 338         }
 339
 340         mutex_unlock(&dev->struct_mutex);
 341
 342         seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
 343                    count, total_obj_size, total_gtt_size);
 344
 345         return 0;
 346 }
 347
 348 static int i915_gem_pageflip_info(struct seq_file *m, void *data)
 349 {
 350         struct drm_info_node *node = (struct drm_info_node *) m->private;
 351         struct drm_device *dev = node->minor->dev;
 352         unsigned long flags;
 353         struct intel_crtc *crtc;
 354
 355         list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
 356                 const char pipe = pipe_name(crtc->pipe);
 357                 const char plane = plane_name(crtc->plane);
 358                 struct intel_unpin_work *work;
 359
 360                 spin_lock_irqsave(&dev->event_lock, flags);
 361                 work = crtc->unpin_work;
 362                 if (work == NULL) {
 363                         seq_printf(m, "No flip due on pipe %c (plane %c)\n",
 364                                    pipe, plane);
 365                 } else {
 366                         if (atomic_read(&work->pending) < INTEL_FLIP_COMPLETE) {
 367                                 seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
 368                                            pipe, plane);
 369                         } else {
 370                                 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
 371                                            pipe, plane);
 372                         }
 373                         if (work->enable_stall_check)
 374                                 seq_printf(m, "Stall check enabled, ");
 375                         else
 376                                 seq_printf(m, "Stall check waiting for page flip ioctl, ");
 377                         seq_printf(m, "%d prepares\n", atomic_read(&work->pending));
 378
 379                         if (work->old_fb_obj) {
 380                                 struct drm_i915_gem_object *obj = work->old_fb_obj;
 381                                 if (obj)
 382                                         seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
 383                         }
 384                         if (work->pending_flip_obj) {
 385                                 struct drm_i915_gem_object *obj = work->pending_flip_obj;
 386                                 if (obj)
 387                                         seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
 388                         }
 389                 }
 390                 spin_unlock_irqrestore(&dev->event_lock, flags);
 391         }
 392
 393         return 0;
 394 }
 395
 396 static int i915_gem_request_info(struct seq_file *m, void *data)
 397 {
 398         struct drm_info_node *node = (struct drm_info_node *) m->private;
 399         struct drm_device *dev = node->minor->dev;
 400         drm_i915_private_t *dev_priv = dev->dev_private;
 401         struct intel_ring_buffer *ring;
 402         struct drm_i915_gem_request *gem_request;
 403         int ret, count, i;
 404
 405         ret = mutex_lock_interruptible(&dev->struct_mutex);
 406         if (ret)
 407                 return ret;
 408
 409         count = 0;
 410         for_each_ring(ring, dev_priv, i) {
 411                 if (list_empty(&ring->request_list))
 412                         continue;
 413
 414                 seq_printf(m, "%s requests:\n", ring->name);
 415                 list_for_each_entry(gem_request,
 416                                     &ring->request_list,
 417                                     list) {
 418                         seq_printf(m, "    %d @ %d\n",
 419                                    gem_request->seqno,
 420                                    (int) (jiffies - gem_request->emitted_jiffies));
 421                 }
 422                 count++;
 423         }
 424         mutex_unlock(&dev->struct_mutex);
 425
 426         if (count == 0)
 427                 seq_printf(m, "No requests\n");
 428
 429         return 0;
 430 }
 431
 432 static void i915_ring_seqno_info(struct seq_file *m,
 433                                  struct intel_ring_buffer *ring)
 434 {
 435         if (ring->get_seqno) {
 436                 seq_printf(m, "Current sequence (%s): %u\n",
 437                            ring->name, ring->get_seqno(ring, false));
 438         }
 439 }
 440
 441 static int i915_gem_seqno_info(struct seq_file *m, void *data)
 442 {
 443         struct drm_info_node *node = (struct drm_info_node *) m->private;
 444         struct drm_device *dev = node->minor->dev;
 445         drm_i915_private_t *dev_priv = dev->dev_private;
 446         struct intel_ring_buffer *ring;
 447         int ret, i;
 448
 449         ret = mutex_lock_interruptible(&dev->struct_mutex);
 450         if (ret)
 451                 return ret;
 452
 453         for_each_ring(ring, dev_priv, i)
 454                 i915_ring_seqno_info(m, ring);
 455
 456         mutex_unlock(&dev->struct_mutex);
 457
 458         return 0;
 459 }
 460
 461
 462 static int i915_interrupt_info(struct seq_file *m, void *data)
 463 {
 464         struct drm_info_node *node = (struct drm_info_node *) m->private;
 465         struct drm_device *dev = node->minor->dev;
 466         drm_i915_private_t *dev_priv = dev->dev_private;
 467         struct intel_ring_buffer *ring;
 468         int ret, i, pipe;
 469
 470         ret = mutex_lock_interruptible(&dev->struct_mutex);
 471         if (ret)
 472                 return ret;
 473
 474         if (IS_VALLEYVIEW(dev)) {
 475                 seq_printf(m, "Display IER:\t%08x\n",
 476                            I915_READ(VLV_IER));
 477                 seq_printf(m, "Display IIR:\t%08x\n",
 478                            I915_READ(VLV_IIR));
 479                 seq_printf(m, "Display IIR_RW:\t%08x\n",
 480                            I915_READ(VLV_IIR_RW));
 481                 seq_printf(m, "Display IMR:\t%08x\n",
 482                            I915_READ(VLV_IMR));
 483                 for_each_pipe(pipe)
 484                         seq_printf(m, "Pipe %c stat:\t%08x\n",
 485                                    pipe_name(pipe),
 486                                    I915_READ(PIPESTAT(pipe)));
 487
 488                 seq_printf(m, "Master IER:\t%08x\n",
 489                            I915_READ(VLV_MASTER_IER));
 490
 491                 seq_printf(m, "Render IER:\t%08x\n",
 492                            I915_READ(GTIER));
 493                 seq_printf(m, "Render IIR:\t%08x\n",
 494                            I915_READ(GTIIR));
 495                 seq_printf(m, "Render IMR:\t%08x\n",
 496                            I915_READ(GTIMR));
 497
 498                 seq_printf(m, "PM IER:\t\t%08x\n",
 499                            I915_READ(GEN6_PMIER));
 500                 seq_printf(m, "PM IIR:\t\t%08x\n",
 501                            I915_READ(GEN6_PMIIR));
 502                 seq_printf(m, "PM IMR:\t\t%08x\n",
 503                            I915_READ(GEN6_PMIMR));
 504
 505                 seq_printf(m, "Port hotplug:\t%08x\n",
 506                            I915_READ(PORT_HOTPLUG_EN));
 507                 seq_printf(m, "DPFLIPSTAT:\t%08x\n",
 508                            I915_READ(VLV_DPFLIPSTAT));
 509                 seq_printf(m, "DPINVGTT:\t%08x\n",
 510                            I915_READ(DPINVGTT));
 511
 512         } else if (!HAS_PCH_SPLIT(dev)) {
 513                 seq_printf(m, "Interrupt enable:    %08x\n",
 514                            I915_READ(IER));
 515                 seq_printf(m, "Interrupt identity:  %08x\n",
 516                            I915_READ(IIR));
 517                 seq_printf(m, "Interrupt mask:      %08x\n",
 518                            I915_READ(IMR));
 519                 for_each_pipe(pipe)
 520                         seq_printf(m, "Pipe %c stat:         %08x\n",
 521                                    pipe_name(pipe),
 522                                    I915_READ(PIPESTAT(pipe)));
 523         } else {
 524                 seq_printf(m, "North Display Interrupt enable:          %08x\n",
 525                            I915_READ(DEIER));
 526                 seq_printf(m, "North Display Interrupt identity:        %08x\n",
 527                            I915_READ(DEIIR));
 528                 seq_printf(m, "North Display Interrupt mask:            %08x\n",
 529                            I915_READ(DEIMR));
 530                 seq_printf(m, "South Display Interrupt enable:          %08x\n",
 531                            I915_READ(SDEIER));
 532                 seq_printf(m, "South Display Interrupt identity:        %08x\n",
 533                            I915_READ(SDEIIR));
 534                 seq_printf(m, "South Display Interrupt mask:            %08x\n",
 535                            I915_READ(SDEIMR));
 536                 seq_printf(m, "Graphics Interrupt enable:               %08x\n",
 537                            I915_READ(GTIER));
 538                 seq_printf(m, "Graphics Interrupt identity:             %08x\n",
 539                            I915_READ(GTIIR));
 540                 seq_printf(m, "Graphics Interrupt mask:         %08x\n",
 541                            I915_READ(GTIMR));
 542         }
 543         seq_printf(m, "Interrupts received: %d\n",
 544                    atomic_read(&dev_priv->irq_received));
 545         for_each_ring(ring, dev_priv, i) {
 546                 if (IS_GEN6(dev) || IS_GEN7(dev)) {
 547                         seq_printf(m,
 548                                    "Graphics Interrupt mask (%s):       %08x\n",
 549                                    ring->name, I915_READ_IMR(ring));
 550                 }
 551                 i915_ring_seqno_info(m, ring);
 552         }
 553         mutex_unlock(&dev->struct_mutex);
 554
 555         return 0;
 556 }
 557
 558 static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
 559 {
 560         struct drm_info_node *node = (struct drm_info_node *) m->private;
 561         struct drm_device *dev = node->minor->dev;
 562         drm_i915_private_t *dev_priv = dev->dev_private;
 563         int i, ret;
 564
 565         ret = mutex_lock_interruptible(&dev->struct_mutex);
 566         if (ret)
 567                 return ret;
 568
 569         seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
 570         seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
 571         for (i = 0; i < dev_priv->num_fence_regs; i++) {
 572                 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
 573
 574                 seq_printf(m, "Fence %d, pin count = %d, object = ",
 575                            i, dev_priv->fence_regs[i].pin_count);
 576                 if (obj == NULL)
 577                         seq_printf(m, "unused");
 578                 else
 579                         describe_obj(m, obj);
 580                 seq_printf(m, "\n");
 581         }
 582
 583         mutex_unlock(&dev->struct_mutex);
 584         return 0;
 585 }
 586
 587 static int i915_hws_info(struct seq_file *m, void *data)
 588 {
 589         struct drm_info_node *node = (struct drm_info_node *) m->private;
 590         struct drm_device *dev = node->minor->dev;
 591         drm_i915_private_t *dev_priv = dev->dev_private;
 592         struct intel_ring_buffer *ring;
 593         const u32 *hws;
 594         int i;
 595
 596         ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
 597         hws = ring->status_page.page_addr;
 598         if (hws == NULL)
 599                 return 0;
 600
 601         for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
 602                 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
 603                            i * 4,
 604                            hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
 605         }
 606         return 0;
 607 }
 608
 609 static const char *ring_str(int ring)
 610 {
 611         switch (ring) {
 612         case RCS: return "render";
 613         case VCS: return "bsd";
 614         case BCS: return "blt";
 615         case VECS: return "vebox";
 616         default: return "";
 617         }
 618 }
 619
 620 static const char *pin_flag(int pinned)
 621 {
 622         if (pinned > 0)
 623                 return " P";
 624         else if (pinned < 0)
 625                 return " p";
 626         else
 627                 return "";
 628 }
 629
 630 static const char *tiling_flag(int tiling)
 631 {
 632         switch (tiling) {
 633         default:
 634         case I915_TILING_NONE: return "";
 635         case I915_TILING_X: return " X";
 636         case I915_TILING_Y: return " Y";
 637         }
 638 }
 639
 640 static const char *dirty_flag(int dirty)
 641 {
 642         return dirty ? " dirty" : "";
 643 }
 644
 645 static const char *purgeable_flag(int purgeable)
 646 {
 647         return purgeable ? " purgeable" : "";
 648 }
 649
 650 static void i915_error_vprintf(struct drm_i915_error_state_buf *e,
 651                                const char *f, va_list args)
 652 {
 653         unsigned len;
 654
 655         if (!e->err && WARN(e->bytes > (e->size - 1), "overflow")) {
 656                 e->err = -ENOSPC;
 657                 return;
 658         }
 659
 660         if (e->bytes == e->size - 1 || e->err)
 661                 return;
 662
 663         /* Seek the first printf which is hits start position */
 664         if (e->pos < e->start) {
 665                 len = vsnprintf(NULL, 0, f, args);
 666                 if (e->pos + len <= e->start) {
 667                         e->pos += len;
 668                         return;
 669                 }
 670
 671                 /* First vsnprintf needs to fit in full for memmove*/
 672                 if (len >= e->size) {
 673                         e->err = -EIO;
 674                         return;
 675                 }
 676         }
 677
 678         len = vsnprintf(e->buf + e->bytes, e->size - e->bytes, f, args);
 679         if (len >= e->size - e->bytes)
 680                 len = e->size - e->bytes - 1;
 681
 682         /* If this is first printf in this window, adjust it so that
 683          * start position matches start of the buffer
 684          */
 685         if (e->pos < e->start) {
 686                 const size_t off = e->start - e->pos;
 687
 688                 /* Should not happen but be paranoid */
 689                 if (off > len || e->bytes) {
 690                         e->err = -EIO;
 691                         return;
 692                 }
 693
 694                 memmove(e->buf, e->buf + off, len - off);
 695                 e->bytes = len - off;
 696                 e->pos = e->start;
 697                 return;
 698         }
 699
 700         e->bytes += len;
 701         e->pos += len;
 702 }
 703
 704 void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...)
 705 {
 706         va_list args;
 707
 708         va_start(args, f);
 709         i915_error_vprintf(e, f, args);
 710         va_end(args);
 711 }
 712
 713 #define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__)
 714
 715 static void print_error_buffers(struct drm_i915_error_state_buf *m,
 716                                 const char *name,
 717                                 struct drm_i915_error_buffer *err,
 718                                 int count)
 719 {
 720         err_printf(m, "%s [%d]:\n", name, count);
 721
 722         while (count--) {
 723                 err_printf(m, "  %08x %8u %02x %02x %x %x%s%s%s%s%s%s%s",
 724                            err->gtt_offset,
 725                            err->size,
 726                            err->read_domains,
 727                            err->write_domain,
 728                            err->rseqno, err->wseqno,
 729                            pin_flag(err->pinned),
 730                            tiling_flag(err->tiling),
 731                            dirty_flag(err->dirty),
 732                            purgeable_flag(err->purgeable),
 733                            err->ring != -1 ? " " : "",
 734                            ring_str(err->ring),
 735                            cache_level_str(err->cache_level));
 736
 737                 if (err->name)
 738                         err_printf(m, " (name: %d)", err->name);
 739                 if (err->fence_reg != I915_FENCE_REG_NONE)
 740                         err_printf(m, " (fence: %d)", err->fence_reg);
 741
 742                 err_printf(m, "\n");
 743                 err++;
 744         }
 745 }
 746
 747 static void i915_ring_error_state(struct drm_i915_error_state_buf *m,
 748                                   struct drm_device *dev,
 749                                   struct drm_i915_error_state *error,
 750                                   unsigned ring)
 751 {
 752         BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
 753         err_printf(m, "%s command stream:\n", ring_str(ring));
 754         err_printf(m, "  HEAD: 0x%08x\n", error->head[ring]);
 755         err_printf(m, "  TAIL: 0x%08x\n", error->tail[ring]);
 756         err_printf(m, "  CTL: 0x%08x\n", error->ctl[ring]);
 757         err_printf(m, "  ACTHD: 0x%08x\n", error->acthd[ring]);
 758         err_printf(m, "  IPEIR: 0x%08x\n", error->ipeir[ring]);
 759         err_printf(m, "  IPEHR: 0x%08x\n", error->ipehr[ring]);
 760         err_printf(m, "  INSTDONE: 0x%08x\n", error->instdone[ring]);
 761         if (ring == RCS && INTEL_INFO(dev)->gen >= 4)
 762                 err_printf(m, "  BBADDR: 0x%08llx\n", error->bbaddr);
 763
 764         if (INTEL_INFO(dev)->gen >= 4)
 765                 err_printf(m, "  INSTPS: 0x%08x\n", error->instps[ring]);
 766         err_printf(m, "  INSTPM: 0x%08x\n", error->instpm[ring]);
 767         err_printf(m, "  FADDR: 0x%08x\n", error->faddr[ring]);
 768         if (INTEL_INFO(dev)->gen >= 6) {
 769                 err_printf(m, "  RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
 770                 err_printf(m, "  FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
 771                 err_printf(m, "  SYNC_0: 0x%08x [last synced 0x%08x]\n",
 772                            error->semaphore_mboxes[ring][0],
 773                            error->semaphore_seqno[ring][0]);
 774                 err_printf(m, "  SYNC_1: 0x%08x [last synced 0x%08x]\n",
 775                            error->semaphore_mboxes[ring][1],
 776                            error->semaphore_seqno[ring][1]);
 777         }
 778         err_printf(m, "  seqno: 0x%08x\n", error->seqno[ring]);
 779         err_printf(m, "  waiting: %s\n", yesno(error->waiting[ring]));
 780         err_printf(m, "  ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
 781         err_printf(m, "  ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
 782 }
 783
 784 struct i915_error_state_file_priv {
 785         struct drm_device *dev;
 786         struct drm_i915_error_state *error;
 787 };
 788
 789
 790 static int i915_error_state(struct i915_error_state_file_priv *error_priv,
 791                             struct drm_i915_error_state_buf *m)
 792
 793 {
 794         struct drm_device *dev = error_priv->dev;
 795         drm_i915_private_t *dev_priv = dev->dev_private;
 796         struct drm_i915_error_state *error = error_priv->error;
 797         struct intel_ring_buffer *ring;
 798         int i, j, page, offset, elt;
 799
 800         if (!error) {
 801                 err_printf(m, "no error state collected\n");
 802                 return 0;
 803         }
 804
 805         err_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
 806                    error->time.tv_usec);
 807         err_printf(m, "Kernel: " UTS_RELEASE "\n");
 808         err_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
 809         err_printf(m, "EIR: 0x%08x\n", error->eir);
 810         err_printf(m, "IER: 0x%08x\n", error->ier);
 811         err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
 812         err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
 813         err_printf(m, "DERRMR: 0x%08x\n", error->derrmr);
 814         err_printf(m, "CCID: 0x%08x\n", error->ccid);
 815
 816         for (i = 0; i < dev_priv->num_fence_regs; i++)
 817                 err_printf(m, "  fence[%d] = %08llx\n", i, error->fence[i]);
 818
 819         for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++)
 820                 err_printf(m, "  INSTDONE_%d: 0x%08x\n", i,
 821                            error->extra_instdone[i]);
 822
 823         if (INTEL_INFO(dev)->gen >= 6) {
 824                 err_printf(m, "ERROR: 0x%08x\n", error->error);
 825                 err_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
 826         }
 827
 828         if (INTEL_INFO(dev)->gen == 7)
 829                 err_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
 830
 831         for_each_ring(ring, dev_priv, i)
 832                 i915_ring_error_state(m, dev, error, i);
 833
 834         if (error->active_bo)
 835                 print_error_buffers(m, "Active",
 836                                     error->active_bo,
 837                                     error->active_bo_count);
 838
 839         if (error->pinned_bo)
 840                 print_error_buffers(m, "Pinned",
 841                                     error->pinned_bo,
 842                                     error->pinned_bo_count);
 843
 844         for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
 845                 struct drm_i915_error_object *obj;
 846
 847                 if ((obj = error->ring[i].batchbuffer)) {
 848                         err_printf(m, "%s --- gtt_offset = 0x%08x\n",
 849                                    dev_priv->ring[i].name,
 850                                    obj->gtt_offset);
 851                         offset = 0;
 852                         for (page = 0; page < obj->page_count; page++) {
 853                                 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
 854                                         err_printf(m, "%08x :  %08x\n", offset,
 855                                                    obj->pages[page][elt]);
 856                                         offset += 4;
 857                                 }
 858                         }
 859                 }
 860
 861                 if (error->ring[i].num_requests) {
 862                         err_printf(m, "%s --- %d requests\n",
 863                                    dev_priv->ring[i].name,
 864                                    error->ring[i].num_requests);
 865                         for (j = 0; j < error->ring[i].num_requests; j++) {
 866                                 err_printf(m, "  seqno 0x%08x, emitted %ld, tail 0x%08x\n",
 867                                            error->ring[i].requests[j].seqno,
 868                                            error->ring[i].requests[j].jiffies,
 869                                            error->ring[i].requests[j].tail);
 870                         }
 871                 }
 872
 873                 if ((obj = error->ring[i].ringbuffer)) {
 874                         err_printf(m, "%s --- ringbuffer = 0x%08x\n",
 875                                    dev_priv->ring[i].name,
 876                                    obj->gtt_offset);
 877                         offset = 0;
 878                         for (page = 0; page < obj->page_count; page++) {
 879                                 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
 880                                         err_printf(m, "%08x :  %08x\n",
 881                                                    offset,
 882                                                    obj->pages[page][elt]);
 883                                         offset += 4;
 884                                 }
 885                         }
 886                 }
 887
 888                 obj = error->ring[i].ctx;
 889                 if (obj) {
 890                         err_printf(m, "%s --- HW Context = 0x%08x\n",
 891                                    dev_priv->ring[i].name,
 892                                    obj->gtt_offset);
 893                         offset = 0;
 894                         for (elt = 0; elt < PAGE_SIZE/16; elt += 4) {
 895                                 err_printf(m, "[%04x] %08x %08x %08x %08x\n",
 896                                            offset,
 897                                            obj->pages[0][elt],
 898                                            obj->pages[0][elt+1],
 899                                            obj->pages[0][elt+2],
 900                                            obj->pages[0][elt+3]);
 901                                         offset += 16;
 902                         }
 903                 }
 904         }
 905
 906         if (error->overlay)
 907                 intel_overlay_print_error_state(m, error->overlay);
 908
 909         if (error->display)
 910                 intel_display_print_error_state(m, dev, error->display);
 911
 912         return 0;
 913 }
 914
 915 static ssize_t
 916 i915_error_state_write(struct file *filp,
 917                        const char __user *ubuf,
 918                        size_t cnt,
 919                        loff_t *ppos)
 920 {
 921         struct i915_error_state_file_priv *error_priv = filp->private_data;
 922         struct drm_device *dev = error_priv->dev;
 923         int ret;
 924
 925         DRM_DEBUG_DRIVER("Resetting error state\n");
 926
 927         ret = mutex_lock_interruptible(&dev->struct_mutex);
 928         if (ret)
 929                 return ret;
 930
 931         i915_destroy_error_state(dev);
 932         mutex_unlock(&dev->struct_mutex);
 933
 934         return cnt;
 935 }
 936
 937 static int i915_error_state_open(struct inode *inode, struct file *file)
 938 {
 939         struct drm_device *dev = inode->i_private;
 940         drm_i915_private_t *dev_priv = dev->dev_private;
 941         struct i915_error_state_file_priv *error_priv;
 942         unsigned long flags;
 943
 944         error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);
 945         if (!error_priv)
 946                 return -ENOMEM;
 947
 948         error_priv->dev = dev;
 949
 950         spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
 951         error_priv->error = dev_priv->gpu_error.first_error;
 952         if (error_priv->error)
 953                 kref_get(&error_priv->error->ref);
 954         spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
 955
 956         file->private_data = error_priv;
 957
 958         return 0;
 959 }
 960
 961 static int i915_error_state_release(struct inode *inode, struct file *file)
 962 {
 963         struct i915_error_state_file_priv *error_priv = file->private_data;
 964
 965         if (error_priv->error)
 966                 kref_put(&error_priv->error->ref, i915_error_state_free);
 967         kfree(error_priv);
 968
 969         return 0;
 970 }
 971
 972 static ssize_t i915_error_state_read(struct file *file, char __user *userbuf,
 973                                      size_t count, loff_t *pos)
 974 {
 975         struct i915_error_state_file_priv *error_priv = file->private_data;
 976         struct drm_i915_error_state_buf error_str;
 977         loff_t tmp_pos = 0;
 978         ssize_t ret_count = 0;
 979         int ret = 0;
 980
 981         memset(&error_str, 0, sizeof(error_str));
 982
 983         /* We need to have enough room to store any i915_error_state printf
 984          * so that we can move it to start position.
 985          */
 986         error_str.size = count + 1 > PAGE_SIZE ? count + 1 : PAGE_SIZE;
 987         error_str.buf = kmalloc(error_str.size,
 988                                 GFP_TEMPORARY | __GFP_NORETRY | __GFP_NOWARN);
 989
 990         if (error_str.buf == NULL) {
 991                 error_str.size = PAGE_SIZE;
 992                 error_str.buf = kmalloc(error_str.size, GFP_TEMPORARY);
 993         }
 994
 995         if (error_str.buf == NULL) {
 996                 error_str.size = 128;
 997                 error_str.buf = kmalloc(error_str.size, GFP_TEMPORARY);
 998         }
 999
1000         if (error_str.buf == NULL)
1001                 return -ENOMEM;
1002
1003         error_str.start = *pos;
1004
1005         ret = i915_error_state(error_priv, &error_str);
1006         if (ret)
1007                 goto out;
1008
1009         if (error_str.bytes == 0 && error_str.err) {
1010                 ret = error_str.err;
1011                 goto out;
1012         }
1013
1014         ret_count = simple_read_from_buffer(userbuf, count, &tmp_pos,
1015                                             error_str.buf,
1016                                             error_str.bytes);
1017
1018         if (ret_count < 0)
1019                 ret = ret_count;
1020         else
1021                 *pos = error_str.start + ret_count;
1022 out:
1023         kfree(error_str.buf);
1024         return ret ?: ret_count;
1025 }
1026
1027 static const struct file_operations i915_error_state_fops = {
1028         .owner = THIS_MODULE,
1029         .open = i915_error_state_open,
1030         .read = i915_error_state_read,
1031         .write = i915_error_state_write,
1032         .llseek = default_llseek,
1033         .release = i915_error_state_release,
1034 };
1035
1036 static int
1037 i915_next_seqno_get(void *data, u64 *val)
1038 {
1039         struct drm_device *dev = data;
1040         drm_i915_private_t *dev_priv = dev->dev_private;
1041         int ret;
1042
1043         ret = mutex_lock_interruptible(&dev->struct_mutex);
1044         if (ret)
1045                 return ret;
1046
1047         *val = dev_priv->next_seqno;
1048         mutex_unlock(&dev->struct_mutex);
1049
1050         return 0;
1051 }
1052
1053 static int
1054 i915_next_seqno_set(void *data, u64 val)
1055 {
1056         struct drm_device *dev = data;
1057         int ret;
1058
1059         ret = mutex_lock_interruptible(&dev->struct_mutex);
1060         if (ret)
1061                 return ret;
1062
1063         ret = i915_gem_set_seqno(dev, val);
1064         mutex_unlock(&dev->struct_mutex);
1065
1066         return ret;
1067 }
1068
1069 DEFINE_SIMPLE_ATTRIBUTE(i915_next_seqno_fops,
1070                         i915_next_seqno_get, i915_next_seqno_set,
1071                         "0x%llx\n");
1072
1073 static int i915_rstdby_delays(struct seq_file *m, void *unused)
1074 {
1075         struct drm_info_node *node = (struct drm_info_node *) m->private;
1076         struct drm_device *dev = node->minor->dev;
1077         drm_i915_private_t *dev_priv = dev->dev_private;
1078         u16 crstanddelay;
1079         int ret;
1080
1081         ret = mutex_lock_interruptible(&dev->struct_mutex);
1082         if (ret)
1083                 return ret;
1084
1085         crstanddelay = I915_READ16(CRSTANDVID);
1086
1087         mutex_unlock(&dev->struct_mutex);
1088
1089         seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
1090
1091         return 0;
1092 }
1093
1094 static int i915_cur_delayinfo(struct seq_file *m, void *unused)
1095 {
1096         struct drm_info_node *node = (struct drm_info_node *) m->private;
1097         struct drm_device *dev = node->minor->dev;
1098         drm_i915_private_t *dev_priv = dev->dev_private;
1099         int ret;
1100
1101         if (IS_GEN5(dev)) {
1102                 u16 rgvswctl = I915_READ16(MEMSWCTL);
1103                 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
1104
1105                 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
1106                 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
1107                 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
1108                            MEMSTAT_VID_SHIFT);
1109                 seq_printf(m, "Current P-state: %d\n",
1110                            (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
1111         } else if ((IS_GEN6(dev) || IS_GEN7(dev)) && !IS_VALLEYVIEW(dev)) {
1112                 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
1113                 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
1114                 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
1115                 u32 rpstat, cagf;
1116                 u32 rpupei, rpcurup, rpprevup;
1117                 u32 rpdownei, rpcurdown, rpprevdown;
1118                 int max_freq;
1119
1120                 /* RPSTAT1 is in the GT power well */
1121                 ret = mutex_lock_interruptible(&dev->struct_mutex);
1122                 if (ret)
1123                         return ret;
1124
1125                 gen6_gt_force_wake_get(dev_priv);
1126
1127                 rpstat = I915_READ(GEN6_RPSTAT1);
1128                 rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
1129                 rpcurup = I915_READ(GEN6_RP_CUR_UP);
1130                 rpprevup = I915_READ(GEN6_RP_PREV_UP);
1131                 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
1132                 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
1133                 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
1134                 if (IS_HASWELL(dev))
1135                         cagf = (rpstat & HSW_CAGF_MASK) >> HSW_CAGF_SHIFT;
1136                 else
1137                         cagf = (rpstat & GEN6_CAGF_MASK) >> GEN6_CAGF_SHIFT;
1138                 cagf *= GT_FREQUENCY_MULTIPLIER;
1139
1140                 gen6_gt_force_wake_put(dev_priv);
1141                 mutex_unlock(&dev->struct_mutex);
1142
1143                 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
1144                 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
1145                 seq_printf(m, "Render p-state ratio: %d\n",
1146                            (gt_perf_status & 0xff00) >> 8);
1147                 seq_printf(m, "Render p-state VID: %d\n",
1148                            gt_perf_status & 0xff);
1149                 seq_printf(m, "Render p-state limit: %d\n",
1150                            rp_state_limits & 0xff);
1151                 seq_printf(m, "CAGF: %dMHz\n", cagf);
1152                 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
1153                            GEN6_CURICONT_MASK);
1154                 seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
1155                            GEN6_CURBSYTAVG_MASK);
1156                 seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
1157                            GEN6_CURBSYTAVG_MASK);
1158                 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
1159                            GEN6_CURIAVG_MASK);
1160                 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
1161                            GEN6_CURBSYTAVG_MASK);
1162                 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
1163                            GEN6_CURBSYTAVG_MASK);
1164
1165                 max_freq = (rp_state_cap & 0xff0000) >> 16;
1166                 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
1167                            max_freq * GT_FREQUENCY_MULTIPLIER);
1168
1169                 max_freq = (rp_state_cap & 0xff00) >> 8;
1170                 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
1171                            max_freq * GT_FREQUENCY_MULTIPLIER);
1172
1173                 max_freq = rp_state_cap & 0xff;
1174                 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
1175                            max_freq * GT_FREQUENCY_MULTIPLIER);
1176
1177                 seq_printf(m, "Max overclocked frequency: %dMHz\n",
1178                            dev_priv->rps.hw_max * GT_FREQUENCY_MULTIPLIER);
1179         } else if (IS_VALLEYVIEW(dev)) {
1180                 u32 freq_sts, val;
1181
1182                 mutex_lock(&dev_priv->rps.hw_lock);
1183                 freq_sts = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
1184                 seq_printf(m, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts);
1185                 seq_printf(m, "DDR freq: %d MHz\n", dev_priv->mem_freq);
1186
1187                 val = vlv_punit_read(dev_priv, PUNIT_FUSE_BUS1);
1188                 seq_printf(m, "max GPU freq: %d MHz\n",
1189                            vlv_gpu_freq(dev_priv->mem_freq, val));
1190
1191                 val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_LFM);
1192                 seq_printf(m, "min GPU freq: %d MHz\n",
1193                            vlv_gpu_freq(dev_priv->mem_freq, val));
1194
1195                 seq_printf(m, "current GPU freq: %d MHz\n",
1196                            vlv_gpu_freq(dev_priv->mem_freq,
1197                                         (freq_sts >> 8) & 0xff));
1198                 mutex_unlock(&dev_priv->rps.hw_lock);
1199         } else {
1200                 seq_printf(m, "no P-state info available\n");
1201         }
1202
1203         return 0;
1204 }
1205
1206 static int i915_delayfreq_table(struct seq_file *m, void *unused)
1207 {
1208         struct drm_info_node *node = (struct drm_info_node *) m->private;
1209         struct drm_device *dev = node->minor->dev;
1210         drm_i915_private_t *dev_priv = dev->dev_private;
1211         u32 delayfreq;
1212         int ret, i;
1213
1214         ret = mutex_lock_interruptible(&dev->struct_mutex);
1215         if (ret)
1216                 return ret;
1217
1218         for (i = 0; i < 16; i++) {
1219                 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
1220                 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
1221                            (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
1222         }
1223
1224         mutex_unlock(&dev->struct_mutex);
1225
1226         return 0;
1227 }
1228
1229 static inline int MAP_TO_MV(int map)
1230 {
1231         return 1250 - (map * 25);
1232 }
1233
1234 static int i915_inttoext_table(struct seq_file *m, void *unused)
1235 {
1236         struct drm_info_node *node = (struct drm_info_node *) m->private;
1237         struct drm_device *dev = node->minor->dev;
1238         drm_i915_private_t *dev_priv = dev->dev_private;
1239         u32 inttoext;
1240         int ret, i;
1241
1242         ret = mutex_lock_interruptible(&dev->struct_mutex);
1243         if (ret)
1244                 return ret;
1245
1246         for (i = 1; i <= 32; i++) {
1247                 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
1248                 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
1249         }
1250
1251         mutex_unlock(&dev->struct_mutex);
1252
1253         return 0;
1254 }
1255
1256 static int ironlake_drpc_info(struct seq_file *m)
1257 {
1258         struct drm_info_node *node = (struct drm_info_node *) m->private;
1259         struct drm_device *dev = node->minor->dev;
1260         drm_i915_private_t *dev_priv = dev->dev_private;
1261         u32 rgvmodectl, rstdbyctl;
1262         u16 crstandvid;
1263         int ret;
1264
1265         ret = mutex_lock_interruptible(&dev->struct_mutex);
1266         if (ret)
1267                 return ret;
1268
1269         rgvmodectl = I915_READ(MEMMODECTL);
1270         rstdbyctl = I915_READ(RSTDBYCTL);
1271         crstandvid = I915_READ16(CRSTANDVID);
1272
1273         mutex_unlock(&dev->struct_mutex);
1274
1275         seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
1276                    "yes" : "no");
1277         seq_printf(m, "Boost freq: %d\n",
1278                    (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
1279                    MEMMODE_BOOST_FREQ_SHIFT);
1280         seq_printf(m, "HW control enabled: %s\n",
1281                    rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
1282         seq_printf(m, "SW control enabled: %s\n",
1283                    rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
1284         seq_printf(m, "Gated voltage change: %s\n",
1285                    rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
1286         seq_printf(m, "Starting frequency: P%d\n",
1287                    (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
1288         seq_printf(m, "Max P-state: P%d\n",
1289                    (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
1290         seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
1291         seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
1292         seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
1293         seq_printf(m, "Render standby enabled: %s\n",
1294                    (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
1295         seq_printf(m, "Current RS state: ");
1296         switch (rstdbyctl & RSX_STATUS_MASK) {
1297         case RSX_STATUS_ON:
1298                 seq_printf(m, "on\n");
1299                 break;
1300         case RSX_STATUS_RC1:
1301                 seq_printf(m, "RC1\n");
1302                 break;
1303         case RSX_STATUS_RC1E:
1304                 seq_printf(m, "RC1E\n");
1305                 break;
1306         case RSX_STATUS_RS1:
1307                 seq_printf(m, "RS1\n");
1308                 break;
1309         case RSX_STATUS_RS2:
1310                 seq_printf(m, "RS2 (RC6)\n");
1311                 break;
1312         case RSX_STATUS_RS3:
1313                 seq_printf(m, "RC3 (RC6+)\n");
1314                 break;
1315         default:
1316                 seq_printf(m, "unknown\n");
1317                 break;
1318         }
1319
1320         return 0;
1321 }
1322
1323 static int gen6_drpc_info(struct seq_file *m)
1324 {
1325
1326         struct drm_info_node *node = (struct drm_info_node *) m->private;
1327         struct drm_device *dev = node->minor->dev;
1328         struct drm_i915_private *dev_priv = dev->dev_private;
1329         u32 rpmodectl1, gt_core_status, rcctl1, rc6vids = 0;
1330         unsigned forcewake_count;
1331         int count=0, ret;
1332
1333
1334         ret = mutex_lock_interruptible(&dev->struct_mutex);
1335         if (ret)
1336                 return ret;
1337
1338         spin_lock_irq(&dev_priv->gt_lock);
1339         forcewake_count = dev_priv->forcewake_count;
1340         spin_unlock_irq(&dev_priv->gt_lock);
1341
1342         if (forcewake_count) {
1343                 seq_printf(m, "RC information inaccurate because somebody "
1344                               "holds a forcewake reference \n");
1345         } else {
1346                 /* NB: we cannot use forcewake, else we read the wrong values */
1347                 while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
1348                         udelay(10);
1349                 seq_printf(m, "RC information accurate: %s\n", yesno(count < 51));
1350         }
1351
1352         gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
1353         trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);
1354
1355         rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
1356         rcctl1 = I915_READ(GEN6_RC_CONTROL);
1357         mutex_unlock(&dev->struct_mutex);
1358         mutex_lock(&dev_priv->rps.hw_lock);
1359         sandybridge_pcode_read(dev_priv, GEN6_PCODE_READ_RC6VIDS, &rc6vids);
1360         mutex_unlock(&dev_priv->rps.hw_lock);
1361
1362         seq_printf(m, "Video Turbo Mode: %s\n",
1363                    yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
1364         seq_printf(m, "HW control enabled: %s\n",
1365                    yesno(rpmodectl1 & GEN6_RP_ENABLE));
1366         seq_printf(m, "SW control enabled: %s\n",
1367                    yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
1368                           GEN6_RP_MEDIA_SW_MODE));
1369         seq_printf(m, "RC1e Enabled: %s\n",
1370                    yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
1371         seq_printf(m, "RC6 Enabled: %s\n",
1372                    yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
1373         seq_printf(m, "Deep RC6 Enabled: %s\n",
1374                    yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
1375         seq_printf(m, "Deepest RC6 Enabled: %s\n",
1376                    yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));
1377         seq_printf(m, "Current RC state: ");
1378         switch (gt_core_status & GEN6_RCn_MASK) {
1379         case GEN6_RC0:
1380                 if (gt_core_status & GEN6_CORE_CPD_STATE_MASK)
1381                         seq_printf(m, "Core Power Down\n");
1382                 else
1383                         seq_printf(m, "on\n");
1384                 break;
1385         case GEN6_RC3:
1386                 seq_printf(m, "RC3\n");
1387                 break;
1388         case GEN6_RC6:
1389                 seq_printf(m, "RC6\n");
1390                 break;
1391         case GEN6_RC7:
1392                 seq_printf(m, "RC7\n");
1393                 break;
1394         default:
1395                 seq_printf(m, "Unknown\n");
1396                 break;
1397         }
1398
1399         seq_printf(m, "Core Power Down: %s\n",
1400                    yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
1401
1402         /* Not exactly sure what this is */
1403         seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1404                    I915_READ(GEN6_GT_GFX_RC6_LOCKED));
1405         seq_printf(m, "RC6 residency since boot: %u\n",
1406                    I915_READ(GEN6_GT_GFX_RC6));
1407         seq_printf(m, "RC6+ residency since boot: %u\n",
1408                    I915_READ(GEN6_GT_GFX_RC6p));
1409         seq_printf(m, "RC6++ residency since boot: %u\n",
1410                    I915_READ(GEN6_GT_GFX_RC6pp));
1411
1412         seq_printf(m, "RC6   voltage: %dmV\n",
1413                    GEN6_DECODE_RC6_VID(((rc6vids >> 0) & 0xff)));
1414         seq_printf(m, "RC6+  voltage: %dmV\n",
1415                    GEN6_DECODE_RC6_VID(((rc6vids >> 8) & 0xff)));
1416         seq_printf(m, "RC6++ voltage: %dmV\n",
1417                    GEN6_DECODE_RC6_VID(((rc6vids >> 16) & 0xff)));
1418         return 0;
1419 }
1420
1421 static int i915_drpc_info(struct seq_file *m, void *unused)
1422 {
1423         struct drm_info_node *node = (struct drm_info_node *) m->private;
1424         struct drm_device *dev = node->minor->dev;
1425
1426         if (IS_GEN6(dev) || IS_GEN7(dev))
1427                 return gen6_drpc_info(m);
1428         else
1429                 return ironlake_drpc_info(m);
1430 }
1431
1432 static int i915_fbc_status(struct seq_file *m, void *unused)
1433 {
1434         struct drm_info_node *node = (struct drm_info_node *) m->private;
1435         struct drm_device *dev = node->minor->dev;
1436         drm_i915_private_t *dev_priv = dev->dev_private;
1437
1438         if (!I915_HAS_FBC(dev)) {
1439                 seq_printf(m, "FBC unsupported on this chipset\n");
1440                 return 0;
1441         }
1442
1443         if (intel_fbc_enabled(dev)) {
1444                 seq_printf(m, "FBC enabled\n");
1445         } else {
1446                 seq_printf(m, "FBC disabled: ");
1447                 switch (dev_priv->no_fbc_reason) {
1448                 case FBC_NO_OUTPUT:
1449                         seq_printf(m, "no outputs");
1450                         break;
1451                 case FBC_STOLEN_TOO_SMALL:
1452                         seq_printf(m, "not enough stolen memory");
1453                         break;
1454                 case FBC_UNSUPPORTED_MODE:
1455                         seq_printf(m, "mode not supported");
1456                         break;
1457                 case FBC_MODE_TOO_LARGE:
1458                         seq_printf(m, "mode too large");
1459                         break;
1460                 case FBC_BAD_PLANE:
1461                         seq_printf(m, "FBC unsupported on plane");
1462                         break;
1463                 case FBC_NOT_TILED:
1464                         seq_printf(m, "scanout buffer not tiled");
1465                         break;
1466                 case FBC_MULTIPLE_PIPES:
1467                         seq_printf(m, "multiple pipes are enabled");
1468                         break;
1469                 case FBC_MODULE_PARAM:
1470                         seq_printf(m, "disabled per module param (default off)");
1471                         break;
1472                 default:
1473                         seq_printf(m, "unknown reason");
1474                 }
1475                 seq_printf(m, "\n");
1476         }
1477         return 0;
1478 }
1479
1480 static int i915_ips_status(struct seq_file *m, void *unused)
1481 {
1482         struct drm_info_node *node = (struct drm_info_node *) m->private;
1483         struct drm_device *dev = node->minor->dev;
1484         struct drm_i915_private *dev_priv = dev->dev_private;
1485
1486         if (!IS_ULT(dev)) {
1487                 seq_puts(m, "not supported\n");
1488                 return 0;
1489         }
1490
1491         if (I915_READ(IPS_CTL) & IPS_ENABLE)
1492                 seq_puts(m, "enabled\n");
1493         else
1494                 seq_puts(m, "disabled\n");
1495
1496         return 0;
1497 }
1498
1499 static int i915_sr_status(struct seq_file *m, void *unused)
1500 {
1501         struct drm_info_node *node = (struct drm_info_node *) m->private;
1502         struct drm_device *dev = node->minor->dev;
1503         drm_i915_private_t *dev_priv = dev->dev_private;
1504         bool sr_enabled = false;
1505
1506         if (HAS_PCH_SPLIT(dev))
1507                 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
1508         else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
1509                 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
1510         else if (IS_I915GM(dev))
1511                 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
1512         else if (IS_PINEVIEW(dev))
1513                 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
1514
1515         seq_printf(m, "self-refresh: %s\n",
1516                    sr_enabled ? "enabled" : "disabled");
1517
1518         return 0;
1519 }
1520
1521 static int i915_emon_status(struct seq_file *m, void *unused)
1522 {
1523         struct drm_info_node *node = (struct drm_info_node *) m->private;
1524         struct drm_device *dev = node->minor->dev;
1525         drm_i915_private_t *dev_priv = dev->dev_private;
1526         unsigned long temp, chipset, gfx;
1527         int ret;
1528
1529         if (!IS_GEN5(dev))
1530                 return -ENODEV;
1531
1532         ret = mutex_lock_interruptible(&dev->struct_mutex);
1533         if (ret)
1534                 return ret;
1535
1536         temp = i915_mch_val(dev_priv);
1537         chipset = i915_chipset_val(dev_priv);
1538         gfx = i915_gfx_val(dev_priv);
1539         mutex_unlock(&dev->struct_mutex);
1540
1541         seq_printf(m, "GMCH temp: %ld\n", temp);
1542         seq_printf(m, "Chipset power: %ld\n", chipset);
1543         seq_printf(m, "GFX power: %ld\n", gfx);
1544         seq_printf(m, "Total power: %ld\n", chipset + gfx);
1545
1546         return 0;
1547 }
1548
1549 static int i915_ring_freq_table(struct seq_file *m, void *unused)
1550 {
1551         struct drm_info_node *node = (struct drm_info_node *) m->private;
1552         struct drm_device *dev = node->minor->dev;
1553         drm_i915_private_t *dev_priv = dev->dev_private;
1554         int ret;
1555         int gpu_freq, ia_freq;
1556
1557         if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
1558                 seq_printf(m, "unsupported on this chipset\n");
1559                 return 0;
1560         }
1561
1562         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1563         if (ret)
1564                 return ret;
1565
1566         seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\tEffective Ring freq (MHz)\n");
1567
1568         for (gpu_freq = dev_priv->rps.min_delay;
1569              gpu_freq <= dev_priv->rps.max_delay;
1570              gpu_freq++) {
1571                 ia_freq = gpu_freq;
1572                 sandybridge_pcode_read(dev_priv,
1573                                        GEN6_PCODE_READ_MIN_FREQ_TABLE,
1574                                        &ia_freq);
1575                 seq_printf(m, "%d\t\t%d\t\t\t\t%d\n",
1576                            gpu_freq * GT_FREQUENCY_MULTIPLIER,
1577                            ((ia_freq >> 0) & 0xff) * 100,
1578                            ((ia_freq >> 8) & 0xff) * 100);
1579         }
1580
1581         mutex_unlock(&dev_priv->rps.hw_lock);
1582
1583         return 0;
1584 }
1585
1586 static int i915_gfxec(struct seq_file *m, void *unused)
1587 {
1588         struct drm_info_node *node = (struct drm_info_node *) m->private;
1589         struct drm_device *dev = node->minor->dev;
1590         drm_i915_private_t *dev_priv = dev->dev_private;
1591         int ret;
1592
1593         ret = mutex_lock_interruptible(&dev->struct_mutex);
1594         if (ret)
1595                 return ret;
1596
1597         seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1598
1599         mutex_unlock(&dev->struct_mutex);
1600
1601         return 0;
1602 }
1603
1604 static int i915_opregion(struct seq_file *m, void *unused)
1605 {
1606         struct drm_info_node *node = (struct drm_info_node *) m->private;
1607         struct drm_device *dev = node->minor->dev;
1608         drm_i915_private_t *dev_priv = dev->dev_private;
1609         struct intel_opregion *opregion = &dev_priv->opregion;
1610         void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL);
1611         int ret;
1612
1613         if (data == NULL)
1614                 return -ENOMEM;
1615
1616         ret = mutex_lock_interruptible(&dev->struct_mutex);
1617         if (ret)
1618                 goto out;
1619
1620         if (opregion->header) {
1621                 memcpy_fromio(data, opregion->header, OPREGION_SIZE);
1622                 seq_write(m, data, OPREGION_SIZE);
1623         }
1624
1625         mutex_unlock(&dev->struct_mutex);
1626
1627 out:
1628         kfree(data);
1629         return 0;
1630 }
1631
1632 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1633 {
1634         struct drm_info_node *node = (struct drm_info_node *) m->private;
1635         struct drm_device *dev = node->minor->dev;
1636         drm_i915_private_t *dev_priv = dev->dev_private;
1637         struct intel_fbdev *ifbdev;
1638         struct intel_framebuffer *fb;
1639         int ret;
1640
1641         ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1642         if (ret)
1643                 return ret;
1644
1645         ifbdev = dev_priv->fbdev;
1646         fb = to_intel_framebuffer(ifbdev->helper.fb);
1647
1648         seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, refcount %d, obj ",
1649                    fb->base.width,
1650                    fb->base.height,
1651                    fb->base.depth,
1652                    fb->base.bits_per_pixel,
1653                    atomic_read(&fb->base.refcount.refcount));
1654         describe_obj(m, fb->obj);
1655         seq_printf(m, "\n");
1656         mutex_unlock(&dev->mode_config.mutex);
1657
1658         mutex_lock(&dev->mode_config.fb_lock);
1659         list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1660                 if (&fb->base == ifbdev->helper.fb)
1661                         continue;
1662
1663                 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, refcount %d, obj ",
1664                            fb->base.width,
1665                            fb->base.height,
1666                            fb->base.depth,
1667                            fb->base.bits_per_pixel,
1668                            atomic_read(&fb->base.refcount.refcount));
1669                 describe_obj(m, fb->obj);
1670                 seq_printf(m, "\n");
1671         }
1672         mutex_unlock(&dev->mode_config.fb_lock);
1673
1674         return 0;
1675 }
1676
1677 static int i915_context_status(struct seq_file *m, void *unused)
1678 {
1679         struct drm_info_node *node = (struct drm_info_node *) m->private;
1680         struct drm_device *dev = node->minor->dev;
1681         drm_i915_private_t *dev_priv = dev->dev_private;
1682         struct intel_ring_buffer *ring;
1683         int ret, i;
1684
1685         ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1686         if (ret)
1687                 return ret;
1688
1689         if (dev_priv->ips.pwrctx) {
1690                 seq_printf(m, "power context ");
1691                 describe_obj(m, dev_priv->ips.pwrctx);
1692                 seq_printf(m, "\n");
1693         }
1694
1695         if (dev_priv->ips.renderctx) {
1696                 seq_printf(m, "render context ");
1697                 describe_obj(m, dev_priv->ips.renderctx);
1698                 seq_printf(m, "\n");
1699         }
1700
1701         for_each_ring(ring, dev_priv, i) {
1702                 if (ring->default_context) {
1703                         seq_printf(m, "HW default context %s ring ", ring->name);
1704                         describe_obj(m, ring->default_context->obj);
1705                         seq_printf(m, "\n");
1706                 }
1707         }
1708
1709         mutex_unlock(&dev->mode_config.mutex);
1710
1711         return 0;
1712 }
1713
1714 static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
1715 {
1716         struct drm_info_node *node = (struct drm_info_node *) m->private;
1717         struct drm_device *dev = node->minor->dev;
1718         struct drm_i915_private *dev_priv = dev->dev_private;
1719         unsigned forcewake_count;
1720
1721         spin_lock_irq(&dev_priv->gt_lock);
1722         forcewake_count = dev_priv->forcewake_count;
1723         spin_unlock_irq(&dev_priv->gt_lock);
1724
1725         seq_printf(m, "forcewake count = %u\n", forcewake_count);
1726
1727         return 0;
1728 }
1729
1730 static const char *swizzle_string(unsigned swizzle)
1731 {
1732         switch(swizzle) {
1733         case I915_BIT_6_SWIZZLE_NONE:
1734                 return "none";
1735         case I915_BIT_6_SWIZZLE_9:
1736                 return "bit9";
1737         case I915_BIT_6_SWIZZLE_9_10:
1738                 return "bit9/bit10";
1739         case I915_BIT_6_SWIZZLE_9_11:
1740                 return "bit9/bit11";
1741         case I915_BIT_6_SWIZZLE_9_10_11:
1742                 return "bit9/bit10/bit11";
1743         case I915_BIT_6_SWIZZLE_9_17:
1744                 return "bit9/bit17";
1745         case I915_BIT_6_SWIZZLE_9_10_17:
1746                 return "bit9/bit10/bit17";
1747         case I915_BIT_6_SWIZZLE_UNKNOWN:
1748                 return "unknown";
1749         }
1750
1751         return "bug";
1752 }
1753
1754 static int i915_swizzle_info(struct seq_file *m, void *data)
1755 {
1756         struct drm_info_node *node = (struct drm_info_node *) m->private;
1757         struct drm_device *dev = node->minor->dev;
1758         struct drm_i915_private *dev_priv = dev->dev_private;
1759         int ret;
1760
1761         ret = mutex_lock_interruptible(&dev->struct_mutex);
1762         if (ret)
1763                 return ret;
1764
1765         seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
1766                    swizzle_string(dev_priv->mm.bit_6_swizzle_x));
1767         seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
1768                    swizzle_string(dev_priv->mm.bit_6_swizzle_y));
1769
1770         if (IS_GEN3(dev) || IS_GEN4(dev)) {
1771                 seq_printf(m, "DDC = 0x%08x\n",
1772                            I915_READ(DCC));
1773                 seq_printf(m, "C0DRB3 = 0x%04x\n",
1774                            I915_READ16(C0DRB3));
1775                 seq_printf(m, "C1DRB3 = 0x%04x\n",
1776                            I915_READ16(C1DRB3));
1777         } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
1778                 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
1779                            I915_READ(MAD_DIMM_C0));
1780                 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
1781                            I915_READ(MAD_DIMM_C1));
1782                 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n",
1783                            I915_READ(MAD_DIMM_C2));
1784                 seq_printf(m, "TILECTL = 0x%08x\n",
1785                            I915_READ(TILECTL));
1786                 seq_printf(m, "ARB_MODE = 0x%08x\n",
1787                            I915_READ(ARB_MODE));
1788                 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n",
1789                            I915_READ(DISP_ARB_CTL));
1790         }
1791         mutex_unlock(&dev->struct_mutex);
1792
1793         return 0;
1794 }
1795
1796 static int i915_ppgtt_info(struct seq_file *m, void *data)
1797 {
1798         struct drm_info_node *node = (struct drm_info_node *) m->private;
1799         struct drm_device *dev = node->minor->dev;
1800         struct drm_i915_private *dev_priv = dev->dev_private;
1801         struct intel_ring_buffer *ring;
1802         int i, ret;
1803
1804
1805         ret = mutex_lock_interruptible(&dev->struct_mutex);
1806         if (ret)
1807                 return ret;
1808         if (INTEL_INFO(dev)->gen == 6)
1809                 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));
1810
1811         for_each_ring(ring, dev_priv, i) {
1812                 seq_printf(m, "%s\n", ring->name);
1813                 if (INTEL_INFO(dev)->gen == 7)
1814                         seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring)));
1815                 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring)));
1816                 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring)));
1817                 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring)));
1818         }
1819         if (dev_priv->mm.aliasing_ppgtt) {
1820                 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
1821
1822                 seq_printf(m, "aliasing PPGTT:\n");
1823                 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset);
1824         }
1825         seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
1826         mutex_unlock(&dev->struct_mutex);
1827
1828         return 0;
1829 }
1830
1831 static int i915_dpio_info(struct seq_file *m, void *data)
1832 {
1833         struct drm_info_node *node = (struct drm_info_node *) m->private;
1834         struct drm_device *dev = node->minor->dev;
1835         struct drm_i915_private *dev_priv = dev->dev_private;
1836         int ret;
1837
1838
1839         if (!IS_VALLEYVIEW(dev)) {
1840                 seq_printf(m, "unsupported\n");
1841                 return 0;
1842         }
1843
1844         ret = mutex_lock_interruptible(&dev_priv->dpio_lock);
1845         if (ret)
1846                 return ret;
1847
1848         seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));
1849
1850         seq_printf(m, "DPIO_DIV_A: 0x%08x\n",
1851                    vlv_dpio_read(dev_priv, _DPIO_DIV_A));
1852         seq_printf(m, "DPIO_DIV_B: 0x%08x\n",
1853                    vlv_dpio_read(dev_priv, _DPIO_DIV_B));
1854
1855         seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",
1856                    vlv_dpio_read(dev_priv, _DPIO_REFSFR_A));
1857         seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",
1858                    vlv_dpio_read(dev_priv, _DPIO_REFSFR_B));
1859
1860         seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",
1861                    vlv_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
1862         seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
1863                    vlv_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
1864
1865         seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",
1866                    vlv_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
1867         seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",
1868                    vlv_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));
1869
1870         seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1871                    vlv_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
1872
1873         mutex_unlock(&dev_priv->dpio_lock);
1874
1875         return 0;
1876 }
1877
1878 static int
1879 i915_wedged_get(void *data, u64 *val)
1880 {
1881         struct drm_device *dev = data;
1882         drm_i915_private_t *dev_priv = dev->dev_private;
1883
1884         *val = atomic_read(&dev_priv->gpu_error.reset_counter);
1885
1886         return 0;
1887 }
1888
1889 static int
1890 i915_wedged_set(void *data, u64 val)
1891 {
1892         struct drm_device *dev = data;
1893
1894         DRM_INFO("Manually setting wedged to %llu\n", val);
1895         i915_handle_error(dev, val);
1896
1897         return 0;
1898 }
1899
1900 DEFINE_SIMPLE_ATTRIBUTE(i915_wedged_fops,
1901                         i915_wedged_get, i915_wedged_set,
1902                         "%llu\n");
1903
1904 static int
1905 i915_ring_stop_get(void *data, u64 *val)
1906 {
1907         struct drm_device *dev = data;
1908         drm_i915_private_t *dev_priv = dev->dev_private;
1909
1910         *val = dev_priv->gpu_error.stop_rings;
1911
1912         return 0;
1913 }
1914
1915 static int
1916 i915_ring_stop_set(void *data, u64 val)
1917 {
1918         struct drm_device *dev = data;
1919         struct drm_i915_private *dev_priv = dev->dev_private;
1920         int ret;
1921
1922         DRM_DEBUG_DRIVER("Stopping rings 0x%08llx\n", val);
1923
1924         ret = mutex_lock_interruptible(&dev->struct_mutex);
1925         if (ret)
1926                 return ret;
1927
1928         dev_priv->gpu_error.stop_rings = val;
1929         mutex_unlock(&dev->struct_mutex);
1930
1931         return 0;
1932 }
1933
1934 DEFINE_SIMPLE_ATTRIBUTE(i915_ring_stop_fops,
1935                         i915_ring_stop_get, i915_ring_stop_set,
1936                         "0x%08llx\n");
1937
1938 #define DROP_UNBOUND 0x1
1939 #define DROP_BOUND 0x2
1940 #define DROP_RETIRE 0x4
1941 #define DROP_ACTIVE 0x8
1942 #define DROP_ALL (DROP_UNBOUND | \
1943                   DROP_BOUND | \
1944                   DROP_RETIRE | \
1945                   DROP_ACTIVE)
1946 static int
1947 i915_drop_caches_get(void *data, u64 *val)
1948 {
1949         *val = DROP_ALL;
1950
1951         return 0;
1952 }
1953
1954 static int
1955 i915_drop_caches_set(void *data, u64 val)
1956 {
1957         struct drm_device *dev = data;
1958         struct drm_i915_private *dev_priv = dev->dev_private;
1959         struct drm_i915_gem_object *obj, *next;
1960         int ret;
1961
1962         DRM_DEBUG_DRIVER("Dropping caches: 0x%08llx\n", val);
1963
1964         /* No need to check and wait for gpu resets, only libdrm auto-restarts
1965          * on ioctls on -EAGAIN. */
1966         ret = mutex_lock_interruptible(&dev->struct_mutex);
1967         if (ret)
1968                 return ret;
1969
1970         if (val & DROP_ACTIVE) {
1971                 ret = i915_gpu_idle(dev);
1972                 if (ret)
1973                         goto unlock;
1974         }
1975
1976         if (val & (DROP_RETIRE | DROP_ACTIVE))
1977                 i915_gem_retire_requests(dev);
1978
1979         if (val & DROP_BOUND) {
1980                 list_for_each_entry_safe(obj, next, &dev_priv->mm.inactive_list, mm_list)
1981                         if (obj->pin_count == 0) {
1982                                 ret = i915_gem_object_unbind(obj);
1983                                 if (ret)
1984                                         goto unlock;
1985                         }
1986         }
1987
1988         if (val & DROP_UNBOUND) {
1989                 list_for_each_entry_safe(obj, next, &dev_priv->mm.unbound_list,
1990                                          global_list)
1991                         if (obj->pages_pin_count == 0) {
1992                                 ret = i915_gem_object_put_pages(obj);
1993                                 if (ret)
1994                                         goto unlock;
1995                         }
1996         }
1997
1998 unlock:
1999         mutex_unlock(&dev->struct_mutex);
2000
2001         return ret;
2002 }
2003
2004 DEFINE_SIMPLE_ATTRIBUTE(i915_drop_caches_fops,
2005                         i915_drop_caches_get, i915_drop_caches_set,
2006                         "0x%08llx\n");
2007
2008 static int
2009 i915_max_freq_get(void *data, u64 *val)
2010 {
2011         struct drm_device *dev = data;
2012         drm_i915_private_t *dev_priv = dev->dev_private;
2013         int ret;
2014
2015         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2016                 return -ENODEV;
2017
2018         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
2019         if (ret)
2020                 return ret;
2021
2022         if (IS_VALLEYVIEW(dev))
2023                 *val = vlv_gpu_freq(dev_priv->mem_freq,
2024                                     dev_priv->rps.max_delay);
2025         else
2026                 *val = dev_priv->rps.max_delay * GT_FREQUENCY_MULTIPLIER;
2027         mutex_unlock(&dev_priv->rps.hw_lock);
2028
2029         return 0;
2030 }
2031
2032 static int
2033 i915_max_freq_set(void *data, u64 val)
2034 {
2035         struct drm_device *dev = data;
2036         struct drm_i915_private *dev_priv = dev->dev_private;
2037         int ret;
2038
2039         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2040                 return -ENODEV;
2041
2042         DRM_DEBUG_DRIVER("Manually setting max freq to %llu\n", val);
2043
2044         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
2045         if (ret)
2046                 return ret;
2047
2048         /*
2049          * Turbo will still be enabled, but won't go above the set value.
2050          */
2051         if (IS_VALLEYVIEW(dev)) {
2052                 val = vlv_freq_opcode(dev_priv->mem_freq, val);
2053                 dev_priv->rps.max_delay = val;
2054                 gen6_set_rps(dev, val);
2055         } else {
2056                 do_div(val, GT_FREQUENCY_MULTIPLIER);
2057                 dev_priv->rps.max_delay = val;
2058                 gen6_set_rps(dev, val);
2059         }
2060
2061         mutex_unlock(&dev_priv->rps.hw_lock);
2062
2063         return 0;
2064 }
2065
2066 DEFINE_SIMPLE_ATTRIBUTE(i915_max_freq_fops,
2067                         i915_max_freq_get, i915_max_freq_set,
2068                         "%llu\n");
2069
2070 static int
2071 i915_min_freq_get(void *data, u64 *val)
2072 {
2073         struct drm_device *dev = data;
2074         drm_i915_private_t *dev_priv = dev->dev_private;
2075         int ret;
2076
2077         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2078                 return -ENODEV;
2079
2080         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
2081         if (ret)
2082                 return ret;
2083
2084         if (IS_VALLEYVIEW(dev))
2085                 *val = vlv_gpu_freq(dev_priv->mem_freq,
2086                                     dev_priv->rps.min_delay);
2087         else
2088                 *val = dev_priv->rps.min_delay * GT_FREQUENCY_MULTIPLIER;
2089         mutex_unlock(&dev_priv->rps.hw_lock);
2090
2091         return 0;
2092 }
2093
2094 static int
2095 i915_min_freq_set(void *data, u64 val)
2096 {
2097         struct drm_device *dev = data;
2098         struct drm_i915_private *dev_priv = dev->dev_private;
2099         int ret;
2100
2101         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2102                 return -ENODEV;
2103
2104         DRM_DEBUG_DRIVER("Manually setting min freq to %llu\n", val);
2105
2106         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
2107         if (ret)
2108                 return ret;
2109
2110         /*
2111          * Turbo will still be enabled, but won't go below the set value.
2112          */
2113         if (IS_VALLEYVIEW(dev)) {
2114                 val = vlv_freq_opcode(dev_priv->mem_freq, val);
2115                 dev_priv->rps.min_delay = val;
2116                 valleyview_set_rps(dev, val);
2117         } else {
2118                 do_div(val, GT_FREQUENCY_MULTIPLIER);
2119                 dev_priv->rps.min_delay = val;
2120                 gen6_set_rps(dev, val);
2121         }
2122         mutex_unlock(&dev_priv->rps.hw_lock);
2123
2124         return 0;
2125 }
2126
2127 DEFINE_SIMPLE_ATTRIBUTE(i915_min_freq_fops,
2128                         i915_min_freq_get, i915_min_freq_set,
2129                         "%llu\n");
2130
2131 static int
2132 i915_cache_sharing_get(void *data, u64 *val)
2133 {
2134         struct drm_device *dev = data;
2135         drm_i915_private_t *dev_priv = dev->dev_private;
2136         u32 snpcr;
2137         int ret;
2138
2139         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2140                 return -ENODEV;
2141
2142         ret = mutex_lock_interruptible(&dev->struct_mutex);
2143         if (ret)
2144                 return ret;
2145
2146         snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
2147         mutex_unlock(&dev_priv->dev->struct_mutex);
2148
2149         *val = (snpcr & GEN6_MBC_SNPCR_MASK) >> GEN6_MBC_SNPCR_SHIFT;
2150
2151         return 0;
2152 }
2153
2154 static int
2155 i915_cache_sharing_set(void *data, u64 val)
2156 {
2157         struct drm_device *dev = data;
2158         struct drm_i915_private *dev_priv = dev->dev_private;
2159         u32 snpcr;
2160
2161         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2162                 return -ENODEV;
2163
2164         if (val > 3)
2165                 return -EINVAL;
2166
2167         DRM_DEBUG_DRIVER("Manually setting uncore sharing to %llu\n", val);
2168
2169         /* Update the cache sharing policy here as well */
2170         snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
2171         snpcr &= ~GEN6_MBC_SNPCR_MASK;
2172         snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
2173         I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);
2174
2175         return 0;
2176 }
2177
2178 DEFINE_SIMPLE_ATTRIBUTE(i915_cache_sharing_fops,
2179                         i915_cache_sharing_get, i915_cache_sharing_set,
2180                         "%llu\n");
2181
2182 /* As the drm_debugfs_init() routines are called before dev->dev_private is
2183  * allocated we need to hook into the minor for release. */
2184 static int
2185 drm_add_fake_info_node(struct drm_minor *minor,
2186                        struct dentry *ent,
2187                        const void *key)
2188 {
2189         struct drm_info_node *node;
2190
2191         node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
2192         if (node == NULL) {
2193                 debugfs_remove(ent);
2194                 return -ENOMEM;
2195         }
2196
2197         node->minor = minor;
2198         node->dent = ent;
2199         node->info_ent = (void *) key;
2200
2201         mutex_lock(&minor->debugfs_lock);
2202         list_add(&node->list, &minor->debugfs_list);
2203         mutex_unlock(&minor->debugfs_lock);
2204
2205         return 0;
2206 }
2207
2208 static int i915_forcewake_open(struct inode *inode, struct file *file)
2209 {
2210         struct drm_device *dev = inode->i_private;
2211         struct drm_i915_private *dev_priv = dev->dev_private;
2212
2213         if (INTEL_INFO(dev)->gen < 6)
2214                 return 0;
2215
2216         gen6_gt_force_wake_get(dev_priv);
2217
2218         return 0;
2219 }
2220
2221 static int i915_forcewake_release(struct inode *inode, struct file *file)
2222 {
2223         struct drm_device *dev = inode->i_private;
2224         struct drm_i915_private *dev_priv = dev->dev_private;
2225
2226         if (INTEL_INFO(dev)->gen < 6)
2227                 return 0;
2228
2229         gen6_gt_force_wake_put(dev_priv);
2230
2231         return 0;
2232 }
2233
2234 static const struct file_operations i915_forcewake_fops = {
2235         .owner = THIS_MODULE,
2236         .open = i915_forcewake_open,
2237         .release = i915_forcewake_release,
2238 };
2239
2240 static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
2241 {
2242         struct drm_device *dev = minor->dev;
2243         struct dentry *ent;
2244
2245         ent = debugfs_create_file("i915_forcewake_user",
2246                                   S_IRUSR,
2247                                   root, dev,
2248                                   &i915_forcewake_fops);
2249         if (IS_ERR(ent))
2250                 return PTR_ERR(ent);
2251
2252         return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
2253 }
2254
2255 static int i915_debugfs_create(struct dentry *root,
2256                                struct drm_minor *minor,
2257                                const char *name,
2258                                const struct file_operations *fops)
2259 {
2260         struct drm_device *dev = minor->dev;
2261         struct dentry *ent;
2262
2263         ent = debugfs_create_file(name,
2264                                   S_IRUGO | S_IWUSR,
2265                                   root, dev,
2266                                   fops);
2267         if (IS_ERR(ent))
2268                 return PTR_ERR(ent);
2269
2270         return drm_add_fake_info_node(minor, ent, fops);
2271 }
2272
2273 static struct drm_info_list i915_debugfs_list[] = {
2274         {"i915_capabilities", i915_capabilities, 0},
2275         {"i915_gem_objects", i915_gem_object_info, 0},
2276         {"i915_gem_gtt", i915_gem_gtt_info, 0},
2277         {"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST},
2278         {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
2279         {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
2280         {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
2281         {"i915_gem_request", i915_gem_request_info, 0},
2282         {"i915_gem_seqno", i915_gem_seqno_info, 0},
2283         {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2284         {"i915_gem_interrupt", i915_interrupt_info, 0},
2285         {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
2286         {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
2287         {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
2288         {"i915_gem_hws_vebox", i915_hws_info, 0, (void *)VECS},
2289         {"i915_rstdby_delays", i915_rstdby_delays, 0},
2290         {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
2291         {"i915_delayfreq_table", i915_delayfreq_table, 0},
2292         {"i915_inttoext_table", i915_inttoext_table, 0},
2293         {"i915_drpc_info", i915_drpc_info, 0},
2294         {"i915_emon_status", i915_emon_status, 0},
2295         {"i915_ring_freq_table", i915_ring_freq_table, 0},
2296         {"i915_gfxec", i915_gfxec, 0},
2297         {"i915_fbc_status", i915_fbc_status, 0},
2298         {"i915_ips_status", i915_ips_status, 0},
2299         {"i915_sr_status", i915_sr_status, 0},
2300         {"i915_opregion", i915_opregion, 0},
2301         {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
2302         {"i915_context_status", i915_context_status, 0},
2303         {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
2304         {"i915_swizzle_info", i915_swizzle_info, 0},
2305         {"i915_ppgtt_info", i915_ppgtt_info, 0},
2306         {"i915_dpio", i915_dpio_info, 0},
2307 };
2308 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2309
2310 int i915_debugfs_init(struct drm_minor *minor)
2311 {
2312         int ret;
2313
2314         ret = i915_debugfs_create(minor->debugfs_root, minor,
2315                                   "i915_wedged",
2316                                   &i915_wedged_fops);
2317         if (ret)
2318                 return ret;
2319
2320         ret = i915_forcewake_create(minor->debugfs_root, minor);
2321         if (ret)
2322                 return ret;
2323
2324         ret = i915_debugfs_create(minor->debugfs_root, minor,
2325                                   "i915_max_freq",
2326                                   &i915_max_freq_fops);
2327         if (ret)
2328                 return ret;
2329
2330         ret = i915_debugfs_create(minor->debugfs_root, minor,
2331                                   "i915_min_freq",
2332                                   &i915_min_freq_fops);
2333         if (ret)
2334                 return ret;
2335
2336         ret = i915_debugfs_create(minor->debugfs_root, minor,
2337                                   "i915_cache_sharing",
2338                                   &i915_cache_sharing_fops);
2339         if (ret)
2340                 return ret;
2341
2342         ret = i915_debugfs_create(minor->debugfs_root, minor,
2343                                   "i915_ring_stop",
2344                                   &i915_ring_stop_fops);
2345         if (ret)
2346                 return ret;
2347
2348         ret = i915_debugfs_create(minor->debugfs_root, minor,
2349                                   "i915_gem_drop_caches",
2350                                   &i915_drop_caches_fops);
2351         if (ret)
2352                 return ret;
2353
2354         ret = i915_debugfs_create(minor->debugfs_root, minor,
2355                                   "i915_error_state",
2356                                   &i915_error_state_fops);
2357         if (ret)
2358                 return ret;
2359
2360         ret = i915_debugfs_create(minor->debugfs_root, minor,
2361                                  "i915_next_seqno",
2362                                  &i915_next_seqno_fops);
2363         if (ret)
2364                 return ret;
2365
2366         return drm_debugfs_create_files(i915_debugfs_list,
2367                                         I915_DEBUGFS_ENTRIES,
2368                                         minor->debugfs_root, minor);
2369 }
2370
2371 void i915_debugfs_cleanup(struct drm_minor *minor)
2372 {
2373         drm_debugfs_remove_files(i915_debugfs_list,
2374                                  I915_DEBUGFS_ENTRIES, minor);
2375         drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
2376                                  1, minor);
2377         drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
2378                                  1, minor);
2379         drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
2380                                  1, minor);
2381         drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops,
2382                                  1, minor);
2383         drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
2384                                  1, minor);
2385         drm_debugfs_remove_files((struct drm_info_list *) &i915_drop_caches_fops,
2386                                  1, minor);
2387         drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops,
2388                                  1, minor);
2389         drm_debugfs_remove_files((struct drm_info_list *) &i915_error_state_fops,
2390                                  1, minor);
2391         drm_debugfs_remove_files((struct drm_info_list *) &i915_next_seqno_fops,
2392                                  1, minor);
2393 }
2394
2395 #endif /* CONFIG_DEBUG_FS */