2 * Copyright © 2008 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 * Eric Anholt <eric@anholt.net>
25 * Keith Packard <keithp@keithp.com>
29 #include <linux/seq_file.h>
30 #include <linux/debugfs.h>
31 #include <linux/slab.h>
32 #include <linux/export.h>
34 #include "intel_drv.h"
35 #include "intel_ringbuffer.h"
36 #include <drm/i915_drm.h>
39 #define DRM_I915_RING_DEBUG 1
42 #if defined(CONFIG_DEBUG_FS)
50 static const char *yesno(int v)
52 return v ? "yes" : "no";
55 static int i915_capabilities(struct seq_file *m, void *data)
57 struct drm_info_node *node = (struct drm_info_node *) m->private;
58 struct drm_device *dev = node->minor->dev;
59 const struct intel_device_info *info = INTEL_INFO(dev);
61 seq_printf(m, "gen: %d\n", info->gen);
62 seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
63 #define DEV_INFO_FLAG(x) seq_printf(m, #x ": %s\n", yesno(info->x))
64 #define DEV_INFO_SEP ;
72 static const char *get_pin_flag(struct drm_i915_gem_object *obj)
74 if (obj->user_pin_count > 0)
76 else if (obj->pin_count > 0)
82 static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
84 switch (obj->tiling_mode) {
86 case I915_TILING_NONE: return " ";
87 case I915_TILING_X: return "X";
88 case I915_TILING_Y: return "Y";
92 static const char *cache_level_str(int type)
95 case I915_CACHE_NONE: return " uncached";
96 case I915_CACHE_LLC: return " snooped (LLC)";
97 case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
103 describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
105 seq_printf(m, "%p: %s%s %8zdKiB %04x %04x %d %d %d%s%s%s",
108 get_tiling_flag(obj),
109 obj->base.size / 1024,
110 obj->base.read_domains,
111 obj->base.write_domain,
112 obj->last_read_seqno,
113 obj->last_write_seqno,
114 obj->last_fenced_seqno,
115 cache_level_str(obj->cache_level),
116 obj->dirty ? " dirty" : "",
117 obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
119 seq_printf(m, " (name: %d)", obj->base.name);
121 seq_printf(m, " (pinned x %d)", obj->pin_count);
122 if (obj->fence_reg != I915_FENCE_REG_NONE)
123 seq_printf(m, " (fence: %d)", obj->fence_reg);
124 if (obj->gtt_space != NULL)
125 seq_printf(m, " (gtt offset: %08x, size: %08x)",
126 obj->gtt_offset, (unsigned int)obj->gtt_space->size);
127 if (obj->pin_mappable || obj->fault_mappable) {
129 if (obj->pin_mappable)
131 if (obj->fault_mappable)
134 seq_printf(m, " (%s mappable)", s);
136 if (obj->ring != NULL)
137 seq_printf(m, " (%s)", obj->ring->name);
140 static int i915_gem_object_list_info(struct seq_file *m, void *data)
142 struct drm_info_node *node = (struct drm_info_node *) m->private;
143 uintptr_t list = (uintptr_t) node->info_ent->data;
144 struct list_head *head;
145 struct drm_device *dev = node->minor->dev;
146 drm_i915_private_t *dev_priv = dev->dev_private;
147 struct drm_i915_gem_object *obj;
148 size_t total_obj_size, total_gtt_size;
151 ret = mutex_lock_interruptible(&dev->struct_mutex);
157 seq_printf(m, "Active:\n");
158 head = &dev_priv->mm.active_list;
161 seq_printf(m, "Inactive:\n");
162 head = &dev_priv->mm.inactive_list;
165 mutex_unlock(&dev->struct_mutex);
169 total_obj_size = total_gtt_size = count = 0;
170 list_for_each_entry(obj, head, mm_list) {
172 describe_obj(m, obj);
174 total_obj_size += obj->base.size;
175 total_gtt_size += obj->gtt_space->size;
178 mutex_unlock(&dev->struct_mutex);
180 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
181 count, total_obj_size, total_gtt_size);
185 #define count_objects(list, member) do { \
186 list_for_each_entry(obj, list, member) { \
187 size += obj->gtt_space->size; \
189 if (obj->map_and_fenceable) { \
190 mappable_size += obj->gtt_space->size; \
196 static int i915_gem_object_info(struct seq_file *m, void* data)
198 struct drm_info_node *node = (struct drm_info_node *) m->private;
199 struct drm_device *dev = node->minor->dev;
200 struct drm_i915_private *dev_priv = dev->dev_private;
201 u32 count, mappable_count, purgeable_count;
202 size_t size, mappable_size, purgeable_size;
203 struct drm_i915_gem_object *obj;
206 ret = mutex_lock_interruptible(&dev->struct_mutex);
210 seq_printf(m, "%u objects, %zu bytes\n",
211 dev_priv->mm.object_count,
212 dev_priv->mm.object_memory);
214 size = count = mappable_size = mappable_count = 0;
215 count_objects(&dev_priv->mm.bound_list, gtt_list);
216 seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
217 count, mappable_count, size, mappable_size);
219 size = count = mappable_size = mappable_count = 0;
220 count_objects(&dev_priv->mm.active_list, mm_list);
221 seq_printf(m, " %u [%u] active objects, %zu [%zu] bytes\n",
222 count, mappable_count, size, mappable_size);
224 size = count = mappable_size = mappable_count = 0;
225 count_objects(&dev_priv->mm.inactive_list, mm_list);
226 seq_printf(m, " %u [%u] inactive objects, %zu [%zu] bytes\n",
227 count, mappable_count, size, mappable_size);
229 size = count = purgeable_size = purgeable_count = 0;
230 list_for_each_entry(obj, &dev_priv->mm.unbound_list, gtt_list) {
231 size += obj->base.size, ++count;
232 if (obj->madv == I915_MADV_DONTNEED)
233 purgeable_size += obj->base.size, ++purgeable_count;
235 seq_printf(m, "%u unbound objects, %zu bytes\n", count, size);
237 size = count = mappable_size = mappable_count = 0;
238 list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
239 if (obj->fault_mappable) {
240 size += obj->gtt_space->size;
243 if (obj->pin_mappable) {
244 mappable_size += obj->gtt_space->size;
247 if (obj->madv == I915_MADV_DONTNEED) {
248 purgeable_size += obj->base.size;
252 seq_printf(m, "%u purgeable objects, %zu bytes\n",
253 purgeable_count, purgeable_size);
254 seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
255 mappable_count, mappable_size);
256 seq_printf(m, "%u fault mappable objects, %zu bytes\n",
259 seq_printf(m, "%zu [%zu] gtt total\n",
260 dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
262 mutex_unlock(&dev->struct_mutex);
267 static int i915_gem_gtt_info(struct seq_file *m, void* data)
269 struct drm_info_node *node = (struct drm_info_node *) m->private;
270 struct drm_device *dev = node->minor->dev;
271 uintptr_t list = (uintptr_t) node->info_ent->data;
272 struct drm_i915_private *dev_priv = dev->dev_private;
273 struct drm_i915_gem_object *obj;
274 size_t total_obj_size, total_gtt_size;
277 ret = mutex_lock_interruptible(&dev->struct_mutex);
281 total_obj_size = total_gtt_size = count = 0;
282 list_for_each_entry(obj, &dev_priv->mm.bound_list, gtt_list) {
283 if (list == PINNED_LIST && obj->pin_count == 0)
287 describe_obj(m, obj);
289 total_obj_size += obj->base.size;
290 total_gtt_size += obj->gtt_space->size;
294 mutex_unlock(&dev->struct_mutex);
296 seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
297 count, total_obj_size, total_gtt_size);
302 static int i915_gem_pageflip_info(struct seq_file *m, void *data)
304 struct drm_info_node *node = (struct drm_info_node *) m->private;
305 struct drm_device *dev = node->minor->dev;
307 struct intel_crtc *crtc;
309 list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
310 const char pipe = pipe_name(crtc->pipe);
311 const char plane = plane_name(crtc->plane);
312 struct intel_unpin_work *work;
314 spin_lock_irqsave(&dev->event_lock, flags);
315 work = crtc->unpin_work;
317 seq_printf(m, "No flip due on pipe %c (plane %c)\n",
320 if (!work->pending) {
321 seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
324 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
327 if (work->enable_stall_check)
328 seq_printf(m, "Stall check enabled, ");
330 seq_printf(m, "Stall check waiting for page flip ioctl, ");
331 seq_printf(m, "%d prepares\n", work->pending);
333 if (work->old_fb_obj) {
334 struct drm_i915_gem_object *obj = work->old_fb_obj;
336 seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
338 if (work->pending_flip_obj) {
339 struct drm_i915_gem_object *obj = work->pending_flip_obj;
341 seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
344 spin_unlock_irqrestore(&dev->event_lock, flags);
350 static int i915_gem_request_info(struct seq_file *m, void *data)
352 struct drm_info_node *node = (struct drm_info_node *) m->private;
353 struct drm_device *dev = node->minor->dev;
354 drm_i915_private_t *dev_priv = dev->dev_private;
355 struct intel_ring_buffer *ring;
356 struct drm_i915_gem_request *gem_request;
359 ret = mutex_lock_interruptible(&dev->struct_mutex);
364 for_each_ring(ring, dev_priv, i) {
365 if (list_empty(&ring->request_list))
368 seq_printf(m, "%s requests:\n", ring->name);
369 list_for_each_entry(gem_request,
372 seq_printf(m, " %d @ %d\n",
374 (int) (jiffies - gem_request->emitted_jiffies));
378 mutex_unlock(&dev->struct_mutex);
381 seq_printf(m, "No requests\n");
386 static void i915_ring_seqno_info(struct seq_file *m,
387 struct intel_ring_buffer *ring)
389 if (ring->get_seqno) {
390 seq_printf(m, "Current sequence (%s): %d\n",
391 ring->name, ring->get_seqno(ring, false));
395 static int i915_gem_seqno_info(struct seq_file *m, void *data)
397 struct drm_info_node *node = (struct drm_info_node *) m->private;
398 struct drm_device *dev = node->minor->dev;
399 drm_i915_private_t *dev_priv = dev->dev_private;
400 struct intel_ring_buffer *ring;
403 ret = mutex_lock_interruptible(&dev->struct_mutex);
407 for_each_ring(ring, dev_priv, i)
408 i915_ring_seqno_info(m, ring);
410 mutex_unlock(&dev->struct_mutex);
416 static int i915_interrupt_info(struct seq_file *m, void *data)
418 struct drm_info_node *node = (struct drm_info_node *) m->private;
419 struct drm_device *dev = node->minor->dev;
420 drm_i915_private_t *dev_priv = dev->dev_private;
421 struct intel_ring_buffer *ring;
424 ret = mutex_lock_interruptible(&dev->struct_mutex);
428 if (IS_VALLEYVIEW(dev)) {
429 seq_printf(m, "Display IER:\t%08x\n",
431 seq_printf(m, "Display IIR:\t%08x\n",
433 seq_printf(m, "Display IIR_RW:\t%08x\n",
434 I915_READ(VLV_IIR_RW));
435 seq_printf(m, "Display IMR:\t%08x\n",
438 seq_printf(m, "Pipe %c stat:\t%08x\n",
440 I915_READ(PIPESTAT(pipe)));
442 seq_printf(m, "Master IER:\t%08x\n",
443 I915_READ(VLV_MASTER_IER));
445 seq_printf(m, "Render IER:\t%08x\n",
447 seq_printf(m, "Render IIR:\t%08x\n",
449 seq_printf(m, "Render IMR:\t%08x\n",
452 seq_printf(m, "PM IER:\t\t%08x\n",
453 I915_READ(GEN6_PMIER));
454 seq_printf(m, "PM IIR:\t\t%08x\n",
455 I915_READ(GEN6_PMIIR));
456 seq_printf(m, "PM IMR:\t\t%08x\n",
457 I915_READ(GEN6_PMIMR));
459 seq_printf(m, "Port hotplug:\t%08x\n",
460 I915_READ(PORT_HOTPLUG_EN));
461 seq_printf(m, "DPFLIPSTAT:\t%08x\n",
462 I915_READ(VLV_DPFLIPSTAT));
463 seq_printf(m, "DPINVGTT:\t%08x\n",
464 I915_READ(DPINVGTT));
466 } else if (!HAS_PCH_SPLIT(dev)) {
467 seq_printf(m, "Interrupt enable: %08x\n",
469 seq_printf(m, "Interrupt identity: %08x\n",
471 seq_printf(m, "Interrupt mask: %08x\n",
474 seq_printf(m, "Pipe %c stat: %08x\n",
476 I915_READ(PIPESTAT(pipe)));
478 seq_printf(m, "North Display Interrupt enable: %08x\n",
480 seq_printf(m, "North Display Interrupt identity: %08x\n",
482 seq_printf(m, "North Display Interrupt mask: %08x\n",
484 seq_printf(m, "South Display Interrupt enable: %08x\n",
486 seq_printf(m, "South Display Interrupt identity: %08x\n",
488 seq_printf(m, "South Display Interrupt mask: %08x\n",
490 seq_printf(m, "Graphics Interrupt enable: %08x\n",
492 seq_printf(m, "Graphics Interrupt identity: %08x\n",
494 seq_printf(m, "Graphics Interrupt mask: %08x\n",
497 seq_printf(m, "Interrupts received: %d\n",
498 atomic_read(&dev_priv->irq_received));
499 for_each_ring(ring, dev_priv, i) {
500 if (IS_GEN6(dev) || IS_GEN7(dev)) {
502 "Graphics Interrupt mask (%s): %08x\n",
503 ring->name, I915_READ_IMR(ring));
505 i915_ring_seqno_info(m, ring);
507 mutex_unlock(&dev->struct_mutex);
512 static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
514 struct drm_info_node *node = (struct drm_info_node *) m->private;
515 struct drm_device *dev = node->minor->dev;
516 drm_i915_private_t *dev_priv = dev->dev_private;
519 ret = mutex_lock_interruptible(&dev->struct_mutex);
523 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
524 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
525 for (i = 0; i < dev_priv->num_fence_regs; i++) {
526 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
528 seq_printf(m, "Fence %d, pin count = %d, object = ",
529 i, dev_priv->fence_regs[i].pin_count);
531 seq_printf(m, "unused");
533 describe_obj(m, obj);
537 mutex_unlock(&dev->struct_mutex);
541 static int i915_hws_info(struct seq_file *m, void *data)
543 struct drm_info_node *node = (struct drm_info_node *) m->private;
544 struct drm_device *dev = node->minor->dev;
545 drm_i915_private_t *dev_priv = dev->dev_private;
546 struct intel_ring_buffer *ring;
547 const volatile u32 __iomem *hws;
550 ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
551 hws = (volatile u32 __iomem *)ring->status_page.page_addr;
555 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
556 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
558 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
563 static const char *ring_str(int ring)
566 case RCS: return "render";
567 case VCS: return "bsd";
568 case BCS: return "blt";
573 static const char *pin_flag(int pinned)
583 static const char *tiling_flag(int tiling)
587 case I915_TILING_NONE: return "";
588 case I915_TILING_X: return " X";
589 case I915_TILING_Y: return " Y";
593 static const char *dirty_flag(int dirty)
595 return dirty ? " dirty" : "";
598 static const char *purgeable_flag(int purgeable)
600 return purgeable ? " purgeable" : "";
603 static void print_error_buffers(struct seq_file *m,
605 struct drm_i915_error_buffer *err,
608 seq_printf(m, "%s [%d]:\n", name, count);
611 seq_printf(m, " %08x %8u %04x %04x %x %x%s%s%s%s%s%s%s",
616 err->rseqno, err->wseqno,
617 pin_flag(err->pinned),
618 tiling_flag(err->tiling),
619 dirty_flag(err->dirty),
620 purgeable_flag(err->purgeable),
621 err->ring != -1 ? " " : "",
623 cache_level_str(err->cache_level));
626 seq_printf(m, " (name: %d)", err->name);
627 if (err->fence_reg != I915_FENCE_REG_NONE)
628 seq_printf(m, " (fence: %d)", err->fence_reg);
635 static void i915_ring_error_state(struct seq_file *m,
636 struct drm_device *dev,
637 struct drm_i915_error_state *error,
640 BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
641 seq_printf(m, "%s command stream:\n", ring_str(ring));
642 seq_printf(m, " HEAD: 0x%08x\n", error->head[ring]);
643 seq_printf(m, " TAIL: 0x%08x\n", error->tail[ring]);
644 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[ring]);
645 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[ring]);
646 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[ring]);
647 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone[ring]);
648 if (ring == RCS && INTEL_INFO(dev)->gen >= 4)
649 seq_printf(m, " BBADDR: 0x%08llx\n", error->bbaddr);
651 if (INTEL_INFO(dev)->gen >= 4)
652 seq_printf(m, " INSTPS: 0x%08x\n", error->instps[ring]);
653 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm[ring]);
654 seq_printf(m, " FADDR: 0x%08x\n", error->faddr[ring]);
655 if (INTEL_INFO(dev)->gen >= 6) {
656 seq_printf(m, " RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
657 seq_printf(m, " FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
658 seq_printf(m, " SYNC_0: 0x%08x\n",
659 error->semaphore_mboxes[ring][0]);
660 seq_printf(m, " SYNC_1: 0x%08x\n",
661 error->semaphore_mboxes[ring][1]);
663 seq_printf(m, " seqno: 0x%08x\n", error->seqno[ring]);
664 seq_printf(m, " waiting: %s\n", yesno(error->waiting[ring]));
665 seq_printf(m, " ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
666 seq_printf(m, " ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
669 struct i915_error_state_file_priv {
670 struct drm_device *dev;
671 struct drm_i915_error_state *error;
674 static int i915_error_state(struct seq_file *m, void *unused)
676 struct i915_error_state_file_priv *error_priv = m->private;
677 struct drm_device *dev = error_priv->dev;
678 drm_i915_private_t *dev_priv = dev->dev_private;
679 struct drm_i915_error_state *error = error_priv->error;
680 struct intel_ring_buffer *ring;
681 int i, j, page, offset, elt;
684 seq_printf(m, "no error state collected\n");
688 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
689 error->time.tv_usec);
690 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
691 seq_printf(m, "EIR: 0x%08x\n", error->eir);
692 seq_printf(m, "IER: 0x%08x\n", error->ier);
693 seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
694 seq_printf(m, "CCID: 0x%08x\n", error->ccid);
696 for (i = 0; i < dev_priv->num_fence_regs; i++)
697 seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]);
699 for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++)
700 seq_printf(m, " INSTDONE_%d: 0x%08x\n", i, error->extra_instdone[i]);
702 if (INTEL_INFO(dev)->gen >= 6) {
703 seq_printf(m, "ERROR: 0x%08x\n", error->error);
704 seq_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
707 if (INTEL_INFO(dev)->gen == 7)
708 seq_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
710 for_each_ring(ring, dev_priv, i)
711 i915_ring_error_state(m, dev, error, i);
713 if (error->active_bo)
714 print_error_buffers(m, "Active",
716 error->active_bo_count);
718 if (error->pinned_bo)
719 print_error_buffers(m, "Pinned",
721 error->pinned_bo_count);
723 for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
724 struct drm_i915_error_object *obj;
726 if ((obj = error->ring[i].batchbuffer)) {
727 seq_printf(m, "%s --- gtt_offset = 0x%08x\n",
728 dev_priv->ring[i].name,
731 for (page = 0; page < obj->page_count; page++) {
732 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
733 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]);
739 if (error->ring[i].num_requests) {
740 seq_printf(m, "%s --- %d requests\n",
741 dev_priv->ring[i].name,
742 error->ring[i].num_requests);
743 for (j = 0; j < error->ring[i].num_requests; j++) {
744 seq_printf(m, " seqno 0x%08x, emitted %ld, tail 0x%08x\n",
745 error->ring[i].requests[j].seqno,
746 error->ring[i].requests[j].jiffies,
747 error->ring[i].requests[j].tail);
751 if ((obj = error->ring[i].ringbuffer)) {
752 seq_printf(m, "%s --- ringbuffer = 0x%08x\n",
753 dev_priv->ring[i].name,
756 for (page = 0; page < obj->page_count; page++) {
757 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
758 seq_printf(m, "%08x : %08x\n",
760 obj->pages[page][elt]);
768 intel_overlay_print_error_state(m, error->overlay);
771 intel_display_print_error_state(m, dev, error->display);
777 i915_error_state_write(struct file *filp,
778 const char __user *ubuf,
782 struct seq_file *m = filp->private_data;
783 struct i915_error_state_file_priv *error_priv = m->private;
784 struct drm_device *dev = error_priv->dev;
787 DRM_DEBUG_DRIVER("Resetting error state\n");
789 ret = mutex_lock_interruptible(&dev->struct_mutex);
793 i915_destroy_error_state(dev);
794 mutex_unlock(&dev->struct_mutex);
799 static int i915_error_state_open(struct inode *inode, struct file *file)
801 struct drm_device *dev = inode->i_private;
802 drm_i915_private_t *dev_priv = dev->dev_private;
803 struct i915_error_state_file_priv *error_priv;
806 error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);
810 error_priv->dev = dev;
812 spin_lock_irqsave(&dev_priv->error_lock, flags);
813 error_priv->error = dev_priv->first_error;
814 if (error_priv->error)
815 kref_get(&error_priv->error->ref);
816 spin_unlock_irqrestore(&dev_priv->error_lock, flags);
818 return single_open(file, i915_error_state, error_priv);
821 static int i915_error_state_release(struct inode *inode, struct file *file)
823 struct seq_file *m = file->private_data;
824 struct i915_error_state_file_priv *error_priv = m->private;
826 if (error_priv->error)
827 kref_put(&error_priv->error->ref, i915_error_state_free);
830 return single_release(inode, file);
833 static const struct file_operations i915_error_state_fops = {
834 .owner = THIS_MODULE,
835 .open = i915_error_state_open,
837 .write = i915_error_state_write,
838 .llseek = default_llseek,
839 .release = i915_error_state_release,
842 static int i915_rstdby_delays(struct seq_file *m, void *unused)
844 struct drm_info_node *node = (struct drm_info_node *) m->private;
845 struct drm_device *dev = node->minor->dev;
846 drm_i915_private_t *dev_priv = dev->dev_private;
850 ret = mutex_lock_interruptible(&dev->struct_mutex);
854 crstanddelay = I915_READ16(CRSTANDVID);
856 mutex_unlock(&dev->struct_mutex);
858 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
863 static int i915_cur_delayinfo(struct seq_file *m, void *unused)
865 struct drm_info_node *node = (struct drm_info_node *) m->private;
866 struct drm_device *dev = node->minor->dev;
867 drm_i915_private_t *dev_priv = dev->dev_private;
871 u16 rgvswctl = I915_READ16(MEMSWCTL);
872 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
874 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
875 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
876 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
878 seq_printf(m, "Current P-state: %d\n",
879 (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
880 } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
881 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
882 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
883 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
885 u32 rpupei, rpcurup, rpprevup;
886 u32 rpdownei, rpcurdown, rpprevdown;
889 /* RPSTAT1 is in the GT power well */
890 ret = mutex_lock_interruptible(&dev->struct_mutex);
894 gen6_gt_force_wake_get(dev_priv);
896 rpstat = I915_READ(GEN6_RPSTAT1);
897 rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
898 rpcurup = I915_READ(GEN6_RP_CUR_UP);
899 rpprevup = I915_READ(GEN6_RP_PREV_UP);
900 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
901 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
902 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
904 gen6_gt_force_wake_put(dev_priv);
905 mutex_unlock(&dev->struct_mutex);
907 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
908 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
909 seq_printf(m, "Render p-state ratio: %d\n",
910 (gt_perf_status & 0xff00) >> 8);
911 seq_printf(m, "Render p-state VID: %d\n",
912 gt_perf_status & 0xff);
913 seq_printf(m, "Render p-state limit: %d\n",
914 rp_state_limits & 0xff);
915 seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >>
916 GEN6_CAGF_SHIFT) * GT_FREQUENCY_MULTIPLIER);
917 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
919 seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
920 GEN6_CURBSYTAVG_MASK);
921 seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
922 GEN6_CURBSYTAVG_MASK);
923 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
925 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
926 GEN6_CURBSYTAVG_MASK);
927 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
928 GEN6_CURBSYTAVG_MASK);
930 max_freq = (rp_state_cap & 0xff0000) >> 16;
931 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
932 max_freq * GT_FREQUENCY_MULTIPLIER);
934 max_freq = (rp_state_cap & 0xff00) >> 8;
935 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
936 max_freq * GT_FREQUENCY_MULTIPLIER);
938 max_freq = rp_state_cap & 0xff;
939 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
940 max_freq * GT_FREQUENCY_MULTIPLIER);
942 seq_printf(m, "no P-state info available\n");
948 static int i915_delayfreq_table(struct seq_file *m, void *unused)
950 struct drm_info_node *node = (struct drm_info_node *) m->private;
951 struct drm_device *dev = node->minor->dev;
952 drm_i915_private_t *dev_priv = dev->dev_private;
956 ret = mutex_lock_interruptible(&dev->struct_mutex);
960 for (i = 0; i < 16; i++) {
961 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
962 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
963 (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
966 mutex_unlock(&dev->struct_mutex);
971 static inline int MAP_TO_MV(int map)
973 return 1250 - (map * 25);
976 static int i915_inttoext_table(struct seq_file *m, void *unused)
978 struct drm_info_node *node = (struct drm_info_node *) m->private;
979 struct drm_device *dev = node->minor->dev;
980 drm_i915_private_t *dev_priv = dev->dev_private;
984 ret = mutex_lock_interruptible(&dev->struct_mutex);
988 for (i = 1; i <= 32; i++) {
989 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
990 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
993 mutex_unlock(&dev->struct_mutex);
998 static int ironlake_drpc_info(struct seq_file *m)
1000 struct drm_info_node *node = (struct drm_info_node *) m->private;
1001 struct drm_device *dev = node->minor->dev;
1002 drm_i915_private_t *dev_priv = dev->dev_private;
1003 u32 rgvmodectl, rstdbyctl;
1007 ret = mutex_lock_interruptible(&dev->struct_mutex);
1011 rgvmodectl = I915_READ(MEMMODECTL);
1012 rstdbyctl = I915_READ(RSTDBYCTL);
1013 crstandvid = I915_READ16(CRSTANDVID);
1015 mutex_unlock(&dev->struct_mutex);
1017 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
1019 seq_printf(m, "Boost freq: %d\n",
1020 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
1021 MEMMODE_BOOST_FREQ_SHIFT);
1022 seq_printf(m, "HW control enabled: %s\n",
1023 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
1024 seq_printf(m, "SW control enabled: %s\n",
1025 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
1026 seq_printf(m, "Gated voltage change: %s\n",
1027 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
1028 seq_printf(m, "Starting frequency: P%d\n",
1029 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
1030 seq_printf(m, "Max P-state: P%d\n",
1031 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
1032 seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
1033 seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
1034 seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
1035 seq_printf(m, "Render standby enabled: %s\n",
1036 (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
1037 seq_printf(m, "Current RS state: ");
1038 switch (rstdbyctl & RSX_STATUS_MASK) {
1040 seq_printf(m, "on\n");
1042 case RSX_STATUS_RC1:
1043 seq_printf(m, "RC1\n");
1045 case RSX_STATUS_RC1E:
1046 seq_printf(m, "RC1E\n");
1048 case RSX_STATUS_RS1:
1049 seq_printf(m, "RS1\n");
1051 case RSX_STATUS_RS2:
1052 seq_printf(m, "RS2 (RC6)\n");
1054 case RSX_STATUS_RS3:
1055 seq_printf(m, "RC3 (RC6+)\n");
1058 seq_printf(m, "unknown\n");
1065 static int gen6_drpc_info(struct seq_file *m)
1068 struct drm_info_node *node = (struct drm_info_node *) m->private;
1069 struct drm_device *dev = node->minor->dev;
1070 struct drm_i915_private *dev_priv = dev->dev_private;
1071 u32 rpmodectl1, gt_core_status, rcctl1;
1072 unsigned forcewake_count;
1076 ret = mutex_lock_interruptible(&dev->struct_mutex);
1080 spin_lock_irq(&dev_priv->gt_lock);
1081 forcewake_count = dev_priv->forcewake_count;
1082 spin_unlock_irq(&dev_priv->gt_lock);
1084 if (forcewake_count) {
1085 seq_printf(m, "RC information inaccurate because somebody "
1086 "holds a forcewake reference \n");
1088 /* NB: we cannot use forcewake, else we read the wrong values */
1089 while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
1091 seq_printf(m, "RC information accurate: %s\n", yesno(count < 51));
1094 gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
1095 trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);
1097 rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
1098 rcctl1 = I915_READ(GEN6_RC_CONTROL);
1099 mutex_unlock(&dev->struct_mutex);
1101 seq_printf(m, "Video Turbo Mode: %s\n",
1102 yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
1103 seq_printf(m, "HW control enabled: %s\n",
1104 yesno(rpmodectl1 & GEN6_RP_ENABLE));
1105 seq_printf(m, "SW control enabled: %s\n",
1106 yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
1107 GEN6_RP_MEDIA_SW_MODE));
1108 seq_printf(m, "RC1e Enabled: %s\n",
1109 yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
1110 seq_printf(m, "RC6 Enabled: %s\n",
1111 yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
1112 seq_printf(m, "Deep RC6 Enabled: %s\n",
1113 yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
1114 seq_printf(m, "Deepest RC6 Enabled: %s\n",
1115 yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));
1116 seq_printf(m, "Current RC state: ");
1117 switch (gt_core_status & GEN6_RCn_MASK) {
1119 if (gt_core_status & GEN6_CORE_CPD_STATE_MASK)
1120 seq_printf(m, "Core Power Down\n");
1122 seq_printf(m, "on\n");
1125 seq_printf(m, "RC3\n");
1128 seq_printf(m, "RC6\n");
1131 seq_printf(m, "RC7\n");
1134 seq_printf(m, "Unknown\n");
1138 seq_printf(m, "Core Power Down: %s\n",
1139 yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
1141 /* Not exactly sure what this is */
1142 seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1143 I915_READ(GEN6_GT_GFX_RC6_LOCKED));
1144 seq_printf(m, "RC6 residency since boot: %u\n",
1145 I915_READ(GEN6_GT_GFX_RC6));
1146 seq_printf(m, "RC6+ residency since boot: %u\n",
1147 I915_READ(GEN6_GT_GFX_RC6p));
1148 seq_printf(m, "RC6++ residency since boot: %u\n",
1149 I915_READ(GEN6_GT_GFX_RC6pp));
1154 static int i915_drpc_info(struct seq_file *m, void *unused)
1156 struct drm_info_node *node = (struct drm_info_node *) m->private;
1157 struct drm_device *dev = node->minor->dev;
1159 if (IS_GEN6(dev) || IS_GEN7(dev))
1160 return gen6_drpc_info(m);
1162 return ironlake_drpc_info(m);
1165 static int i915_fbc_status(struct seq_file *m, void *unused)
1167 struct drm_info_node *node = (struct drm_info_node *) m->private;
1168 struct drm_device *dev = node->minor->dev;
1169 drm_i915_private_t *dev_priv = dev->dev_private;
1171 if (!I915_HAS_FBC(dev)) {
1172 seq_printf(m, "FBC unsupported on this chipset\n");
1176 if (intel_fbc_enabled(dev)) {
1177 seq_printf(m, "FBC enabled\n");
1179 seq_printf(m, "FBC disabled: ");
1180 switch (dev_priv->no_fbc_reason) {
1182 seq_printf(m, "no outputs");
1184 case FBC_STOLEN_TOO_SMALL:
1185 seq_printf(m, "not enough stolen memory");
1187 case FBC_UNSUPPORTED_MODE:
1188 seq_printf(m, "mode not supported");
1190 case FBC_MODE_TOO_LARGE:
1191 seq_printf(m, "mode too large");
1194 seq_printf(m, "FBC unsupported on plane");
1197 seq_printf(m, "scanout buffer not tiled");
1199 case FBC_MULTIPLE_PIPES:
1200 seq_printf(m, "multiple pipes are enabled");
1202 case FBC_MODULE_PARAM:
1203 seq_printf(m, "disabled per module param (default off)");
1206 seq_printf(m, "unknown reason");
1208 seq_printf(m, "\n");
1213 static int i915_sr_status(struct seq_file *m, void *unused)
1215 struct drm_info_node *node = (struct drm_info_node *) m->private;
1216 struct drm_device *dev = node->minor->dev;
1217 drm_i915_private_t *dev_priv = dev->dev_private;
1218 bool sr_enabled = false;
1220 if (HAS_PCH_SPLIT(dev))
1221 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
1222 else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
1223 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
1224 else if (IS_I915GM(dev))
1225 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
1226 else if (IS_PINEVIEW(dev))
1227 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
1229 seq_printf(m, "self-refresh: %s\n",
1230 sr_enabled ? "enabled" : "disabled");
1235 static int i915_emon_status(struct seq_file *m, void *unused)
1237 struct drm_info_node *node = (struct drm_info_node *) m->private;
1238 struct drm_device *dev = node->minor->dev;
1239 drm_i915_private_t *dev_priv = dev->dev_private;
1240 unsigned long temp, chipset, gfx;
1246 ret = mutex_lock_interruptible(&dev->struct_mutex);
1250 temp = i915_mch_val(dev_priv);
1251 chipset = i915_chipset_val(dev_priv);
1252 gfx = i915_gfx_val(dev_priv);
1253 mutex_unlock(&dev->struct_mutex);
1255 seq_printf(m, "GMCH temp: %ld\n", temp);
1256 seq_printf(m, "Chipset power: %ld\n", chipset);
1257 seq_printf(m, "GFX power: %ld\n", gfx);
1258 seq_printf(m, "Total power: %ld\n", chipset + gfx);
1263 static int i915_ring_freq_table(struct seq_file *m, void *unused)
1265 struct drm_info_node *node = (struct drm_info_node *) m->private;
1266 struct drm_device *dev = node->minor->dev;
1267 drm_i915_private_t *dev_priv = dev->dev_private;
1269 int gpu_freq, ia_freq;
1271 if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
1272 seq_printf(m, "unsupported on this chipset\n");
1276 ret = mutex_lock_interruptible(&dev->struct_mutex);
1280 seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n");
1282 for (gpu_freq = dev_priv->rps.min_delay;
1283 gpu_freq <= dev_priv->rps.max_delay;
1285 I915_WRITE(GEN6_PCODE_DATA, gpu_freq);
1286 I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY |
1287 GEN6_PCODE_READ_MIN_FREQ_TABLE);
1288 if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &
1289 GEN6_PCODE_READY) == 0, 10)) {
1290 DRM_ERROR("pcode read of freq table timed out\n");
1293 ia_freq = I915_READ(GEN6_PCODE_DATA);
1294 seq_printf(m, "%d\t\t%d\n", gpu_freq * GT_FREQUENCY_MULTIPLIER, ia_freq * 100);
1297 mutex_unlock(&dev->struct_mutex);
1302 static int i915_gfxec(struct seq_file *m, void *unused)
1304 struct drm_info_node *node = (struct drm_info_node *) m->private;
1305 struct drm_device *dev = node->minor->dev;
1306 drm_i915_private_t *dev_priv = dev->dev_private;
1309 ret = mutex_lock_interruptible(&dev->struct_mutex);
1313 seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1315 mutex_unlock(&dev->struct_mutex);
1320 static int i915_opregion(struct seq_file *m, void *unused)
1322 struct drm_info_node *node = (struct drm_info_node *) m->private;
1323 struct drm_device *dev = node->minor->dev;
1324 drm_i915_private_t *dev_priv = dev->dev_private;
1325 struct intel_opregion *opregion = &dev_priv->opregion;
1326 void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL);
1332 ret = mutex_lock_interruptible(&dev->struct_mutex);
1336 if (opregion->header) {
1337 memcpy_fromio(data, opregion->header, OPREGION_SIZE);
1338 seq_write(m, data, OPREGION_SIZE);
1341 mutex_unlock(&dev->struct_mutex);
1348 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1350 struct drm_info_node *node = (struct drm_info_node *) m->private;
1351 struct drm_device *dev = node->minor->dev;
1352 drm_i915_private_t *dev_priv = dev->dev_private;
1353 struct intel_fbdev *ifbdev;
1354 struct intel_framebuffer *fb;
1357 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1361 ifbdev = dev_priv->fbdev;
1362 fb = to_intel_framebuffer(ifbdev->helper.fb);
1364 seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
1368 fb->base.bits_per_pixel);
1369 describe_obj(m, fb->obj);
1370 seq_printf(m, "\n");
1372 list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1373 if (&fb->base == ifbdev->helper.fb)
1376 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
1380 fb->base.bits_per_pixel);
1381 describe_obj(m, fb->obj);
1382 seq_printf(m, "\n");
1385 mutex_unlock(&dev->mode_config.mutex);
1390 static int i915_context_status(struct seq_file *m, void *unused)
1392 struct drm_info_node *node = (struct drm_info_node *) m->private;
1393 struct drm_device *dev = node->minor->dev;
1394 drm_i915_private_t *dev_priv = dev->dev_private;
1397 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1401 if (dev_priv->pwrctx) {
1402 seq_printf(m, "power context ");
1403 describe_obj(m, dev_priv->pwrctx);
1404 seq_printf(m, "\n");
1407 if (dev_priv->renderctx) {
1408 seq_printf(m, "render context ");
1409 describe_obj(m, dev_priv->renderctx);
1410 seq_printf(m, "\n");
1413 mutex_unlock(&dev->mode_config.mutex);
1418 static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
1420 struct drm_info_node *node = (struct drm_info_node *) m->private;
1421 struct drm_device *dev = node->minor->dev;
1422 struct drm_i915_private *dev_priv = dev->dev_private;
1423 unsigned forcewake_count;
1425 spin_lock_irq(&dev_priv->gt_lock);
1426 forcewake_count = dev_priv->forcewake_count;
1427 spin_unlock_irq(&dev_priv->gt_lock);
1429 seq_printf(m, "forcewake count = %u\n", forcewake_count);
1434 static const char *swizzle_string(unsigned swizzle)
1437 case I915_BIT_6_SWIZZLE_NONE:
1439 case I915_BIT_6_SWIZZLE_9:
1441 case I915_BIT_6_SWIZZLE_9_10:
1442 return "bit9/bit10";
1443 case I915_BIT_6_SWIZZLE_9_11:
1444 return "bit9/bit11";
1445 case I915_BIT_6_SWIZZLE_9_10_11:
1446 return "bit9/bit10/bit11";
1447 case I915_BIT_6_SWIZZLE_9_17:
1448 return "bit9/bit17";
1449 case I915_BIT_6_SWIZZLE_9_10_17:
1450 return "bit9/bit10/bit17";
1451 case I915_BIT_6_SWIZZLE_UNKNOWN:
1458 static int i915_swizzle_info(struct seq_file *m, void *data)
1460 struct drm_info_node *node = (struct drm_info_node *) m->private;
1461 struct drm_device *dev = node->minor->dev;
1462 struct drm_i915_private *dev_priv = dev->dev_private;
1465 ret = mutex_lock_interruptible(&dev->struct_mutex);
1469 seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
1470 swizzle_string(dev_priv->mm.bit_6_swizzle_x));
1471 seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
1472 swizzle_string(dev_priv->mm.bit_6_swizzle_y));
1474 if (IS_GEN3(dev) || IS_GEN4(dev)) {
1475 seq_printf(m, "DDC = 0x%08x\n",
1477 seq_printf(m, "C0DRB3 = 0x%04x\n",
1478 I915_READ16(C0DRB3));
1479 seq_printf(m, "C1DRB3 = 0x%04x\n",
1480 I915_READ16(C1DRB3));
1481 } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
1482 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
1483 I915_READ(MAD_DIMM_C0));
1484 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
1485 I915_READ(MAD_DIMM_C1));
1486 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n",
1487 I915_READ(MAD_DIMM_C2));
1488 seq_printf(m, "TILECTL = 0x%08x\n",
1489 I915_READ(TILECTL));
1490 seq_printf(m, "ARB_MODE = 0x%08x\n",
1491 I915_READ(ARB_MODE));
1492 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n",
1493 I915_READ(DISP_ARB_CTL));
1495 mutex_unlock(&dev->struct_mutex);
1500 static int i915_ppgtt_info(struct seq_file *m, void *data)
1502 struct drm_info_node *node = (struct drm_info_node *) m->private;
1503 struct drm_device *dev = node->minor->dev;
1504 struct drm_i915_private *dev_priv = dev->dev_private;
1505 struct intel_ring_buffer *ring;
1509 ret = mutex_lock_interruptible(&dev->struct_mutex);
1512 if (INTEL_INFO(dev)->gen == 6)
1513 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));
1515 for_each_ring(ring, dev_priv, i) {
1516 seq_printf(m, "%s\n", ring->name);
1517 if (INTEL_INFO(dev)->gen == 7)
1518 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring)));
1519 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring)));
1520 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring)));
1521 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring)));
1523 if (dev_priv->mm.aliasing_ppgtt) {
1524 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
1526 seq_printf(m, "aliasing PPGTT:\n");
1527 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset);
1529 seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
1530 mutex_unlock(&dev->struct_mutex);
1535 static int i915_dpio_info(struct seq_file *m, void *data)
1537 struct drm_info_node *node = (struct drm_info_node *) m->private;
1538 struct drm_device *dev = node->minor->dev;
1539 struct drm_i915_private *dev_priv = dev->dev_private;
1543 if (!IS_VALLEYVIEW(dev)) {
1544 seq_printf(m, "unsupported\n");
1548 ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1552 seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));
1554 seq_printf(m, "DPIO_DIV_A: 0x%08x\n",
1555 intel_dpio_read(dev_priv, _DPIO_DIV_A));
1556 seq_printf(m, "DPIO_DIV_B: 0x%08x\n",
1557 intel_dpio_read(dev_priv, _DPIO_DIV_B));
1559 seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",
1560 intel_dpio_read(dev_priv, _DPIO_REFSFR_A));
1561 seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",
1562 intel_dpio_read(dev_priv, _DPIO_REFSFR_B));
1564 seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",
1565 intel_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
1566 seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
1567 intel_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
1569 seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",
1570 intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
1571 seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",
1572 intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));
1574 seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1575 intel_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
1577 mutex_unlock(&dev->mode_config.mutex);
1583 i915_wedged_read(struct file *filp,
1588 struct drm_device *dev = filp->private_data;
1589 drm_i915_private_t *dev_priv = dev->dev_private;
1593 len = snprintf(buf, sizeof(buf),
1595 atomic_read(&dev_priv->mm.wedged));
1597 if (len > sizeof(buf))
1600 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1604 i915_wedged_write(struct file *filp,
1605 const char __user *ubuf,
1609 struct drm_device *dev = filp->private_data;
1614 if (cnt > sizeof(buf) - 1)
1617 if (copy_from_user(buf, ubuf, cnt))
1621 val = simple_strtoul(buf, NULL, 0);
1624 DRM_INFO("Manually setting wedged to %d\n", val);
1625 i915_handle_error(dev, val);
1630 static const struct file_operations i915_wedged_fops = {
1631 .owner = THIS_MODULE,
1632 .open = simple_open,
1633 .read = i915_wedged_read,
1634 .write = i915_wedged_write,
1635 .llseek = default_llseek,
1639 i915_ring_stop_read(struct file *filp,
1644 struct drm_device *dev = filp->private_data;
1645 drm_i915_private_t *dev_priv = dev->dev_private;
1649 len = snprintf(buf, sizeof(buf),
1650 "0x%08x\n", dev_priv->stop_rings);
1652 if (len > sizeof(buf))
1655 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1659 i915_ring_stop_write(struct file *filp,
1660 const char __user *ubuf,
1664 struct drm_device *dev = filp->private_data;
1665 struct drm_i915_private *dev_priv = dev->dev_private;
1670 if (cnt > sizeof(buf) - 1)
1673 if (copy_from_user(buf, ubuf, cnt))
1677 val = simple_strtoul(buf, NULL, 0);
1680 DRM_DEBUG_DRIVER("Stopping rings 0x%08x\n", val);
1682 ret = mutex_lock_interruptible(&dev->struct_mutex);
1686 dev_priv->stop_rings = val;
1687 mutex_unlock(&dev->struct_mutex);
1692 static const struct file_operations i915_ring_stop_fops = {
1693 .owner = THIS_MODULE,
1694 .open = simple_open,
1695 .read = i915_ring_stop_read,
1696 .write = i915_ring_stop_write,
1697 .llseek = default_llseek,
1701 i915_max_freq_read(struct file *filp,
1706 struct drm_device *dev = filp->private_data;
1707 drm_i915_private_t *dev_priv = dev->dev_private;
1711 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1714 ret = mutex_lock_interruptible(&dev->struct_mutex);
1718 len = snprintf(buf, sizeof(buf),
1719 "max freq: %d\n", dev_priv->rps.max_delay * GT_FREQUENCY_MULTIPLIER);
1720 mutex_unlock(&dev->struct_mutex);
1722 if (len > sizeof(buf))
1725 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1729 i915_max_freq_write(struct file *filp,
1730 const char __user *ubuf,
1734 struct drm_device *dev = filp->private_data;
1735 struct drm_i915_private *dev_priv = dev->dev_private;
1739 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1743 if (cnt > sizeof(buf) - 1)
1746 if (copy_from_user(buf, ubuf, cnt))
1750 val = simple_strtoul(buf, NULL, 0);
1753 DRM_DEBUG_DRIVER("Manually setting max freq to %d\n", val);
1755 ret = mutex_lock_interruptible(&dev->struct_mutex);
1760 * Turbo will still be enabled, but won't go above the set value.
1762 dev_priv->rps.max_delay = val / GT_FREQUENCY_MULTIPLIER;
1764 gen6_set_rps(dev, val / GT_FREQUENCY_MULTIPLIER);
1765 mutex_unlock(&dev->struct_mutex);
1770 static const struct file_operations i915_max_freq_fops = {
1771 .owner = THIS_MODULE,
1772 .open = simple_open,
1773 .read = i915_max_freq_read,
1774 .write = i915_max_freq_write,
1775 .llseek = default_llseek,
1779 i915_min_freq_read(struct file *filp, char __user *ubuf, size_t max,
1782 struct drm_device *dev = filp->private_data;
1783 drm_i915_private_t *dev_priv = dev->dev_private;
1787 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1790 ret = mutex_lock_interruptible(&dev->struct_mutex);
1794 len = snprintf(buf, sizeof(buf),
1795 "min freq: %d\n", dev_priv->rps.min_delay * GT_FREQUENCY_MULTIPLIER);
1796 mutex_unlock(&dev->struct_mutex);
1798 if (len > sizeof(buf))
1801 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1805 i915_min_freq_write(struct file *filp, const char __user *ubuf, size_t cnt,
1808 struct drm_device *dev = filp->private_data;
1809 struct drm_i915_private *dev_priv = dev->dev_private;
1813 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1817 if (cnt > sizeof(buf) - 1)
1820 if (copy_from_user(buf, ubuf, cnt))
1824 val = simple_strtoul(buf, NULL, 0);
1827 DRM_DEBUG_DRIVER("Manually setting min freq to %d\n", val);
1829 ret = mutex_lock_interruptible(&dev->struct_mutex);
1834 * Turbo will still be enabled, but won't go below the set value.
1836 dev_priv->rps.min_delay = val / GT_FREQUENCY_MULTIPLIER;
1838 gen6_set_rps(dev, val / GT_FREQUENCY_MULTIPLIER);
1839 mutex_unlock(&dev->struct_mutex);
1844 static const struct file_operations i915_min_freq_fops = {
1845 .owner = THIS_MODULE,
1846 .open = simple_open,
1847 .read = i915_min_freq_read,
1848 .write = i915_min_freq_write,
1849 .llseek = default_llseek,
1853 i915_cache_sharing_read(struct file *filp,
1858 struct drm_device *dev = filp->private_data;
1859 drm_i915_private_t *dev_priv = dev->dev_private;
1864 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1867 ret = mutex_lock_interruptible(&dev->struct_mutex);
1871 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1872 mutex_unlock(&dev_priv->dev->struct_mutex);
1874 len = snprintf(buf, sizeof(buf),
1875 "%d\n", (snpcr & GEN6_MBC_SNPCR_MASK) >>
1876 GEN6_MBC_SNPCR_SHIFT);
1878 if (len > sizeof(buf))
1881 return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1885 i915_cache_sharing_write(struct file *filp,
1886 const char __user *ubuf,
1890 struct drm_device *dev = filp->private_data;
1891 struct drm_i915_private *dev_priv = dev->dev_private;
1896 if (!(IS_GEN6(dev) || IS_GEN7(dev)))
1900 if (cnt > sizeof(buf) - 1)
1903 if (copy_from_user(buf, ubuf, cnt))
1907 val = simple_strtoul(buf, NULL, 0);
1910 if (val < 0 || val > 3)
1913 DRM_DEBUG_DRIVER("Manually setting uncore sharing to %d\n", val);
1915 /* Update the cache sharing policy here as well */
1916 snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1917 snpcr &= ~GEN6_MBC_SNPCR_MASK;
1918 snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
1919 I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);
1924 static const struct file_operations i915_cache_sharing_fops = {
1925 .owner = THIS_MODULE,
1926 .open = simple_open,
1927 .read = i915_cache_sharing_read,
1928 .write = i915_cache_sharing_write,
1929 .llseek = default_llseek,
1932 /* As the drm_debugfs_init() routines are called before dev->dev_private is
1933 * allocated we need to hook into the minor for release. */
1935 drm_add_fake_info_node(struct drm_minor *minor,
1939 struct drm_info_node *node;
1941 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
1943 debugfs_remove(ent);
1947 node->minor = minor;
1949 node->info_ent = (void *) key;
1951 mutex_lock(&minor->debugfs_lock);
1952 list_add(&node->list, &minor->debugfs_list);
1953 mutex_unlock(&minor->debugfs_lock);
1958 static int i915_forcewake_open(struct inode *inode, struct file *file)
1960 struct drm_device *dev = inode->i_private;
1961 struct drm_i915_private *dev_priv = dev->dev_private;
1963 if (INTEL_INFO(dev)->gen < 6)
1966 gen6_gt_force_wake_get(dev_priv);
1971 static int i915_forcewake_release(struct inode *inode, struct file *file)
1973 struct drm_device *dev = inode->i_private;
1974 struct drm_i915_private *dev_priv = dev->dev_private;
1976 if (INTEL_INFO(dev)->gen < 6)
1979 gen6_gt_force_wake_put(dev_priv);
1984 static const struct file_operations i915_forcewake_fops = {
1985 .owner = THIS_MODULE,
1986 .open = i915_forcewake_open,
1987 .release = i915_forcewake_release,
1990 static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
1992 struct drm_device *dev = minor->dev;
1995 ent = debugfs_create_file("i915_forcewake_user",
1998 &i915_forcewake_fops);
2000 return PTR_ERR(ent);
2002 return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
2005 static int i915_debugfs_create(struct dentry *root,
2006 struct drm_minor *minor,
2008 const struct file_operations *fops)
2010 struct drm_device *dev = minor->dev;
2013 ent = debugfs_create_file(name,
2018 return PTR_ERR(ent);
2020 return drm_add_fake_info_node(minor, ent, fops);
2023 static struct drm_info_list i915_debugfs_list[] = {
2024 {"i915_capabilities", i915_capabilities, 0},
2025 {"i915_gem_objects", i915_gem_object_info, 0},
2026 {"i915_gem_gtt", i915_gem_gtt_info, 0},
2027 {"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST},
2028 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
2029 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
2030 {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
2031 {"i915_gem_request", i915_gem_request_info, 0},
2032 {"i915_gem_seqno", i915_gem_seqno_info, 0},
2033 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2034 {"i915_gem_interrupt", i915_interrupt_info, 0},
2035 {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
2036 {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
2037 {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
2038 {"i915_rstdby_delays", i915_rstdby_delays, 0},
2039 {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
2040 {"i915_delayfreq_table", i915_delayfreq_table, 0},
2041 {"i915_inttoext_table", i915_inttoext_table, 0},
2042 {"i915_drpc_info", i915_drpc_info, 0},
2043 {"i915_emon_status", i915_emon_status, 0},
2044 {"i915_ring_freq_table", i915_ring_freq_table, 0},
2045 {"i915_gfxec", i915_gfxec, 0},
2046 {"i915_fbc_status", i915_fbc_status, 0},
2047 {"i915_sr_status", i915_sr_status, 0},
2048 {"i915_opregion", i915_opregion, 0},
2049 {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
2050 {"i915_context_status", i915_context_status, 0},
2051 {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
2052 {"i915_swizzle_info", i915_swizzle_info, 0},
2053 {"i915_ppgtt_info", i915_ppgtt_info, 0},
2054 {"i915_dpio", i915_dpio_info, 0},
2056 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2058 int i915_debugfs_init(struct drm_minor *minor)
2062 ret = i915_debugfs_create(minor->debugfs_root, minor,
2068 ret = i915_forcewake_create(minor->debugfs_root, minor);
2072 ret = i915_debugfs_create(minor->debugfs_root, minor,
2074 &i915_max_freq_fops);
2078 ret = i915_debugfs_create(minor->debugfs_root, minor,
2080 &i915_min_freq_fops);
2084 ret = i915_debugfs_create(minor->debugfs_root, minor,
2085 "i915_cache_sharing",
2086 &i915_cache_sharing_fops);
2090 ret = i915_debugfs_create(minor->debugfs_root, minor,
2092 &i915_ring_stop_fops);
2096 ret = i915_debugfs_create(minor->debugfs_root, minor,
2098 &i915_error_state_fops);
2102 return drm_debugfs_create_files(i915_debugfs_list,
2103 I915_DEBUGFS_ENTRIES,
2104 minor->debugfs_root, minor);
2107 void i915_debugfs_cleanup(struct drm_minor *minor)
2109 drm_debugfs_remove_files(i915_debugfs_list,
2110 I915_DEBUGFS_ENTRIES, minor);
2111 drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
2113 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
2115 drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
2117 drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops,
2119 drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
2121 drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops,
2123 drm_debugfs_remove_files((struct drm_info_list *) &i915_error_state_fops,
2127 #endif /* CONFIG_DEBUG_FS */