drivers/gpu/drm/i915/i915_drv.c

   1 /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
   2  */
   3 /*
   4  *
   5  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   6  * All Rights Reserved.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the
  10  * "Software"), to deal in the Software without restriction, including
  11  * without limitation the rights to use, copy, modify, merge, publish,
  12  * distribute, sub license, and/or sell copies of the Software, and to
  13  * permit persons to whom the Software is furnished to do so, subject to
  14  * the following conditions:
  15  *
  16  * The above copyright notice and this permission notice (including the
  17  * next paragraph) shall be included in all copies or substantial portions
  18  * of the Software.
  19  *
  20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  21  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  23  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  24  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  25  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  26  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27  *
  28  */
  29
  30 #include <linux/device.h>
  31 #include "drmP.h"
  32 #include "drm.h"
  33 #include "i915_drm.h"
  34 #include "i915_drv.h"
  35
  36 #include <linux/console.h>
  37 #include "drm_crtc_helper.h"
  38
  39 static int i915_modeset = -1;
  40 module_param_named(modeset, i915_modeset, int, 0400);
  41
  42 unsigned int i915_fbpercrtc = 0;
  43 module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
  44
  45 unsigned int i915_powersave = 1;
  46 module_param_named(powersave, i915_powersave, int, 0400);
  47
  48 unsigned int i915_lvds_downclock = 0;
  49 module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
  50
  51 static struct drm_driver driver;
  52 extern int intel_agp_enabled;
  53
  54 #define INTEL_VGA_DEVICE(id, info) {            \
  55         .class = PCI_CLASS_DISPLAY_VGA << 8,    \
  56         .class_mask = 0xffff00,                 \
  57         .vendor = 0x8086,                       \
  58         .device = id,                           \
  59         .subvendor = PCI_ANY_ID,                \
  60         .subdevice = PCI_ANY_ID,                \
  61         .driver_data = (unsigned long) info }
  62
  63 const static struct intel_device_info intel_i830_info = {
  64         .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
  65 };
  66
  67 const static struct intel_device_info intel_845g_info = {
  68         .is_i8xx = 1,
  69 };
  70
  71 const static struct intel_device_info intel_i85x_info = {
  72         .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
  73 };
  74
  75 const static struct intel_device_info intel_i865g_info = {
  76         .is_i8xx = 1,
  77 };
  78
  79 const static struct intel_device_info intel_i915g_info = {
  80         .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
  81 };
  82 const static struct intel_device_info intel_i915gm_info = {
  83         .is_i9xx = 1,  .is_mobile = 1,
  84         .cursor_needs_physical = 1,
  85 };
  86 const static struct intel_device_info intel_i945g_info = {
  87         .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
  88 };
  89 const static struct intel_device_info intel_i945gm_info = {
  90         .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1,
  91         .has_hotplug = 1, .cursor_needs_physical = 1,
  92 };
  93
  94 const static struct intel_device_info intel_i965g_info = {
  95         .is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
  96 };
  97
  98 const static struct intel_device_info intel_i965gm_info = {
  99         .is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1,
 100         .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
 101         .has_hotplug = 1,
 102 };
 103
 104 const static struct intel_device_info intel_g33_info = {
 105         .is_g33 = 1, .is_i9xx = 1, .need_gfx_hws = 1,
 106         .has_hotplug = 1,
 107 };
 108
 109 const static struct intel_device_info intel_g45_info = {
 110         .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
 111         .has_pipe_cxsr = 1,
 112         .has_hotplug = 1,
 113 };
 114
 115 const static struct intel_device_info intel_gm45_info = {
 116         .is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1,
 117         .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
 118         .has_pipe_cxsr = 1,
 119         .has_hotplug = 1,
 120 };
 121
 122 const static struct intel_device_info intel_pineview_info = {
 123         .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
 124         .need_gfx_hws = 1,
 125         .has_hotplug = 1,
 126 };
 127
 128 const static struct intel_device_info intel_ironlake_d_info = {
 129         .is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
 130         .has_pipe_cxsr = 1,
 131         .has_hotplug = 1,
 132 };
 133
 134 const static struct intel_device_info intel_ironlake_m_info = {
 135         .is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
 136         .need_gfx_hws = 1, .has_rc6 = 1,
 137         .has_hotplug = 1,
 138 };
 139
 140 const static struct intel_device_info intel_sandybridge_d_info = {
 141         .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
 142         .has_hotplug = 1, .is_gen6 = 1,
 143 };
 144
 145 const static struct intel_device_info intel_sandybridge_m_info = {
 146         .is_i965g = 1, .is_mobile = 1, .is_i9xx = 1, .need_gfx_hws = 1,
 147         .has_hotplug = 1, .is_gen6 = 1,
 148 };
 149
 150 const static struct pci_device_id pciidlist[] = {
 151         INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
 152         INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
 153         INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
 154         INTEL_VGA_DEVICE(0x35e8, &intel_i85x_info),
 155         INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
 156         INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
 157         INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
 158         INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
 159         INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
 160         INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
 161         INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
 162         INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
 163         INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
 164         INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
 165         INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
 166         INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
 167         INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
 168         INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
 169         INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
 170         INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
 171         INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
 172         INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
 173         INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
 174         INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
 175         INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
 176         INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
 177         INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
 178         INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
 179         INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
 180         INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
 181         INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
 182         INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
 183         {0, 0, 0}
 184 };
 185
 186 #if defined(CONFIG_DRM_I915_KMS)
 187 MODULE_DEVICE_TABLE(pci, pciidlist);
 188 #endif
 189
 190 #define INTEL_PCH_DEVICE_ID_MASK        0xff00
 191 #define INTEL_PCH_CPT_DEVICE_ID_TYPE    0x1c00
 192
 193 void intel_detect_pch (struct drm_device *dev)
 194 {
 195         struct drm_i915_private *dev_priv = dev->dev_private;
 196         struct pci_dev *pch;
 197
 198         /*
 199          * The reason to probe ISA bridge instead of Dev31:Fun0 is to
 200          * make graphics device passthrough work easy for VMM, that only
 201          * need to expose ISA bridge to let driver know the real hardware
 202          * underneath. This is a requirement from virtualization team.
 203          */
 204         pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
 205         if (pch) {
 206                 if (pch->vendor == PCI_VENDOR_ID_INTEL) {
 207                         int id;
 208                         id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
 209
 210                         if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
 211                                 dev_priv->pch_type = PCH_CPT;
 212                                 DRM_DEBUG_KMS("Found CougarPoint PCH\n");
 213                         }
 214                 }
 215                 pci_dev_put(pch);
 216         }
 217 }
 218
 219 static int i915_drm_freeze(struct drm_device *dev)
 220 {
 221         struct drm_i915_private *dev_priv = dev->dev_private;
 222
 223         pci_save_state(dev->pdev);
 224
 225         /* If KMS is active, we do the leavevt stuff here */
 226         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
 227                 int error = i915_gem_idle(dev);
 228                 if (error) {
 229                         dev_err(&dev->pdev->dev,
 230                                 "GEM idle failed, resume might fail\n");
 231                         return error;
 232                 }
 233                 drm_irq_uninstall(dev);
 234         }
 235
 236         i915_save_state(dev);
 237
 238         intel_opregion_free(dev, 1);
 239
 240         /* Modeset on resume, not lid events */
 241         dev_priv->modeset_on_lid = 0;
 242
 243         return 0;
 244 }
 245
 246 int i915_suspend(struct drm_device *dev, pm_message_t state)
 247 {
 248         int error;
 249
 250         if (!dev || !dev->dev_private) {
 251                 DRM_ERROR("dev: %p\n", dev);
 252                 DRM_ERROR("DRM not initialized, aborting suspend.\n");
 253                 return -ENODEV;
 254         }
 255
 256         if (state.event == PM_EVENT_PRETHAW)
 257                 return 0;
 258
 259         error = i915_drm_freeze(dev);
 260         if (error)
 261                 return error;
 262
 263         if (state.event == PM_EVENT_SUSPEND) {
 264                 /* Shut down the device */
 265                 pci_disable_device(dev->pdev);
 266                 pci_set_power_state(dev->pdev, PCI_D3hot);
 267         }
 268
 269         return 0;
 270 }
 271
 272 static int i915_drm_thaw(struct drm_device *dev)
 273 {
 274         struct drm_i915_private *dev_priv = dev->dev_private;
 275         int error = 0;
 276
 277         i915_restore_state(dev);
 278
 279         intel_opregion_init(dev, 1);
 280
 281         /* KMS EnterVT equivalent */
 282         if (drm_core_check_feature(dev, DRIVER_MODESET)) {
 283                 mutex_lock(&dev->struct_mutex);
 284                 dev_priv->mm.suspended = 0;
 285
 286                 error = i915_gem_init_ringbuffer(dev);
 287                 mutex_unlock(&dev->struct_mutex);
 288
 289                 drm_irq_install(dev);
 290
 291                 /* Resume the modeset for every activated CRTC */
 292                 drm_helper_resume_force_mode(dev);
 293         }
 294
 295         dev_priv->modeset_on_lid = 0;
 296
 297         return error;
 298 }
 299
 300 int i915_resume(struct drm_device *dev)
 301 {
 302         if (pci_enable_device(dev->pdev))
 303                 return -EIO;
 304
 305         pci_set_master(dev->pdev);
 306
 307         return i915_drm_thaw(dev);
 308 }
 309
 310 /**
 311  * i965_reset - reset chip after a hang
 312  * @dev: drm device to reset
 313  * @flags: reset domains
 314  *
 315  * Reset the chip.  Useful if a hang is detected. Returns zero on successful
 316  * reset or otherwise an error code.
 317  *
 318  * Procedure is fairly simple:
 319  *   - reset the chip using the reset reg
 320  *   - re-init context state
 321  *   - re-init hardware status page
 322  *   - re-init ring buffer
 323  *   - re-init interrupt state
 324  *   - re-init display
 325  */
 326 int i965_reset(struct drm_device *dev, u8 flags)
 327 {
 328         drm_i915_private_t *dev_priv = dev->dev_private;
 329         unsigned long timeout;
 330         u8 gdrst;
 331         /*
 332          * We really should only reset the display subsystem if we actually
 333          * need to
 334          */
 335         bool need_display = true;
 336
 337         mutex_lock(&dev->struct_mutex);
 338
 339         /*
 340          * Clear request list
 341          */
 342         i915_gem_retire_requests(dev);
 343
 344         if (need_display)
 345                 i915_save_display(dev);
 346
 347         if (IS_I965G(dev) || IS_G4X(dev)) {
 348                 /*
 349                  * Set the domains we want to reset, then the reset bit (bit 0).
 350                  * Clear the reset bit after a while and wait for hardware status
 351                  * bit (bit 1) to be set
 352                  */
 353                 pci_read_config_byte(dev->pdev, GDRST, &gdrst);
 354                 pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0));
 355                 udelay(50);
 356                 pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe);
 357
 358                 /* ...we don't want to loop forever though, 500ms should be plenty */
 359                timeout = jiffies + msecs_to_jiffies(500);
 360                 do {
 361                         udelay(100);
 362                         pci_read_config_byte(dev->pdev, GDRST, &gdrst);
 363                 } while ((gdrst & 0x1) && time_after(timeout, jiffies));
 364
 365                 if (gdrst & 0x1) {
 366                         WARN(true, "i915: Failed to reset chip\n");
 367                         mutex_unlock(&dev->struct_mutex);
 368                         return -EIO;
 369                 }
 370         } else {
 371                 DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
 372                 return -ENODEV;
 373         }
 374
 375         /* Ok, now get things going again... */
 376
 377         /*
 378          * Everything depends on having the GTT running, so we need to start
 379          * there.  Fortunately we don't need to do this unless we reset the
 380          * chip at a PCI level.
 381          *
 382          * Next we need to restore the context, but we don't use those
 383          * yet either...
 384          *
 385          * Ring buffer needs to be re-initialized in the KMS case, or if X
 386          * was running at the time of the reset (i.e. we weren't VT
 387          * switched away).
 388          */
 389         if (drm_core_check_feature(dev, DRIVER_MODESET) ||
 390             !dev_priv->mm.suspended) {
 391                 drm_i915_ring_buffer_t *ring = &dev_priv->ring;
 392                 struct drm_gem_object *obj = ring->ring_obj;
 393                 struct drm_i915_gem_object *obj_priv = to_intel_bo(obj);
 394                 dev_priv->mm.suspended = 0;
 395
 396                 /* Stop the ring if it's running. */
 397                 I915_WRITE(PRB0_CTL, 0);
 398                 I915_WRITE(PRB0_TAIL, 0);
 399                 I915_WRITE(PRB0_HEAD, 0);
 400
 401                 /* Initialize the ring. */
 402                 I915_WRITE(PRB0_START, obj_priv->gtt_offset);
 403                 I915_WRITE(PRB0_CTL,
 404                            ((obj->size - 4096) & RING_NR_PAGES) |
 405                            RING_NO_REPORT |
 406                            RING_VALID);
 407                 if (!drm_core_check_feature(dev, DRIVER_MODESET))
 408                         i915_kernel_lost_context(dev);
 409                 else {
 410                         ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
 411                         ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
 412                         ring->space = ring->head - (ring->tail + 8);
 413                         if (ring->space < 0)
 414                                 ring->space += ring->Size;
 415                 }
 416
 417                 mutex_unlock(&dev->struct_mutex);
 418                 drm_irq_uninstall(dev);
 419                 drm_irq_install(dev);
 420                 mutex_lock(&dev->struct_mutex);
 421         }
 422
 423         /*
 424          * Display needs restore too...
 425          */
 426         if (need_display)
 427                 i915_restore_display(dev);
 428
 429         mutex_unlock(&dev->struct_mutex);
 430         return 0;
 431 }
 432
 433
 434 static int __devinit
 435 i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 436 {
 437         return drm_get_dev(pdev, ent, &driver);
 438 }
 439
 440 static void
 441 i915_pci_remove(struct pci_dev *pdev)
 442 {
 443         struct drm_device *dev = pci_get_drvdata(pdev);
 444
 445         drm_put_dev(dev);
 446 }
 447
 448 static int i915_pm_suspend(struct device *dev)
 449 {
 450         struct pci_dev *pdev = to_pci_dev(dev);
 451         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 452         int error;
 453
 454         if (!drm_dev || !drm_dev->dev_private) {
 455                 dev_err(dev, "DRM not initialized, aborting suspend.\n");
 456                 return -ENODEV;
 457         }
 458
 459         error = i915_drm_freeze(drm_dev);
 460         if (error)
 461                 return error;
 462
 463         pci_disable_device(pdev);
 464         pci_set_power_state(pdev, PCI_D3hot);
 465
 466         return 0;
 467 }
 468
 469 static int i915_pm_resume(struct device *dev)
 470 {
 471         struct pci_dev *pdev = to_pci_dev(dev);
 472         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 473
 474         return i915_resume(drm_dev);
 475 }
 476
 477 static int i915_pm_freeze(struct device *dev)
 478 {
 479         struct pci_dev *pdev = to_pci_dev(dev);
 480         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 481
 482         if (!drm_dev || !drm_dev->dev_private) {
 483                 dev_err(dev, "DRM not initialized, aborting suspend.\n");
 484                 return -ENODEV;
 485         }
 486
 487         return i915_drm_freeze(drm_dev);
 488 }
 489
 490 static int i915_pm_thaw(struct device *dev)
 491 {
 492         struct pci_dev *pdev = to_pci_dev(dev);
 493         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 494
 495         return i915_drm_thaw(drm_dev);
 496 }
 497
 498 static int i915_pm_poweroff(struct device *dev)
 499 {
 500         struct pci_dev *pdev = to_pci_dev(dev);
 501         struct drm_device *drm_dev = pci_get_drvdata(pdev);
 502
 503         return i915_drm_freeze(drm_dev);
 504 }
 505
 506 const struct dev_pm_ops i915_pm_ops = {
 507      .suspend = i915_pm_suspend,
 508      .resume = i915_pm_resume,
 509      .freeze = i915_pm_freeze,
 510      .thaw = i915_pm_thaw,
 511      .poweroff = i915_pm_poweroff,
 512      .restore = i915_pm_resume,
 513 };
 514
 515 static struct vm_operations_struct i915_gem_vm_ops = {
 516         .fault = i915_gem_fault,
 517         .open = drm_gem_vm_open,
 518         .close = drm_gem_vm_close,
 519 };
 520
 521 static struct drm_driver driver = {
 522         /* don't use mtrr's here, the Xserver or user space app should
 523          * deal with them for intel hardware.
 524          */
 525         .driver_features =
 526             DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
 527             DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
 528         .load = i915_driver_load,
 529         .unload = i915_driver_unload,
 530         .open = i915_driver_open,
 531         .lastclose = i915_driver_lastclose,
 532         .preclose = i915_driver_preclose,
 533         .postclose = i915_driver_postclose,
 534
 535         /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
 536         .suspend = i915_suspend,
 537         .resume = i915_resume,
 538
 539         .device_is_agp = i915_driver_device_is_agp,
 540         .enable_vblank = i915_enable_vblank,
 541         .disable_vblank = i915_disable_vblank,
 542         .irq_preinstall = i915_driver_irq_preinstall,
 543         .irq_postinstall = i915_driver_irq_postinstall,
 544         .irq_uninstall = i915_driver_irq_uninstall,
 545         .irq_handler = i915_driver_irq_handler,
 546         .reclaim_buffers = drm_core_reclaim_buffers,
 547         .get_map_ofs = drm_core_get_map_ofs,
 548         .get_reg_ofs = drm_core_get_reg_ofs,
 549         .master_create = i915_master_create,
 550         .master_destroy = i915_master_destroy,
 551 #if defined(CONFIG_DEBUG_FS)
 552         .debugfs_init = i915_debugfs_init,
 553         .debugfs_cleanup = i915_debugfs_cleanup,
 554 #endif
 555         .gem_init_object = i915_gem_init_object,
 556         .gem_free_object = i915_gem_free_object,
 557         .gem_vm_ops = &i915_gem_vm_ops,
 558         .ioctls = i915_ioctls,
 559         .fops = {
 560                  .owner = THIS_MODULE,
 561                  .open = drm_open,
 562                  .release = drm_release,
 563                  .unlocked_ioctl = drm_ioctl,
 564                  .mmap = drm_gem_mmap,
 565                  .poll = drm_poll,
 566                  .fasync = drm_fasync,
 567                  .read = drm_read,
 568 #ifdef CONFIG_COMPAT
 569                  .compat_ioctl = i915_compat_ioctl,
 570 #endif
 571         },
 572
 573         .pci_driver = {
 574                  .name = DRIVER_NAME,
 575                  .id_table = pciidlist,
 576                  .probe = i915_pci_probe,
 577                  .remove = i915_pci_remove,
 578                  .driver.pm = &i915_pm_ops,
 579         },
 580
 581         .name = DRIVER_NAME,
 582         .desc = DRIVER_DESC,
 583         .date = DRIVER_DATE,
 584         .major = DRIVER_MAJOR,
 585         .minor = DRIVER_MINOR,
 586         .patchlevel = DRIVER_PATCHLEVEL,
 587 };
 588
 589 static int __init i915_init(void)
 590 {
 591         if (!intel_agp_enabled) {
 592                 DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
 593                 return -ENODEV;
 594         }
 595
 596         driver.num_ioctls = i915_max_ioctl;
 597
 598         i915_gem_shrinker_init();
 599
 600         /*
 601          * If CONFIG_DRM_I915_KMS is set, default to KMS unless
 602          * explicitly disabled with the module pararmeter.
 603          *
 604          * Otherwise, just follow the parameter (defaulting to off).
 605          *
 606          * Allow optional vga_text_mode_force boot option to override
 607          * the default behavior.
 608          */
 609 #if defined(CONFIG_DRM_I915_KMS)
 610         if (i915_modeset != 0)
 611                 driver.driver_features |= DRIVER_MODESET;
 612 #endif
 613         if (i915_modeset == 1)
 614                 driver.driver_features |= DRIVER_MODESET;
 615
 616 #ifdef CONFIG_VGA_CONSOLE
 617         if (vgacon_text_force() && i915_modeset == -1)
 618                 driver.driver_features &= ~DRIVER_MODESET;
 619 #endif
 620
 621         if (!(driver.driver_features & DRIVER_MODESET)) {
 622                 driver.suspend = i915_suspend;
 623                 driver.resume = i915_resume;
 624         }
 625
 626         return drm_init(&driver);
 627 }
 628
 629 static void __exit i915_exit(void)
 630 {
 631         i915_gem_shrinker_exit();
 632         drm_exit(&driver);
 633 }
 634
 635 module_init(i915_init);
 636 module_exit(i915_exit);
 637
 638 MODULE_AUTHOR(DRIVER_AUTHOR);
 639 MODULE_DESCRIPTION(DRIVER_DESC);
 640 MODULE_LICENSE("GPL and additional rights");