1 /* i915_drv.h -- Private header for the I915 driver -*- linux-c -*-
5 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation the rights to use, copy, modify, merge, publish,
12 * distribute, sub license, and/or sell copies of the Software, and to
13 * permit persons to whom the Software is furnished to do so, subject to
14 * the following conditions:
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial portions
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
34 #include <linux/io-mapping.h>
36 /* General customization:
39 #define DRIVER_AUTHOR "Tungsten Graphics, Inc."
41 #define DRIVER_NAME "i915"
42 #define DRIVER_DESC "Intel Graphics"
43 #define DRIVER_DATE "20080730"
53 * 1.2: Add Power Management
54 * 1.3: Add vblank support
55 * 1.4: Fix cmdbuffer path, add heap destroy
56 * 1.5: Add vblank pipe configuration
57 * 1.6: - New ioctl for scheduling buffer swaps on vertical blank
58 * - Support vertical blank on secondary display pipe
60 #define DRIVER_MAJOR 1
61 #define DRIVER_MINOR 6
62 #define DRIVER_PATCHLEVEL 0
64 #define WATCH_COHERENCY 0
69 #define WATCH_INACTIVE 0
70 #define WATCH_PWRITE 0
72 typedef struct _drm_i915_ring_buffer {
80 struct drm_gem_object *ring_obj;
81 } drm_i915_ring_buffer_t;
84 struct mem_block *next;
85 struct mem_block *prev;
88 struct drm_file *file_priv; /* NULL: free, -1: heap, other: real files */
91 struct opregion_header;
93 struct opregion_swsci;
96 struct intel_opregion {
97 struct opregion_header *header;
98 struct opregion_acpi *acpi;
99 struct opregion_swsci *swsci;
100 struct opregion_asle *asle;
104 typedef struct drm_i915_private {
105 struct drm_device *dev;
108 drm_local_map_t *sarea;
110 drm_i915_sarea_t *sarea_priv;
111 drm_i915_ring_buffer_t ring;
113 drm_dma_handle_t *status_page_dmah;
114 void *hw_status_page;
115 dma_addr_t dma_status_page;
117 unsigned int status_gfx_addr;
118 drm_local_map_t hws_map;
119 struct drm_gem_object *hws_obj;
127 wait_queue_head_t irq_queue;
128 atomic_t irq_received;
129 /** Protects user_irq_refcount and irq_mask_reg */
130 spinlock_t user_irq_lock;
131 /** Refcount for i915_user_irq_get() versus i915_user_irq_put(). */
132 int user_irq_refcount;
133 /** Cached value of IMR to avoid reads in updating the bitfield */
137 int tex_lru_log_granularity;
138 int allow_batchbuffer;
139 struct mem_block *agp_heap;
140 unsigned int sr01, adpa, ppcr, dvob, dvoc, lvds;
143 struct intel_opregion opregion;
150 u32 saveRENDERSTANDBY;
173 u32 savePFIT_PGM_RATIOS;
175 u32 saveBLC_PWM_CTL2;
200 u32 savePP_ON_DELAYS;
201 u32 savePP_OFF_DELAYS;
209 u32 savePFIT_CONTROL;
210 u32 save_palette_a[256];
211 u32 save_palette_b[256];
212 u32 saveFBC_CFB_BASE;
215 u32 saveFBC_CONTROL2;
219 u32 saveCACHE_MODE_0;
222 u32 saveMI_ARB_STATE;
232 u8 saveDACDATA[256*3]; /* 256 3-byte colors */
236 struct drm_mm gtt_space;
238 struct io_mapping *gtt_mapping;
241 * List of objects currently involved in rendering from the
244 * A reference is held on the buffer while on this list.
246 struct list_head active_list;
249 * List of objects which are not in the ringbuffer but which
250 * still have a write_domain which needs to be flushed before
253 * A reference is held on the buffer while on this list.
255 struct list_head flushing_list;
258 * LRU list of objects which are not in the ringbuffer and
259 * are ready to unbind, but are still in the GTT.
261 * A reference is not held on the buffer while on this list,
262 * as merely being GTT-bound shouldn't prevent its being
263 * freed, and we'll pull it off the list in the free path.
265 struct list_head inactive_list;
268 * List of breadcrumbs associated with GPU requests currently
271 struct list_head request_list;
274 * We leave the user IRQ off as much as possible,
275 * but this means that requests will finish and never
276 * be retired once the system goes idle. Set a timer to
277 * fire periodically while the ring is running. When it
278 * fires, go retire requests.
280 struct delayed_work retire_work;
282 uint32_t next_gem_seqno;
285 * Waiting sequence number, if any
287 uint32_t waiting_gem_seqno;
290 * Last seq seen at irq time
292 uint32_t irq_gem_seqno;
295 * Flag if the X Server, and thus DRM, is not currently in
296 * control of the device.
298 * This is set between LeaveVT and EnterVT. It needs to be
299 * replaced with a semaphore. It also needs to be
300 * transitioned away from for kernel modesetting.
305 * Flag if the hardware appears to be wedged.
307 * This is set when attempts to idle the device timeout.
308 * It prevents command submission from occuring and makes
309 * every pending request fail
313 /** Bit 6 swizzling required for X tiling */
314 uint32_t bit_6_swizzle_x;
315 /** Bit 6 swizzling required for Y tiling */
316 uint32_t bit_6_swizzle_y;
318 } drm_i915_private_t;
320 /** driver private structure attached to each drm_gem_object */
321 struct drm_i915_gem_object {
322 struct drm_gem_object *obj;
324 /** Current space allocated to this object in the GTT, if any. */
325 struct drm_mm_node *gtt_space;
327 /** This object's place on the active/flushing/inactive lists */
328 struct list_head list;
331 * This is set if the object is on the active or flushing lists
332 * (has pending rendering), and is not set if it's on inactive (ready
338 * This is set if the object has been written to since last bound
343 /** AGP memory structure for our GTT binding. */
344 DRM_AGP_MEM *agp_mem;
346 struct page **page_list;
349 * Current offset of the object in GTT space.
351 * This is the same as gtt_space->start
355 /** Boolean whether this object has a valid gtt offset. */
358 /** How many users have pinned this object in GTT space */
361 /** Breadcrumb of last rendering to the buffer. */
362 uint32_t last_rendering_seqno;
364 /** Current tiling mode for the object. */
365 uint32_t tiling_mode;
367 /** AGP mapping type (AGP_USER_MEMORY or AGP_USER_CACHED_MEMORY */
371 * Flagging of which individual pages are valid in GEM_DOMAIN_CPU when
372 * GEM_DOMAIN_CPU is not in the object's read domain.
374 uint8_t *page_cpu_valid;
378 * Request queue structure.
380 * The request queue allows us to note sequence numbers that have been emitted
381 * and may be associated with active buffers to be retired.
383 * By keeping this list, we can avoid having to do questionable
384 * sequence-number comparisons on buffer last_rendering_seqnos, and associate
385 * an emission time with seqnos for tracking how far ahead of the GPU we are.
387 struct drm_i915_gem_request {
388 /** GEM sequence number associated with this request. */
391 /** Time at which this request was emitted, in jiffies. */
392 unsigned long emitted_jiffies;
394 /** Cache domains that were flushed at the start of the request. */
395 uint32_t flush_domains;
397 struct list_head list;
400 struct drm_i915_file_private {
402 uint32_t last_gem_seqno;
403 uint32_t last_gem_throttle_seqno;
407 extern struct drm_ioctl_desc i915_ioctls[];
408 extern int i915_max_ioctl;
411 extern void i915_kernel_lost_context(struct drm_device * dev);
412 extern int i915_driver_load(struct drm_device *, unsigned long flags);
413 extern int i915_driver_unload(struct drm_device *);
414 extern int i915_driver_open(struct drm_device *dev, struct drm_file *file_priv);
415 extern void i915_driver_lastclose(struct drm_device * dev);
416 extern void i915_driver_preclose(struct drm_device *dev,
417 struct drm_file *file_priv);
418 extern void i915_driver_postclose(struct drm_device *dev,
419 struct drm_file *file_priv);
420 extern int i915_driver_device_is_agp(struct drm_device * dev);
421 extern long i915_compat_ioctl(struct file *filp, unsigned int cmd,
423 extern int i915_emit_box(struct drm_device *dev,
424 struct drm_clip_rect __user *boxes,
425 int i, int DR1, int DR4);
428 extern int i915_irq_emit(struct drm_device *dev, void *data,
429 struct drm_file *file_priv);
430 extern int i915_irq_wait(struct drm_device *dev, void *data,
431 struct drm_file *file_priv);
432 void i915_user_irq_get(struct drm_device *dev);
433 void i915_user_irq_put(struct drm_device *dev);
435 extern irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS);
436 extern void i915_driver_irq_preinstall(struct drm_device * dev);
437 extern int i915_driver_irq_postinstall(struct drm_device *dev);
438 extern void i915_driver_irq_uninstall(struct drm_device * dev);
439 extern int i915_vblank_pipe_set(struct drm_device *dev, void *data,
440 struct drm_file *file_priv);
441 extern int i915_vblank_pipe_get(struct drm_device *dev, void *data,
442 struct drm_file *file_priv);
443 extern int i915_enable_vblank(struct drm_device *dev, int crtc);
444 extern void i915_disable_vblank(struct drm_device *dev, int crtc);
445 extern u32 i915_get_vblank_counter(struct drm_device *dev, int crtc);
446 extern int i915_vblank_swap(struct drm_device *dev, void *data,
447 struct drm_file *file_priv);
448 extern void i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask);
451 i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
454 i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
458 extern int i915_mem_alloc(struct drm_device *dev, void *data,
459 struct drm_file *file_priv);
460 extern int i915_mem_free(struct drm_device *dev, void *data,
461 struct drm_file *file_priv);
462 extern int i915_mem_init_heap(struct drm_device *dev, void *data,
463 struct drm_file *file_priv);
464 extern int i915_mem_destroy_heap(struct drm_device *dev, void *data,
465 struct drm_file *file_priv);
466 extern void i915_mem_takedown(struct mem_block **heap);
467 extern void i915_mem_release(struct drm_device * dev,
468 struct drm_file *file_priv, struct mem_block *heap);
470 int i915_gem_init_ioctl(struct drm_device *dev, void *data,
471 struct drm_file *file_priv);
472 int i915_gem_create_ioctl(struct drm_device *dev, void *data,
473 struct drm_file *file_priv);
474 int i915_gem_pread_ioctl(struct drm_device *dev, void *data,
475 struct drm_file *file_priv);
476 int i915_gem_pwrite_ioctl(struct drm_device *dev, void *data,
477 struct drm_file *file_priv);
478 int i915_gem_mmap_ioctl(struct drm_device *dev, void *data,
479 struct drm_file *file_priv);
480 int i915_gem_set_domain_ioctl(struct drm_device *dev, void *data,
481 struct drm_file *file_priv);
482 int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
483 struct drm_file *file_priv);
484 int i915_gem_execbuffer(struct drm_device *dev, void *data,
485 struct drm_file *file_priv);
486 int i915_gem_pin_ioctl(struct drm_device *dev, void *data,
487 struct drm_file *file_priv);
488 int i915_gem_unpin_ioctl(struct drm_device *dev, void *data,
489 struct drm_file *file_priv);
490 int i915_gem_busy_ioctl(struct drm_device *dev, void *data,
491 struct drm_file *file_priv);
492 int i915_gem_throttle_ioctl(struct drm_device *dev, void *data,
493 struct drm_file *file_priv);
494 int i915_gem_entervt_ioctl(struct drm_device *dev, void *data,
495 struct drm_file *file_priv);
496 int i915_gem_leavevt_ioctl(struct drm_device *dev, void *data,
497 struct drm_file *file_priv);
498 int i915_gem_set_tiling(struct drm_device *dev, void *data,
499 struct drm_file *file_priv);
500 int i915_gem_get_tiling(struct drm_device *dev, void *data,
501 struct drm_file *file_priv);
502 int i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
503 struct drm_file *file_priv);
504 void i915_gem_load(struct drm_device *dev);
505 int i915_gem_proc_init(struct drm_minor *minor);
506 void i915_gem_proc_cleanup(struct drm_minor *minor);
507 int i915_gem_init_object(struct drm_gem_object *obj);
508 void i915_gem_free_object(struct drm_gem_object *obj);
509 int i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment);
510 void i915_gem_object_unpin(struct drm_gem_object *obj);
511 void i915_gem_lastclose(struct drm_device *dev);
512 uint32_t i915_get_gem_seqno(struct drm_device *dev);
513 void i915_gem_retire_requests(struct drm_device *dev);
514 void i915_gem_retire_work_handler(struct work_struct *work);
515 void i915_gem_clflush_object(struct drm_gem_object *obj);
517 /* i915_gem_tiling.c */
518 void i915_gem_detect_bit_6_swizzle(struct drm_device *dev);
520 /* i915_gem_debug.c */
521 void i915_gem_dump_object(struct drm_gem_object *obj, int len,
522 const char *where, uint32_t mark);
524 void i915_verify_inactive(struct drm_device *dev, char *file, int line);
526 #define i915_verify_inactive(dev, file, line)
528 void i915_gem_object_check_coherency(struct drm_gem_object *obj, int handle);
529 void i915_gem_dump_object(struct drm_gem_object *obj, int len,
530 const char *where, uint32_t mark);
531 void i915_dump_lru(struct drm_device *dev, const char *where);
534 extern int i915_save_state(struct drm_device *dev);
535 extern int i915_restore_state(struct drm_device *dev);
538 extern int i915_save_state(struct drm_device *dev);
539 extern int i915_restore_state(struct drm_device *dev);
542 /* i915_opregion.c */
543 extern int intel_opregion_init(struct drm_device *dev);
544 extern void intel_opregion_free(struct drm_device *dev);
545 extern void opregion_asle_intr(struct drm_device *dev);
546 extern void opregion_enable_asle(struct drm_device *dev);
548 static inline int intel_opregion_init(struct drm_device *dev) { return 0; }
549 static inline void intel_opregion_free(struct drm_device *dev) { return; }
550 static inline void opregion_asle_intr(struct drm_device *dev) { return; }
551 static inline void opregion_enable_asle(struct drm_device *dev) { return; }
555 * Lock test for when it's just for synchronization of ring access.
557 * In that case, we don't need to do it when GEM is initialized as nobody else
558 * has access to the ring.
560 #define RING_LOCK_TEST_WITH_RETURN(dev, file_priv) do { \
561 if (((drm_i915_private_t *)dev->dev_private)->ring.ring_obj == NULL) \
562 LOCK_TEST_WITH_RETURN(dev, file_priv); \
565 #define I915_READ(reg) readl(dev_priv->regs + (reg))
566 #define I915_WRITE(reg, val) writel(val, dev_priv->regs + (reg))
567 #define I915_READ16(reg) readw(dev_priv->regs + (reg))
568 #define I915_WRITE16(reg, val) writel(val, dev_priv->regs + (reg))
569 #define I915_READ8(reg) readb(dev_priv->regs + (reg))
570 #define I915_WRITE8(reg, val) writeb(val, dev_priv->regs + (reg))
572 #define I915_VERBOSE 0
574 #define RING_LOCALS unsigned int outring, ringmask, outcount; \
577 #define BEGIN_LP_RING(n) do { \
579 DRM_DEBUG("BEGIN_LP_RING(%d)\n", (n)); \
580 if (dev_priv->ring.space < (n)*4) \
581 i915_wait_ring(dev, (n)*4, __func__); \
583 outring = dev_priv->ring.tail; \
584 ringmask = dev_priv->ring.tail_mask; \
585 virt = dev_priv->ring.virtual_start; \
588 #define OUT_RING(n) do { \
589 if (I915_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \
590 *(volatile unsigned int *)(virt + outring) = (n); \
593 outring &= ringmask; \
596 #define ADVANCE_LP_RING() do { \
597 if (I915_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING %x\n", outring); \
598 dev_priv->ring.tail = outring; \
599 dev_priv->ring.space -= outcount * 4; \
600 I915_WRITE(PRB0_TAIL, outring); \
604 * Reads a dword out of the status page, which is written to from the command
605 * queue by automatic updates, MI_REPORT_HEAD, MI_STORE_DATA_INDEX, or
608 * The following dwords have a reserved meaning:
609 * 0x00: ISR copy, updated when an ISR bit not set in the HWSTAM changes.
610 * 0x04: ring 0 head pointer
611 * 0x05: ring 1 head pointer (915-class)
612 * 0x06: ring 2 head pointer (915-class)
613 * 0x10-0x1b: Context status DWords (GM45)
614 * 0x1f: Last written status offset. (GM45)
616 * The area from dword 0x20 to 0x3ff is available for driver usage.
618 #define READ_HWSP(dev_priv, reg) (((volatile u32*)(dev_priv->hw_status_page))[reg])
619 #define READ_BREADCRUMB(dev_priv) READ_HWSP(dev_priv, I915_BREADCRUMB_INDEX)
620 #define I915_GEM_HWS_INDEX 0x20
621 #define I915_BREADCRUMB_INDEX 0x21
623 extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
625 #define IS_I830(dev) ((dev)->pci_device == 0x3577)
626 #define IS_845G(dev) ((dev)->pci_device == 0x2562)
627 #define IS_I85X(dev) ((dev)->pci_device == 0x3582)
628 #define IS_I855(dev) ((dev)->pci_device == 0x3582)
629 #define IS_I865G(dev) ((dev)->pci_device == 0x2572)
631 #define IS_I915G(dev) ((dev)->pci_device == 0x2582 || (dev)->pci_device == 0x258a)
632 #define IS_I915GM(dev) ((dev)->pci_device == 0x2592)
633 #define IS_I945G(dev) ((dev)->pci_device == 0x2772)
634 #define IS_I945GM(dev) ((dev)->pci_device == 0x27A2 ||\
635 (dev)->pci_device == 0x27AE)
636 #define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \
637 (dev)->pci_device == 0x2982 || \
638 (dev)->pci_device == 0x2992 || \
639 (dev)->pci_device == 0x29A2 || \
640 (dev)->pci_device == 0x2A02 || \
641 (dev)->pci_device == 0x2A12 || \
642 (dev)->pci_device == 0x2A42 || \
643 (dev)->pci_device == 0x2E02 || \
644 (dev)->pci_device == 0x2E12 || \
645 (dev)->pci_device == 0x2E22)
647 #define IS_I965GM(dev) ((dev)->pci_device == 0x2A02)
649 #define IS_GM45(dev) ((dev)->pci_device == 0x2A42)
651 #define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
652 (dev)->pci_device == 0x2E12 || \
653 (dev)->pci_device == 0x2E22)
655 #define IS_G33(dev) ((dev)->pci_device == 0x29C2 || \
656 (dev)->pci_device == 0x29B2 || \
657 (dev)->pci_device == 0x29D2)
659 #define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \
660 IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev))
662 #define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
663 IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev))
665 #define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev))
667 #define PRIMARY_RINGBUFFER_SIZE (128*1024)