drivers/gpu/drm/i915/i915_sysfs.c

   1 /*
   2  * Copyright © 2012 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Ben Widawsky <ben@bwidawsk.net>
  25  *
  26  */
  27
  28 #include <linux/device.h>
  29 #include <linux/module.h>
  30 #include <linux/stat.h>
  31 #include <linux/sysfs.h>
  32 #include "intel_drv.h"
  33 #include "i915_drv.h"
  34
  35 static inline struct drm_minor *kdev_to_drm_minor(struct device *kdev)
  36 {
  37         return dev_get_drvdata(kdev);
  38 }
  39
  40 #ifdef CONFIG_PM
  41 static u32 calc_residency(struct drm_device *dev,
  42                           i915_reg_t reg)
  43 {
  44         struct drm_i915_private *dev_priv = to_i915(dev);
  45         u64 raw_time; /* 32b value may overflow during fixed point math */
  46         u64 units = 128ULL, div = 100000ULL;
  47         u32 ret;
  48
  49         if (!intel_enable_rc6())
  50                 return 0;
  51
  52         intel_runtime_pm_get(dev_priv);
  53
  54         /* On VLV and CHV, residency time is in CZ units rather than 1.28us */
  55         if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) {
  56                 units = 1;
  57                 div = dev_priv->czclk_freq;
  58
  59                 if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
  60                         units <<= 8;
  61         } else if (IS_BROXTON(dev)) {
  62                 units = 1;
  63                 div = 1200;             /* 833.33ns */
  64         }
  65
  66         raw_time = I915_READ(reg) * units;
  67         ret = DIV_ROUND_UP_ULL(raw_time, div);
  68
  69         intel_runtime_pm_put(dev_priv);
  70         return ret;
  71 }
  72
  73 static ssize_t
  74 show_rc6_mask(struct device *kdev, struct device_attribute *attr, char *buf)
  75 {
  76         return snprintf(buf, PAGE_SIZE, "%x\n", intel_enable_rc6());
  77 }
  78
  79 static ssize_t
  80 show_rc6_ms(struct device *kdev, struct device_attribute *attr, char *buf)
  81 {
  82         struct drm_minor *dminor = dev_get_drvdata(kdev);
  83         u32 rc6_residency = calc_residency(dminor->dev, GEN6_GT_GFX_RC6);
  84         return snprintf(buf, PAGE_SIZE, "%u\n", rc6_residency);
  85 }
  86
  87 static ssize_t
  88 show_rc6p_ms(struct device *kdev, struct device_attribute *attr, char *buf)
  89 {
  90         struct drm_minor *dminor = kdev_to_drm_minor(kdev);
  91         u32 rc6p_residency = calc_residency(dminor->dev, GEN6_GT_GFX_RC6p);
  92         return snprintf(buf, PAGE_SIZE, "%u\n", rc6p_residency);
  93 }
  94
  95 static ssize_t
  96 show_rc6pp_ms(struct device *kdev, struct device_attribute *attr, char *buf)
  97 {
  98         struct drm_minor *dminor = kdev_to_drm_minor(kdev);
  99         u32 rc6pp_residency = calc_residency(dminor->dev, GEN6_GT_GFX_RC6pp);
 100         return snprintf(buf, PAGE_SIZE, "%u\n", rc6pp_residency);
 101 }
 102
 103 static ssize_t
 104 show_media_rc6_ms(struct device *kdev, struct device_attribute *attr, char *buf)
 105 {
 106         struct drm_minor *dminor = dev_get_drvdata(kdev);
 107         u32 rc6_residency = calc_residency(dminor->dev, VLV_GT_MEDIA_RC6);
 108         return snprintf(buf, PAGE_SIZE, "%u\n", rc6_residency);
 109 }
 110
 111 static DEVICE_ATTR(rc6_enable, S_IRUGO, show_rc6_mask, NULL);
 112 static DEVICE_ATTR(rc6_residency_ms, S_IRUGO, show_rc6_ms, NULL);
 113 static DEVICE_ATTR(rc6p_residency_ms, S_IRUGO, show_rc6p_ms, NULL);
 114 static DEVICE_ATTR(rc6pp_residency_ms, S_IRUGO, show_rc6pp_ms, NULL);
 115 static DEVICE_ATTR(media_rc6_residency_ms, S_IRUGO, show_media_rc6_ms, NULL);
 116
 117 static struct attribute *rc6_attrs[] = {
 118         &dev_attr_rc6_enable.attr,
 119         &dev_attr_rc6_residency_ms.attr,
 120         NULL
 121 };
 122
 123 static struct attribute_group rc6_attr_group = {
 124         .name = power_group_name,
 125         .attrs =  rc6_attrs
 126 };
 127
 128 static struct attribute *rc6p_attrs[] = {
 129         &dev_attr_rc6p_residency_ms.attr,
 130         &dev_attr_rc6pp_residency_ms.attr,
 131         NULL
 132 };
 133
 134 static struct attribute_group rc6p_attr_group = {
 135         .name = power_group_name,
 136         .attrs =  rc6p_attrs
 137 };
 138
 139 static struct attribute *media_rc6_attrs[] = {
 140         &dev_attr_media_rc6_residency_ms.attr,
 141         NULL
 142 };
 143
 144 static struct attribute_group media_rc6_attr_group = {
 145         .name = power_group_name,
 146         .attrs =  media_rc6_attrs
 147 };
 148 #endif
 149
 150 static int l3_access_valid(struct drm_device *dev, loff_t offset)
 151 {
 152         if (!HAS_L3_DPF(dev))
 153                 return -EPERM;
 154
 155         if (offset % 4 != 0)
 156                 return -EINVAL;
 157
 158         if (offset >= GEN7_L3LOG_SIZE)
 159                 return -ENXIO;
 160
 161         return 0;
 162 }
 163
 164 static ssize_t
 165 i915_l3_read(struct file *filp, struct kobject *kobj,
 166              struct bin_attribute *attr, char *buf,
 167              loff_t offset, size_t count)
 168 {
 169         struct device *kdev = kobj_to_dev(kobj);
 170         struct drm_minor *dminor = kdev_to_drm_minor(kdev);
 171         struct drm_device *dev = dminor->dev;
 172         struct drm_i915_private *dev_priv = to_i915(dev);
 173         int slice = (int)(uintptr_t)attr->private;
 174         int ret;
 175
 176         count = round_down(count, 4);
 177
 178         ret = l3_access_valid(dev, offset);
 179         if (ret)
 180                 return ret;
 181
 182         count = min_t(size_t, GEN7_L3LOG_SIZE - offset, count);
 183
 184         ret = i915_mutex_lock_interruptible(dev);
 185         if (ret)
 186                 return ret;
 187
 188         if (dev_priv->l3_parity.remap_info[slice])
 189                 memcpy(buf,
 190                        dev_priv->l3_parity.remap_info[slice] + (offset/4),
 191                        count);
 192         else
 193                 memset(buf, 0, count);
 194
 195         mutex_unlock(&dev->struct_mutex);
 196
 197         return count;
 198 }
 199
 200 static ssize_t
 201 i915_l3_write(struct file *filp, struct kobject *kobj,
 202               struct bin_attribute *attr, char *buf,
 203               loff_t offset, size_t count)
 204 {
 205         struct device *kdev = kobj_to_dev(kobj);
 206         struct drm_minor *dminor = kdev_to_drm_minor(kdev);
 207         struct drm_device *dev = dminor->dev;
 208         struct drm_i915_private *dev_priv = to_i915(dev);
 209         struct i915_gem_context *ctx;
 210         u32 *temp = NULL; /* Just here to make handling failures easy */
 211         int slice = (int)(uintptr_t)attr->private;
 212         int ret;
 213
 214         if (!HAS_HW_CONTEXTS(dev))
 215                 return -ENXIO;
 216
 217         ret = l3_access_valid(dev, offset);
 218         if (ret)
 219                 return ret;
 220
 221         ret = i915_mutex_lock_interruptible(dev);
 222         if (ret)
 223                 return ret;
 224
 225         if (!dev_priv->l3_parity.remap_info[slice]) {
 226                 temp = kzalloc(GEN7_L3LOG_SIZE, GFP_KERNEL);
 227                 if (!temp) {
 228                         mutex_unlock(&dev->struct_mutex);
 229                         return -ENOMEM;
 230                 }
 231         }
 232
 233         /* TODO: Ideally we really want a GPU reset here to make sure errors
 234          * aren't propagated. Since I cannot find a stable way to reset the GPU
 235          * at this point it is left as a TODO.
 236         */
 237         if (temp)
 238                 dev_priv->l3_parity.remap_info[slice] = temp;
 239
 240         memcpy(dev_priv->l3_parity.remap_info[slice] + (offset/4), buf, count);
 241
 242         /* NB: We defer the remapping until we switch to the context */
 243         list_for_each_entry(ctx, &dev_priv->context_list, link)
 244                 ctx->remap_slice |= (1<<slice);
 245
 246         mutex_unlock(&dev->struct_mutex);
 247
 248         return count;
 249 }
 250
 251 static struct bin_attribute dpf_attrs = {
 252         .attr = {.name = "l3_parity", .mode = (S_IRUSR | S_IWUSR)},
 253         .size = GEN7_L3LOG_SIZE,
 254         .read = i915_l3_read,
 255         .write = i915_l3_write,
 256         .mmap = NULL,
 257         .private = (void *)0
 258 };
 259
 260 static struct bin_attribute dpf_attrs_1 = {
 261         .attr = {.name = "l3_parity_slice_1", .mode = (S_IRUSR | S_IWUSR)},
 262         .size = GEN7_L3LOG_SIZE,
 263         .read = i915_l3_read,
 264         .write = i915_l3_write,
 265         .mmap = NULL,
 266         .private = (void *)1
 267 };
 268
 269 static ssize_t gt_act_freq_mhz_show(struct device *kdev,
 270                                     struct device_attribute *attr, char *buf)
 271 {
 272         struct drm_minor *minor = kdev_to_drm_minor(kdev);
 273         struct drm_device *dev = minor->dev;
 274         struct drm_i915_private *dev_priv = to_i915(dev);
 275         int ret;
 276
 277         intel_runtime_pm_get(dev_priv);
 278
 279         mutex_lock(&dev_priv->rps.hw_lock);
 280         if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
 281                 u32 freq;
 282                 freq = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
 283                 ret = intel_gpu_freq(dev_priv, (freq >> 8) & 0xff);
 284         } else {
 285                 u32 rpstat = I915_READ(GEN6_RPSTAT1);
 286                 if (IS_GEN9(dev_priv))
 287                         ret = (rpstat & GEN9_CAGF_MASK) >> GEN9_CAGF_SHIFT;
 288                 else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
 289                         ret = (rpstat & HSW_CAGF_MASK) >> HSW_CAGF_SHIFT;
 290                 else
 291                         ret = (rpstat & GEN6_CAGF_MASK) >> GEN6_CAGF_SHIFT;
 292                 ret = intel_gpu_freq(dev_priv, ret);
 293         }
 294         mutex_unlock(&dev_priv->rps.hw_lock);
 295
 296         intel_runtime_pm_put(dev_priv);
 297
 298         return snprintf(buf, PAGE_SIZE, "%d\n", ret);
 299 }
 300
 301 static ssize_t gt_cur_freq_mhz_show(struct device *kdev,
 302                                     struct device_attribute *attr, char *buf)
 303 {
 304         struct drm_minor *minor = kdev_to_drm_minor(kdev);
 305         struct drm_device *dev = minor->dev;
 306         struct drm_i915_private *dev_priv = to_i915(dev);
 307
 308         return snprintf(buf, PAGE_SIZE, "%d\n",
 309                         intel_gpu_freq(dev_priv,
 310                                        dev_priv->rps.cur_freq));
 311 }
 312
 313 static ssize_t gt_boost_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
 314 {
 315         struct drm_minor *minor = kdev_to_drm_minor(kdev);
 316         struct drm_i915_private *dev_priv = to_i915(minor->dev);
 317
 318         return snprintf(buf, PAGE_SIZE, "%d\n",
 319                         intel_gpu_freq(dev_priv,
 320                                        dev_priv->rps.boost_freq));
 321 }
 322
 323 static ssize_t gt_boost_freq_mhz_store(struct device *kdev,
 324                                        struct device_attribute *attr,
 325                                        const char *buf, size_t count)
 326 {
 327         struct drm_minor *minor = kdev_to_drm_minor(kdev);
 328         struct drm_device *dev = minor->dev;
 329         struct drm_i915_private *dev_priv = to_i915(dev);
 330         u32 val;
 331         ssize_t ret;
 332
 333         ret = kstrtou32(buf, 0, &val);
 334         if (ret)
 335                 return ret;
 336
 337         /* Validate against (static) hardware limits */
 338         val = intel_freq_opcode(dev_priv, val);
 339         if (val < dev_priv->rps.min_freq || val > dev_priv->rps.max_freq)
 340                 return -EINVAL;
 341
 342         mutex_lock(&dev_priv->rps.hw_lock);
 343         dev_priv->rps.boost_freq = val;
 344         mutex_unlock(&dev_priv->rps.hw_lock);
 345
 346         return count;
 347 }
 348
 349 static ssize_t vlv_rpe_freq_mhz_show(struct device *kdev,
 350                                      struct device_attribute *attr, char *buf)
 351 {
 352         struct drm_minor *minor = kdev_to_drm_minor(kdev);
 353         struct drm_device *dev = minor->dev;
 354         struct drm_i915_private *dev_priv = to_i915(dev);
 355
 356         return snprintf(buf, PAGE_SIZE, "%d\n",
 357                         intel_gpu_freq(dev_priv,
 358                                        dev_priv->rps.efficient_freq));
 359 }
 360
 361 static ssize_t gt_max_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
 362 {
 363         struct drm_minor *minor = kdev_to_drm_minor(kdev);
 364         struct drm_device *dev = minor->dev;
 365         struct drm_i915_private *dev_priv = to_i915(dev);
 366
 367         return snprintf(buf, PAGE_SIZE, "%d\n",
 368                         intel_gpu_freq(dev_priv,
 369                                        dev_priv->rps.max_freq_softlimit));
 370 }
 371
 372 static ssize_t gt_max_freq_mhz_store(struct device *kdev,
 373                                      struct device_attribute *attr,
 374                                      const char *buf, size_t count)
 375 {
 376         struct drm_minor *minor = kdev_to_drm_minor(kdev);
 377         struct drm_device *dev = minor->dev;
 378         struct drm_i915_private *dev_priv = to_i915(dev);
 379         u32 val;
 380         ssize_t ret;
 381
 382         ret = kstrtou32(buf, 0, &val);
 383         if (ret)
 384                 return ret;
 385
 386         intel_runtime_pm_get(dev_priv);
 387
 388         mutex_lock(&dev_priv->rps.hw_lock);
 389
 390         val = intel_freq_opcode(dev_priv, val);
 391
 392         if (val < dev_priv->rps.min_freq ||
 393             val > dev_priv->rps.max_freq ||
 394             val < dev_priv->rps.min_freq_softlimit) {
 395                 mutex_unlock(&dev_priv->rps.hw_lock);
 396                 intel_runtime_pm_put(dev_priv);
 397                 return -EINVAL;
 398         }
 399
 400         if (val > dev_priv->rps.rp0_freq)
 401                 DRM_DEBUG("User requested overclocking to %d\n",
 402                           intel_gpu_freq(dev_priv, val));
 403
 404         dev_priv->rps.max_freq_softlimit = val;
 405
 406         val = clamp_t(int, dev_priv->rps.cur_freq,
 407                       dev_priv->rps.min_freq_softlimit,
 408                       dev_priv->rps.max_freq_softlimit);
 409
 410         /* We still need *_set_rps to process the new max_delay and
 411          * update the interrupt limits and PMINTRMSK even though
 412          * frequency request may be unchanged. */
 413         intel_set_rps(dev_priv, val);
 414
 415         mutex_unlock(&dev_priv->rps.hw_lock);
 416
 417         intel_runtime_pm_put(dev_priv);
 418
 419         return count;
 420 }
 421
 422 static ssize_t gt_min_freq_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
 423 {
 424         struct drm_minor *minor = kdev_to_drm_minor(kdev);
 425         struct drm_device *dev = minor->dev;
 426         struct drm_i915_private *dev_priv = to_i915(dev);
 427
 428         return snprintf(buf, PAGE_SIZE, "%d\n",
 429                         intel_gpu_freq(dev_priv,
 430                                        dev_priv->rps.min_freq_softlimit));
 431 }
 432
 433 static ssize_t gt_min_freq_mhz_store(struct device *kdev,
 434                                      struct device_attribute *attr,
 435                                      const char *buf, size_t count)
 436 {
 437         struct drm_minor *minor = kdev_to_drm_minor(kdev);
 438         struct drm_device *dev = minor->dev;
 439         struct drm_i915_private *dev_priv = to_i915(dev);
 440         u32 val;
 441         ssize_t ret;
 442
 443         ret = kstrtou32(buf, 0, &val);
 444         if (ret)
 445                 return ret;
 446
 447         intel_runtime_pm_get(dev_priv);
 448
 449         mutex_lock(&dev_priv->rps.hw_lock);
 450
 451         val = intel_freq_opcode(dev_priv, val);
 452
 453         if (val < dev_priv->rps.min_freq ||
 454             val > dev_priv->rps.max_freq ||
 455             val > dev_priv->rps.max_freq_softlimit) {
 456                 mutex_unlock(&dev_priv->rps.hw_lock);
 457                 intel_runtime_pm_put(dev_priv);
 458                 return -EINVAL;
 459         }
 460
 461         dev_priv->rps.min_freq_softlimit = val;
 462
 463         val = clamp_t(int, dev_priv->rps.cur_freq,
 464                       dev_priv->rps.min_freq_softlimit,
 465                       dev_priv->rps.max_freq_softlimit);
 466
 467         /* We still need *_set_rps to process the new min_delay and
 468          * update the interrupt limits and PMINTRMSK even though
 469          * frequency request may be unchanged. */
 470         intel_set_rps(dev_priv, val);
 471
 472         mutex_unlock(&dev_priv->rps.hw_lock);
 473
 474         intel_runtime_pm_put(dev_priv);
 475
 476         return count;
 477
 478 }
 479
 480 static DEVICE_ATTR(gt_act_freq_mhz, S_IRUGO, gt_act_freq_mhz_show, NULL);
 481 static DEVICE_ATTR(gt_cur_freq_mhz, S_IRUGO, gt_cur_freq_mhz_show, NULL);
 482 static DEVICE_ATTR(gt_boost_freq_mhz, S_IRUGO, gt_boost_freq_mhz_show, gt_boost_freq_mhz_store);
 483 static DEVICE_ATTR(gt_max_freq_mhz, S_IRUGO | S_IWUSR, gt_max_freq_mhz_show, gt_max_freq_mhz_store);
 484 static DEVICE_ATTR(gt_min_freq_mhz, S_IRUGO | S_IWUSR, gt_min_freq_mhz_show, gt_min_freq_mhz_store);
 485
 486 static DEVICE_ATTR(vlv_rpe_freq_mhz, S_IRUGO, vlv_rpe_freq_mhz_show, NULL);
 487
 488 static ssize_t gt_rp_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf);
 489 static DEVICE_ATTR(gt_RP0_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL);
 490 static DEVICE_ATTR(gt_RP1_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL);
 491 static DEVICE_ATTR(gt_RPn_freq_mhz, S_IRUGO, gt_rp_mhz_show, NULL);
 492
 493 /* For now we have a static number of RP states */
 494 static ssize_t gt_rp_mhz_show(struct device *kdev, struct device_attribute *attr, char *buf)
 495 {
 496         struct drm_minor *minor = kdev_to_drm_minor(kdev);
 497         struct drm_device *dev = minor->dev;
 498         struct drm_i915_private *dev_priv = to_i915(dev);
 499         u32 val;
 500
 501         if (attr == &dev_attr_gt_RP0_freq_mhz)
 502                 val = intel_gpu_freq(dev_priv, dev_priv->rps.rp0_freq);
 503         else if (attr == &dev_attr_gt_RP1_freq_mhz)
 504                 val = intel_gpu_freq(dev_priv, dev_priv->rps.rp1_freq);
 505         else if (attr == &dev_attr_gt_RPn_freq_mhz)
 506                 val = intel_gpu_freq(dev_priv, dev_priv->rps.min_freq);
 507         else
 508                 BUG();
 509
 510         return snprintf(buf, PAGE_SIZE, "%d\n", val);
 511 }
 512
 513 static const struct attribute *gen6_attrs[] = {
 514         &dev_attr_gt_act_freq_mhz.attr,
 515         &dev_attr_gt_cur_freq_mhz.attr,
 516         &dev_attr_gt_boost_freq_mhz.attr,
 517         &dev_attr_gt_max_freq_mhz.attr,
 518         &dev_attr_gt_min_freq_mhz.attr,
 519         &dev_attr_gt_RP0_freq_mhz.attr,
 520         &dev_attr_gt_RP1_freq_mhz.attr,
 521         &dev_attr_gt_RPn_freq_mhz.attr,
 522         NULL,
 523 };
 524
 525 static const struct attribute *vlv_attrs[] = {
 526         &dev_attr_gt_act_freq_mhz.attr,
 527         &dev_attr_gt_cur_freq_mhz.attr,
 528         &dev_attr_gt_boost_freq_mhz.attr,
 529         &dev_attr_gt_max_freq_mhz.attr,
 530         &dev_attr_gt_min_freq_mhz.attr,
 531         &dev_attr_gt_RP0_freq_mhz.attr,
 532         &dev_attr_gt_RP1_freq_mhz.attr,
 533         &dev_attr_gt_RPn_freq_mhz.attr,
 534         &dev_attr_vlv_rpe_freq_mhz.attr,
 535         NULL,
 536 };
 537
 538 static ssize_t error_state_read(struct file *filp, struct kobject *kobj,
 539                                 struct bin_attribute *attr, char *buf,
 540                                 loff_t off, size_t count)
 541 {
 542
 543         struct device *kdev = kobj_to_dev(kobj);
 544         struct drm_minor *minor = kdev_to_drm_minor(kdev);
 545         struct drm_device *dev = minor->dev;
 546         struct i915_error_state_file_priv error_priv;
 547         struct drm_i915_error_state_buf error_str;
 548         ssize_t ret_count = 0;
 549         int ret;
 550
 551         memset(&error_priv, 0, sizeof(error_priv));
 552
 553         ret = i915_error_state_buf_init(&error_str, to_i915(dev), count, off);
 554         if (ret)
 555                 return ret;
 556
 557         error_priv.dev = dev;
 558         i915_error_state_get(dev, &error_priv);
 559
 560         ret = i915_error_state_to_str(&error_str, &error_priv);
 561         if (ret)
 562                 goto out;
 563
 564         ret_count = count < error_str.bytes ? count : error_str.bytes;
 565
 566         memcpy(buf, error_str.buf, ret_count);
 567 out:
 568         i915_error_state_put(&error_priv);
 569         i915_error_state_buf_release(&error_str);
 570
 571         return ret ?: ret_count;
 572 }
 573
 574 static ssize_t error_state_write(struct file *file, struct kobject *kobj,
 575                                  struct bin_attribute *attr, char *buf,
 576                                  loff_t off, size_t count)
 577 {
 578         struct device *kdev = kobj_to_dev(kobj);
 579         struct drm_minor *minor = kdev_to_drm_minor(kdev);
 580         struct drm_device *dev = minor->dev;
 581         int ret;
 582
 583         DRM_DEBUG_DRIVER("Resetting error state\n");
 584
 585         ret = mutex_lock_interruptible(&dev->struct_mutex);
 586         if (ret)
 587                 return ret;
 588
 589         i915_destroy_error_state(dev);
 590         mutex_unlock(&dev->struct_mutex);
 591
 592         return count;
 593 }
 594
 595 static struct bin_attribute error_state_attr = {
 596         .attr.name = "error",
 597         .attr.mode = S_IRUSR | S_IWUSR,
 598         .size = 0,
 599         .read = error_state_read,
 600         .write = error_state_write,
 601 };
 602
 603 void i915_setup_sysfs(struct drm_device *dev)
 604 {
 605         int ret;
 606
 607 #ifdef CONFIG_PM
 608         if (HAS_RC6(dev)) {
 609                 ret = sysfs_merge_group(&dev->primary->kdev->kobj,
 610                                         &rc6_attr_group);
 611                 if (ret)
 612                         DRM_ERROR("RC6 residency sysfs setup failed\n");
 613         }
 614         if (HAS_RC6p(dev)) {
 615                 ret = sysfs_merge_group(&dev->primary->kdev->kobj,
 616                                         &rc6p_attr_group);
 617                 if (ret)
 618                         DRM_ERROR("RC6p residency sysfs setup failed\n");
 619         }
 620         if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev)) {
 621                 ret = sysfs_merge_group(&dev->primary->kdev->kobj,
 622                                         &media_rc6_attr_group);
 623                 if (ret)
 624                         DRM_ERROR("Media RC6 residency sysfs setup failed\n");
 625         }
 626 #endif
 627         if (HAS_L3_DPF(dev)) {
 628                 ret = device_create_bin_file(dev->primary->kdev, &dpf_attrs);
 629                 if (ret)
 630                         DRM_ERROR("l3 parity sysfs setup failed\n");
 631
 632                 if (NUM_L3_SLICES(dev) > 1) {
 633                         ret = device_create_bin_file(dev->primary->kdev,
 634                                                      &dpf_attrs_1);
 635                         if (ret)
 636                                 DRM_ERROR("l3 parity slice 1 setup failed\n");
 637                 }
 638         }
 639
 640         ret = 0;
 641         if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
 642                 ret = sysfs_create_files(&dev->primary->kdev->kobj, vlv_attrs);
 643         else if (INTEL_INFO(dev)->gen >= 6)
 644                 ret = sysfs_create_files(&dev->primary->kdev->kobj, gen6_attrs);
 645         if (ret)
 646                 DRM_ERROR("RPS sysfs setup failed\n");
 647
 648         ret = sysfs_create_bin_file(&dev->primary->kdev->kobj,
 649                                     &error_state_attr);
 650         if (ret)
 651                 DRM_ERROR("error_state sysfs setup failed\n");
 652 }
 653
 654 void i915_teardown_sysfs(struct drm_device *dev)
 655 {
 656         sysfs_remove_bin_file(&dev->primary->kdev->kobj, &error_state_attr);
 657         if (IS_VALLEYVIEW(dev) || IS_CHERRYVIEW(dev))
 658                 sysfs_remove_files(&dev->primary->kdev->kobj, vlv_attrs);
 659         else
 660                 sysfs_remove_files(&dev->primary->kdev->kobj, gen6_attrs);
 661         device_remove_bin_file(dev->primary->kdev,  &dpf_attrs_1);
 662         device_remove_bin_file(dev->primary->kdev,  &dpf_attrs);
 663 #ifdef CONFIG_PM
 664         sysfs_unmerge_group(&dev->primary->kdev->kobj, &rc6_attr_group);
 665         sysfs_unmerge_group(&dev->primary->kdev->kobj, &rc6p_attr_group);
 666 #endif
 667 }